#[doc = "Register `DPLLCTRLA` reader"]
pub type R = crate::R<DPLLCTRLA_SPEC>;
#[doc = "Register `DPLLCTRLA` writer"]
pub type W = crate::W<DPLLCTRLA_SPEC>;
#[doc = "Field `ENABLE` reader - DPLL Enable"]
pub type ENABLE_R = crate::BitReader;
#[doc = "Field `ENABLE` writer - DPLL Enable"]
pub type ENABLE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
pub type RUNSTDBY_R = crate::BitReader;
#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
pub type RUNSTDBY_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
#[doc = "Field `ONDEMAND` reader - On Demand Control"]
pub type ONDEMAND_R = crate::BitReader;
#[doc = "Field `ONDEMAND` writer - On Demand Control"]
pub type ONDEMAND_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl R {
#[doc = "Bit 1 - DPLL Enable"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
pub fn runstdby(&self) -> RUNSTDBY_R {
RUNSTDBY_R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
pub fn ondemand(&self) -> ONDEMAND_R {
ONDEMAND_R::new(((self.bits >> 7) & 1) != 0)
}
}
impl W {
#[doc = "Bit 1 - DPLL Enable"]
#[inline(always)]
#[must_use]
pub fn enable(&mut self) -> ENABLE_W<DPLLCTRLA_SPEC, 1> {
ENABLE_W::new(self)
}
#[doc = "Bit 6 - Run in Standby"]
#[inline(always)]
#[must_use]
pub fn runstdby(&mut self) -> RUNSTDBY_W<DPLLCTRLA_SPEC, 6> {
RUNSTDBY_W::new(self)
}
#[doc = "Bit 7 - On Demand Control"]
#[inline(always)]
#[must_use]
pub fn ondemand(&mut self) -> ONDEMAND_W<DPLLCTRLA_SPEC, 7> {
ONDEMAND_W::new(self)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
#[doc = r" # Safety"]
#[doc = r""]
#[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.bits = bits;
self
}
}
#[doc = "DPLL Control A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dpllctrla::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dpllctrla::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct DPLLCTRLA_SPEC;
impl crate::RegisterSpec for DPLLCTRLA_SPEC {
type Ux = u8;
}
#[doc = "`read()` method returns [`dpllctrla::R`](R) reader structure"]
impl crate::Readable for DPLLCTRLA_SPEC {}
#[doc = "`write(|w| ..)` method takes [`dpllctrla::W`](W) writer structure"]
impl crate::Writable for DPLLCTRLA_SPEC {
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets DPLLCTRLA to value 0x80"]
impl crate::Resettable for DPLLCTRLA_SPEC {
const RESET_VALUE: Self::Ux = 0x80;
}