Type Alias atsame54n::sercom0::usart_ext::ctrla::W

pub type W = W<CTRLA_SPEC>;

Register CTRLA writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn swrst(&mut self) -> SWRST_W<'_, CTRLA_SPEC, 0>

Bit 0 - Software Reset

pub fn enable(&mut self) -> ENABLE_W<'_, CTRLA_SPEC, 1>

Bit 1 - Enable

pub fn mode(&mut self) -> MODE_W<'_, CTRLA_SPEC, 2>

Bits 2:4 - Operating Mode

pub fn runstdby(&mut self) -> RUNSTDBY_W<'_, CTRLA_SPEC, 7>

Bit 7 - Run during Standby

pub fn ibon(&mut self) -> IBON_W<'_, CTRLA_SPEC, 8>

Bit 8 - Immediate Buffer Overflow Notification

pub fn txinv(&mut self) -> TXINV_W<'_, CTRLA_SPEC, 9>

Bit 9 - Transmit Data Invert

pub fn rxinv(&mut self) -> RXINV_W<'_, CTRLA_SPEC, 10>

Bit 10 - Receive Data Invert

pub fn sampr(&mut self) -> SAMPR_W<'_, CTRLA_SPEC, 13>

Bits 13:15 - Sample

pub fn txpo(&mut self) -> TXPO_W<'_, CTRLA_SPEC, 16>

Bits 16:17 - Transmit Data Pinout

pub fn rxpo(&mut self) -> RXPO_W<'_, CTRLA_SPEC, 20>

Bits 20:21 - Receive Data Pinout

pub fn sampa(&mut self) -> SAMPA_W<'_, CTRLA_SPEC, 22>

Bits 22:23 - Sample Adjustment

pub fn form(&mut self) -> FORM_W<'_, CTRLA_SPEC, 24>

Bits 24:27 - Frame Format

pub fn cmode(&mut self) -> CMODE_W<'_, CTRLA_SPEC, 28>

Bit 28 - Communication Mode

pub fn cpol(&mut self) -> CPOL_W<'_, CTRLA_SPEC, 29>

Bit 29 - Clock Polarity

pub fn dord(&mut self) -> DORD_W<'_, CTRLA_SPEC, 30>

Bit 30 - Data Order

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual