Type Alias atsame54n::dmac::channel::chctrla::TRIGSRC_W

pub type TRIGSRC_W<'a, REG, const O: u8> = FieldWriter<'a, REG, 7, O, TRIGSRCSELECT_A>;

Expand description

Field TRIGSRC writer - Trigger Source

Aliased Type§

struct TRIGSRC_W<'a, REG, const O: u8> { /* private fields */ }

Implementations§

impl<'a, REG, const O: u8> TRIGSRC_W<'a, REG, O>
where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

pub fn disable(self) -> &'a mut W<REG>

Only software/event triggers

pub fn rtc_timestamp(self) -> &'a mut W<REG>

DMA RTC timestamp trigger

pub fn dsu_dcc0(self) -> &'a mut W<REG>

DMAC ID for DCC0 register

pub fn dsu_dcc1(self) -> &'a mut W<REG>

DMAC ID for DCC1 register

pub fn sercom0_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom0_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom1_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom1_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom2_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom2_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom3_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom3_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom4_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom4_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom5_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom5_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom6_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom6_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn sercom7_rx(self) -> &'a mut W<REG>

Index of DMA RX trigger

pub fn sercom7_tx(self) -> &'a mut W<REG>

Index of DMA TX trigger

pub fn can0_debug(self) -> &'a mut W<REG>

DMA CAN Debug Req

pub fn can1_debug(self) -> &'a mut W<REG>

DMA CAN Debug Req

pub fn tcc0_ovf(self) -> &'a mut W<REG>

DMA overflow/underflow/retrigger trigger

pub fn tcc0_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc0_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc0_mc_2(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc0_mc_3(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc0_mc_4(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc0_mc_5(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc1_ovf(self) -> &'a mut W<REG>

DMA overflow/underflow/retrigger trigger

pub fn tcc1_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc1_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc1_mc_2(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc1_mc_3(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc2_ovf(self) -> &'a mut W<REG>

DMA overflow/underflow/retrigger trigger

pub fn tcc2_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc2_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc2_mc_2(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc3_ovf(self) -> &'a mut W<REG>

DMA overflow/underflow/retrigger trigger

pub fn tcc3_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc3_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc4_ovf(self) -> &'a mut W<REG>

DMA overflow/underflow/retrigger trigger

pub fn tcc4_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tcc4_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc0_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc0_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc0_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc1_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc1_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc1_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc2_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc2_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc2_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc3_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc3_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc3_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc4_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc4_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc4_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc5_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc5_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc5_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc6_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc6_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc6_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc7_ovf(self) -> &'a mut W<REG>

Indexes of DMA Overflow trigger

pub fn tc7_mc_0(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn tc7_mc_1(self) -> &'a mut W<REG>

Indexes of DMA Match/Compare triggers

pub fn adc0_resrdy(self) -> &'a mut W<REG>

index of DMA RESRDY trigger

pub fn adc0_seq(self) -> &'a mut W<REG>

Index of DMA SEQ trigger

pub fn adc1_resrdy(self) -> &'a mut W<REG>

Index of DMA RESRDY trigger

pub fn adc1_seq(self) -> &'a mut W<REG>

Index of DMA SEQ trigger

pub fn dac_empty_0(self) -> &'a mut W<REG>

DMA DAC Empty Req

pub fn dac_empty_1(self) -> &'a mut W<REG>

DMA DAC Empty Req

pub fn dac_resrdy_0(self) -> &'a mut W<REG>

DMA DAC Result Ready Req

pub fn dac_resrdy_1(self) -> &'a mut W<REG>

DMA DAC Result Ready Req

pub fn i2s_rx_0(self) -> &'a mut W<REG>

Indexes of DMA RX triggers

pub fn i2s_rx_1(self) -> &'a mut W<REG>

Indexes of DMA RX triggers

pub fn i2s_tx_0(self) -> &'a mut W<REG>

Indexes of DMA TX triggers

pub fn i2s_tx_1(self) -> &'a mut W<REG>

Indexes of DMA TX triggers

pub fn pcc_rx(self) -> &'a mut W<REG>

Indexes of PCC RX trigger

pub fn aes_wr(self) -> &'a mut W<REG>

DMA DATA Write trigger

pub fn aes_rd(self) -> &'a mut W<REG>

DMA DATA Read trigger

pub fn qspi_rx(self) -> &'a mut W<REG>

Indexes of QSPI RX trigger

pub fn qspi_tx(self) -> &'a mut W<REG>

Indexes of QSPI TX trigger