atsamd51j20a/oscctrl/
intenset.rs

1#[doc = "Reader of register INTENSET"]
2pub type R = crate::R<u32, super::INTENSET>;
3#[doc = "Writer for register INTENSET"]
4pub type W = crate::W<u32, super::INTENSET>;
5#[doc = "Register INTENSET `reset()`'s with value 0"]
6impl crate::ResetValue for super::INTENSET {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `XOSCRDY0`"]
14pub type XOSCRDY0_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `XOSCRDY0`"]
16pub struct XOSCRDY0_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> XOSCRDY0_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `XOSCRDY1`"]
38pub type XOSCRDY1_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `XOSCRDY1`"]
40pub struct XOSCRDY1_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> XOSCRDY1_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `XOSCFAIL0`"]
62pub type XOSCFAIL0_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `XOSCFAIL0`"]
64pub struct XOSCFAIL0_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> XOSCFAIL0_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `XOSCFAIL1`"]
86pub type XOSCFAIL1_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `XOSCFAIL1`"]
88pub struct XOSCFAIL1_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> XOSCFAIL1_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106        self.w
107    }
108}
109#[doc = "Reader of field `DFLLRDY`"]
110pub type DFLLRDY_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `DFLLRDY`"]
112pub struct DFLLRDY_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> DFLLRDY_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
130        self.w
131    }
132}
133#[doc = "Reader of field `DFLLOOB`"]
134pub type DFLLOOB_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `DFLLOOB`"]
136pub struct DFLLOOB_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> DFLLOOB_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
154        self.w
155    }
156}
157#[doc = "Reader of field `DFLLLCKF`"]
158pub type DFLLLCKF_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `DFLLLCKF`"]
160pub struct DFLLLCKF_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> DFLLLCKF_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
178        self.w
179    }
180}
181#[doc = "Reader of field `DFLLLCKC`"]
182pub type DFLLLCKC_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `DFLLLCKC`"]
184pub struct DFLLLCKC_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> DFLLLCKC_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
202        self.w
203    }
204}
205#[doc = "Reader of field `DFLLRCS`"]
206pub type DFLLRCS_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `DFLLRCS`"]
208pub struct DFLLRCS_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> DFLLRCS_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
226        self.w
227    }
228}
229#[doc = "Reader of field `DPLL0LCKR`"]
230pub type DPLL0LCKR_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `DPLL0LCKR`"]
232pub struct DPLL0LCKR_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> DPLL0LCKR_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
250        self.w
251    }
252}
253#[doc = "Reader of field `DPLL0LCKF`"]
254pub type DPLL0LCKF_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `DPLL0LCKF`"]
256pub struct DPLL0LCKF_W<'a> {
257    w: &'a mut W,
258}
259impl<'a> DPLL0LCKF_W<'a> {
260    #[doc = r"Sets the field bit"]
261    #[inline(always)]
262    pub fn set_bit(self) -> &'a mut W {
263        self.bit(true)
264    }
265    #[doc = r"Clears the field bit"]
266    #[inline(always)]
267    pub fn clear_bit(self) -> &'a mut W {
268        self.bit(false)
269    }
270    #[doc = r"Writes raw bits to the field"]
271    #[inline(always)]
272    pub fn bit(self, value: bool) -> &'a mut W {
273        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
274        self.w
275    }
276}
277#[doc = "Reader of field `DPLL0LTO`"]
278pub type DPLL0LTO_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `DPLL0LTO`"]
280pub struct DPLL0LTO_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> DPLL0LTO_W<'a> {
284    #[doc = r"Sets the field bit"]
285    #[inline(always)]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r"Clears the field bit"]
290    #[inline(always)]
291    pub fn clear_bit(self) -> &'a mut W {
292        self.bit(false)
293    }
294    #[doc = r"Writes raw bits to the field"]
295    #[inline(always)]
296    pub fn bit(self, value: bool) -> &'a mut W {
297        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
298        self.w
299    }
300}
301#[doc = "Reader of field `DPLL0LDRTO`"]
302pub type DPLL0LDRTO_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `DPLL0LDRTO`"]
304pub struct DPLL0LDRTO_W<'a> {
305    w: &'a mut W,
306}
307impl<'a> DPLL0LDRTO_W<'a> {
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
322        self.w
323    }
324}
325#[doc = "Reader of field `DPLL1LCKR`"]
326pub type DPLL1LCKR_R = crate::R<bool, bool>;
327#[doc = "Write proxy for field `DPLL1LCKR`"]
328pub struct DPLL1LCKR_W<'a> {
329    w: &'a mut W,
330}
331impl<'a> DPLL1LCKR_W<'a> {
332    #[doc = r"Sets the field bit"]
333    #[inline(always)]
334    pub fn set_bit(self) -> &'a mut W {
335        self.bit(true)
336    }
337    #[doc = r"Clears the field bit"]
338    #[inline(always)]
339    pub fn clear_bit(self) -> &'a mut W {
340        self.bit(false)
341    }
342    #[doc = r"Writes raw bits to the field"]
343    #[inline(always)]
344    pub fn bit(self, value: bool) -> &'a mut W {
345        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
346        self.w
347    }
348}
349#[doc = "Reader of field `DPLL1LCKF`"]
350pub type DPLL1LCKF_R = crate::R<bool, bool>;
351#[doc = "Write proxy for field `DPLL1LCKF`"]
352pub struct DPLL1LCKF_W<'a> {
353    w: &'a mut W,
354}
355impl<'a> DPLL1LCKF_W<'a> {
356    #[doc = r"Sets the field bit"]
357    #[inline(always)]
358    pub fn set_bit(self) -> &'a mut W {
359        self.bit(true)
360    }
361    #[doc = r"Clears the field bit"]
362    #[inline(always)]
363    pub fn clear_bit(self) -> &'a mut W {
364        self.bit(false)
365    }
366    #[doc = r"Writes raw bits to the field"]
367    #[inline(always)]
368    pub fn bit(self, value: bool) -> &'a mut W {
369        self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
370        self.w
371    }
372}
373#[doc = "Reader of field `DPLL1LTO`"]
374pub type DPLL1LTO_R = crate::R<bool, bool>;
375#[doc = "Write proxy for field `DPLL1LTO`"]
376pub struct DPLL1LTO_W<'a> {
377    w: &'a mut W,
378}
379impl<'a> DPLL1LTO_W<'a> {
380    #[doc = r"Sets the field bit"]
381    #[inline(always)]
382    pub fn set_bit(self) -> &'a mut W {
383        self.bit(true)
384    }
385    #[doc = r"Clears the field bit"]
386    #[inline(always)]
387    pub fn clear_bit(self) -> &'a mut W {
388        self.bit(false)
389    }
390    #[doc = r"Writes raw bits to the field"]
391    #[inline(always)]
392    pub fn bit(self, value: bool) -> &'a mut W {
393        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
394        self.w
395    }
396}
397#[doc = "Reader of field `DPLL1LDRTO`"]
398pub type DPLL1LDRTO_R = crate::R<bool, bool>;
399#[doc = "Write proxy for field `DPLL1LDRTO`"]
400pub struct DPLL1LDRTO_W<'a> {
401    w: &'a mut W,
402}
403impl<'a> DPLL1LDRTO_W<'a> {
404    #[doc = r"Sets the field bit"]
405    #[inline(always)]
406    pub fn set_bit(self) -> &'a mut W {
407        self.bit(true)
408    }
409    #[doc = r"Clears the field bit"]
410    #[inline(always)]
411    pub fn clear_bit(self) -> &'a mut W {
412        self.bit(false)
413    }
414    #[doc = r"Writes raw bits to the field"]
415    #[inline(always)]
416    pub fn bit(self, value: bool) -> &'a mut W {
417        self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
418        self.w
419    }
420}
421impl R {
422    #[doc = "Bit 0 - XOSC 0 Ready Interrupt Enable"]
423    #[inline(always)]
424    pub fn xoscrdy0(&self) -> XOSCRDY0_R {
425        XOSCRDY0_R::new((self.bits & 0x01) != 0)
426    }
427    #[doc = "Bit 1 - XOSC 1 Ready Interrupt Enable"]
428    #[inline(always)]
429    pub fn xoscrdy1(&self) -> XOSCRDY1_R {
430        XOSCRDY1_R::new(((self.bits >> 1) & 0x01) != 0)
431    }
432    #[doc = "Bit 2 - XOSC 0 Clock Failure Detector Interrupt Enable"]
433    #[inline(always)]
434    pub fn xoscfail0(&self) -> XOSCFAIL0_R {
435        XOSCFAIL0_R::new(((self.bits >> 2) & 0x01) != 0)
436    }
437    #[doc = "Bit 3 - XOSC 1 Clock Failure Detector Interrupt Enable"]
438    #[inline(always)]
439    pub fn xoscfail1(&self) -> XOSCFAIL1_R {
440        XOSCFAIL1_R::new(((self.bits >> 3) & 0x01) != 0)
441    }
442    #[doc = "Bit 8 - DFLL Ready Interrupt Enable"]
443    #[inline(always)]
444    pub fn dfllrdy(&self) -> DFLLRDY_R {
445        DFLLRDY_R::new(((self.bits >> 8) & 0x01) != 0)
446    }
447    #[doc = "Bit 9 - DFLL Out Of Bounds Interrupt Enable"]
448    #[inline(always)]
449    pub fn dflloob(&self) -> DFLLOOB_R {
450        DFLLOOB_R::new(((self.bits >> 9) & 0x01) != 0)
451    }
452    #[doc = "Bit 10 - DFLL Lock Fine Interrupt Enable"]
453    #[inline(always)]
454    pub fn dflllckf(&self) -> DFLLLCKF_R {
455        DFLLLCKF_R::new(((self.bits >> 10) & 0x01) != 0)
456    }
457    #[doc = "Bit 11 - DFLL Lock Coarse Interrupt Enable"]
458    #[inline(always)]
459    pub fn dflllckc(&self) -> DFLLLCKC_R {
460        DFLLLCKC_R::new(((self.bits >> 11) & 0x01) != 0)
461    }
462    #[doc = "Bit 12 - DFLL Reference Clock Stopped Interrupt Enable"]
463    #[inline(always)]
464    pub fn dfllrcs(&self) -> DFLLRCS_R {
465        DFLLRCS_R::new(((self.bits >> 12) & 0x01) != 0)
466    }
467    #[doc = "Bit 16 - DPLL0 Lock Rise Interrupt Enable"]
468    #[inline(always)]
469    pub fn dpll0lckr(&self) -> DPLL0LCKR_R {
470        DPLL0LCKR_R::new(((self.bits >> 16) & 0x01) != 0)
471    }
472    #[doc = "Bit 17 - DPLL0 Lock Fall Interrupt Enable"]
473    #[inline(always)]
474    pub fn dpll0lckf(&self) -> DPLL0LCKF_R {
475        DPLL0LCKF_R::new(((self.bits >> 17) & 0x01) != 0)
476    }
477    #[doc = "Bit 18 - DPLL0 Lock Timeout Interrupt Enable"]
478    #[inline(always)]
479    pub fn dpll0lto(&self) -> DPLL0LTO_R {
480        DPLL0LTO_R::new(((self.bits >> 18) & 0x01) != 0)
481    }
482    #[doc = "Bit 19 - DPLL0 Loop Divider Ratio Update Complete Interrupt Enable"]
483    #[inline(always)]
484    pub fn dpll0ldrto(&self) -> DPLL0LDRTO_R {
485        DPLL0LDRTO_R::new(((self.bits >> 19) & 0x01) != 0)
486    }
487    #[doc = "Bit 24 - DPLL1 Lock Rise Interrupt Enable"]
488    #[inline(always)]
489    pub fn dpll1lckr(&self) -> DPLL1LCKR_R {
490        DPLL1LCKR_R::new(((self.bits >> 24) & 0x01) != 0)
491    }
492    #[doc = "Bit 25 - DPLL1 Lock Fall Interrupt Enable"]
493    #[inline(always)]
494    pub fn dpll1lckf(&self) -> DPLL1LCKF_R {
495        DPLL1LCKF_R::new(((self.bits >> 25) & 0x01) != 0)
496    }
497    #[doc = "Bit 26 - DPLL1 Lock Timeout Interrupt Enable"]
498    #[inline(always)]
499    pub fn dpll1lto(&self) -> DPLL1LTO_R {
500        DPLL1LTO_R::new(((self.bits >> 26) & 0x01) != 0)
501    }
502    #[doc = "Bit 27 - DPLL1 Loop Divider Ratio Update Complete Interrupt Enable"]
503    #[inline(always)]
504    pub fn dpll1ldrto(&self) -> DPLL1LDRTO_R {
505        DPLL1LDRTO_R::new(((self.bits >> 27) & 0x01) != 0)
506    }
507}
508impl W {
509    #[doc = "Bit 0 - XOSC 0 Ready Interrupt Enable"]
510    #[inline(always)]
511    pub fn xoscrdy0(&mut self) -> XOSCRDY0_W {
512        XOSCRDY0_W { w: self }
513    }
514    #[doc = "Bit 1 - XOSC 1 Ready Interrupt Enable"]
515    #[inline(always)]
516    pub fn xoscrdy1(&mut self) -> XOSCRDY1_W {
517        XOSCRDY1_W { w: self }
518    }
519    #[doc = "Bit 2 - XOSC 0 Clock Failure Detector Interrupt Enable"]
520    #[inline(always)]
521    pub fn xoscfail0(&mut self) -> XOSCFAIL0_W {
522        XOSCFAIL0_W { w: self }
523    }
524    #[doc = "Bit 3 - XOSC 1 Clock Failure Detector Interrupt Enable"]
525    #[inline(always)]
526    pub fn xoscfail1(&mut self) -> XOSCFAIL1_W {
527        XOSCFAIL1_W { w: self }
528    }
529    #[doc = "Bit 8 - DFLL Ready Interrupt Enable"]
530    #[inline(always)]
531    pub fn dfllrdy(&mut self) -> DFLLRDY_W {
532        DFLLRDY_W { w: self }
533    }
534    #[doc = "Bit 9 - DFLL Out Of Bounds Interrupt Enable"]
535    #[inline(always)]
536    pub fn dflloob(&mut self) -> DFLLOOB_W {
537        DFLLOOB_W { w: self }
538    }
539    #[doc = "Bit 10 - DFLL Lock Fine Interrupt Enable"]
540    #[inline(always)]
541    pub fn dflllckf(&mut self) -> DFLLLCKF_W {
542        DFLLLCKF_W { w: self }
543    }
544    #[doc = "Bit 11 - DFLL Lock Coarse Interrupt Enable"]
545    #[inline(always)]
546    pub fn dflllckc(&mut self) -> DFLLLCKC_W {
547        DFLLLCKC_W { w: self }
548    }
549    #[doc = "Bit 12 - DFLL Reference Clock Stopped Interrupt Enable"]
550    #[inline(always)]
551    pub fn dfllrcs(&mut self) -> DFLLRCS_W {
552        DFLLRCS_W { w: self }
553    }
554    #[doc = "Bit 16 - DPLL0 Lock Rise Interrupt Enable"]
555    #[inline(always)]
556    pub fn dpll0lckr(&mut self) -> DPLL0LCKR_W {
557        DPLL0LCKR_W { w: self }
558    }
559    #[doc = "Bit 17 - DPLL0 Lock Fall Interrupt Enable"]
560    #[inline(always)]
561    pub fn dpll0lckf(&mut self) -> DPLL0LCKF_W {
562        DPLL0LCKF_W { w: self }
563    }
564    #[doc = "Bit 18 - DPLL0 Lock Timeout Interrupt Enable"]
565    #[inline(always)]
566    pub fn dpll0lto(&mut self) -> DPLL0LTO_W {
567        DPLL0LTO_W { w: self }
568    }
569    #[doc = "Bit 19 - DPLL0 Loop Divider Ratio Update Complete Interrupt Enable"]
570    #[inline(always)]
571    pub fn dpll0ldrto(&mut self) -> DPLL0LDRTO_W {
572        DPLL0LDRTO_W { w: self }
573    }
574    #[doc = "Bit 24 - DPLL1 Lock Rise Interrupt Enable"]
575    #[inline(always)]
576    pub fn dpll1lckr(&mut self) -> DPLL1LCKR_W {
577        DPLL1LCKR_W { w: self }
578    }
579    #[doc = "Bit 25 - DPLL1 Lock Fall Interrupt Enable"]
580    #[inline(always)]
581    pub fn dpll1lckf(&mut self) -> DPLL1LCKF_W {
582        DPLL1LCKF_W { w: self }
583    }
584    #[doc = "Bit 26 - DPLL1 Lock Timeout Interrupt Enable"]
585    #[inline(always)]
586    pub fn dpll1lto(&mut self) -> DPLL1LTO_W {
587        DPLL1LTO_W { w: self }
588    }
589    #[doc = "Bit 27 - DPLL1 Loop Divider Ratio Update Complete Interrupt Enable"]
590    #[inline(always)]
591    pub fn dpll1ldrto(&mut self) -> DPLL1LDRTO_W {
592        DPLL1LDRTO_W { w: self }
593    }
594}
atsamd51j20a/oscctrl/intenset.rs

atsamd51j20a/oscctrl/
intenset.rs
