Crate atsamd21g

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Expand description

Peripheral access API for ATSAMD21G microcontrollers (generated using svd2rust v0.30.2 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

  • pub use self::pac0 as pac1;
  • pub use self::pac0 as pac2;
  • pub use self::port as port_iobus;
  • pub use self::sercom0 as sercom1;
  • pub use self::sercom0 as sercom2;
  • pub use self::sercom0 as sercom3;
  • pub use self::sercom0 as sercom4;
  • pub use self::sercom0 as sercom5;
  • pub use self::tc3 as tc4;
  • pub use self::tc3 as tc5;
  • pub use self::tcc0 as tcc1;
  • pub use self::tcc0 as tcc2;

Modules§

  • Analog Comparators
  • Analog Digital Converter
  • Digital Analog Converter
  • Direct Memory Access Controller
  • Device Service Unit
  • External Interrupt Controller
  • Event System Interface
  • Generic Clock Generator
  • Common register and bit access and modify traits
  • HSB Matrix
  • Inter-IC Sound Interface
  • Cortex-M0+ Micro-Trace Buffer
  • Non-Volatile Memory Controller
  • Peripheral Access Controller 0
  • Power Manager
  • Port Module
  • Real-Time Counter
  • Serial Communication Interface 0
  • System Control
  • Basic Timer Counter 3
  • Timer Counter Control 0
  • Universal Serial Bus
  • Watchdog Timer

Structs§

  • Analog Comparators
  • Analog Digital Converter
  • Cache and branch predictor maintenance operations
  • CPUID
  • Core peripherals
  • Digital Analog Converter
  • Debug Control Block
  • Direct Memory Access Controller
  • Device Service Unit
  • Data Watchpoint and Trace unit
  • External Interrupt Controller
  • Event System Interface
  • Flash Patch and Breakpoint unit
  • Generic Clock Generator
  • HSB Matrix
  • Inter-IC Sound Interface
  • Instrumentation Trace Macrocell
  • Memory Protection Unit
  • Cortex-M0+ Micro-Trace Buffer
  • Nested Vector Interrupt Controller
  • Non-Volatile Memory Controller
  • Peripheral Access Controller 0
  • Peripheral Access Controller 1
  • Peripheral Access Controller 2
  • Power Manager
  • Port Module
  • Port Module (IOBUS)
  • All the peripherals.
  • Real-Time Counter
  • System Control Block
  • Serial Communication Interface 0
  • Serial Communication Interface 1
  • Serial Communication Interface 2
  • Serial Communication Interface 3
  • Serial Communication Interface 4
  • Serial Communication Interface 5
  • System Control
  • SysTick: System Timer
  • Basic Timer Counter 3
  • Basic Timer Counter 4
  • Basic Timer Counter 5
  • Timer Counter Control 0
  • Timer Counter Control 1
  • Timer Counter Control 2
  • Trace Port Interface Unit
  • Universal Serial Bus
  • Watchdog Timer

Enums§

Constants§