[−][src]Struct atsamd21e18a::generic::R
Register/field reader.
Result of the read
methods of registers. Also used as a closure argument in the modify
method.
Implementations
impl<U, T> R<U, T> where
U: Copy,
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U: Copy,
impl<FI> R<bool, FI>
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pub fn bit(&self) -> bool
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Value of the field as raw bits.
pub fn bit_is_clear(&self) -> bool
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Returns true
if the bit is clear (0).
pub fn bit_is_set(&self) -> bool
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Returns true
if the bit is set (1).
impl R<u8, Reg<u8, _CTRLA>>
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pub fn enable(&self) -> ENABLE_R
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Bit 1 - Enable
pub fn runstdby(&self) -> RUNSTDBY_R
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Bit 2 - Run in Standby
pub fn lpmux(&self) -> LPMUX_R
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Bit 7 - Low-Power Mux
impl R<u16, Reg<u16, _EVCTRL>>
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pub fn compeo0(&self) -> COMPEO0_R
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Bit 0 - Comparator 0 Event Output Enable
pub fn compeo1(&self) -> COMPEO1_R
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Bit 1 - Comparator 1 Event Output Enable
pub fn wineo0(&self) -> WINEO0_R
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Bit 4 - Window 0 Event Output Enable
pub fn compei0(&self) -> COMPEI0_R
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Bit 8 - Comparator 0 Event Input
pub fn compei1(&self) -> COMPEI1_R
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Bit 9 - Comparator 1 Event Input
impl R<u8, Reg<u8, _INTENCLR>>
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pub fn comp0(&self) -> COMP0_R
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Bit 0 - Comparator 0 Interrupt Enable
pub fn comp1(&self) -> COMP1_R
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Bit 1 - Comparator 1 Interrupt Enable
pub fn win0(&self) -> WIN0_R
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Bit 4 - Window 0 Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
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pub fn comp0(&self) -> COMP0_R
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Bit 0 - Comparator 0 Interrupt Enable
pub fn comp1(&self) -> COMP1_R
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Bit 1 - Comparator 1 Interrupt Enable
pub fn win0(&self) -> WIN0_R
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Bit 4 - Window 0 Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
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pub fn comp0(&self) -> COMP0_R
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Bit 0 - Comparator 0
pub fn comp1(&self) -> COMP1_R
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Bit 1 - Comparator 1
pub fn win0(&self) -> WIN0_R
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Bit 4 - Window 0
impl R<u8, WSTATE0_A>
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pub fn variant(&self) -> Variant<u8, WSTATE0_A>
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Get enumerated values variant
pub fn is_above(&self) -> bool
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Checks if the value of the field is ABOVE
pub fn is_inside(&self) -> bool
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Checks if the value of the field is INSIDE
pub fn is_below(&self) -> bool
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Checks if the value of the field is BELOW
impl R<u8, Reg<u8, _STATUSA>>
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pub fn state0(&self) -> STATE0_R
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Bit 0 - Comparator 0 Current State
pub fn state1(&self) -> STATE1_R
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Bit 1 - Comparator 1 Current State
pub fn wstate0(&self) -> WSTATE0_R
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Bits 4:5 - Window 0 Current State
impl R<u8, Reg<u8, _STATUSB>>
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pub fn ready0(&self) -> READY0_R
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Bit 0 - Comparator 0 Ready
pub fn ready1(&self) -> READY1_R
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Bit 1 - Comparator 1 Ready
pub fn syncbusy(&self) -> SYNCBUSY_R
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Bit 7 - Synchronization Busy
impl R<u8, WSTATE0_A>
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pub fn variant(&self) -> Variant<u8, WSTATE0_A>
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Get enumerated values variant
pub fn is_above(&self) -> bool
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Checks if the value of the field is ABOVE
pub fn is_inside(&self) -> bool
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Checks if the value of the field is INSIDE
pub fn is_below(&self) -> bool
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Checks if the value of the field is BELOW
impl R<u8, Reg<u8, _STATUSC>>
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pub fn state0(&self) -> STATE0_R
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Bit 0 - Comparator 0 Current State
pub fn state1(&self) -> STATE1_R
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Bit 1 - Comparator 1 Current State
pub fn wstate0(&self) -> WSTATE0_R
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Bits 4:5 - Window 0 Current State
impl R<u8, WINTSEL0_A>
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pub fn variant(&self) -> WINTSEL0_A
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Get enumerated values variant
pub fn is_above(&self) -> bool
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Checks if the value of the field is ABOVE
pub fn is_inside(&self) -> bool
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Checks if the value of the field is INSIDE
pub fn is_below(&self) -> bool
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Checks if the value of the field is BELOW
pub fn is_outside(&self) -> bool
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Checks if the value of the field is OUTSIDE
impl R<u8, Reg<u8, _WINCTRL>>
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pub fn wen0(&self) -> WEN0_R
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Bit 0 - Window 0 Mode Enable
pub fn wintsel0(&self) -> WINTSEL0_R
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Bits 1:2 - Window 0 Interrupt Selection
impl R<u8, SPEED_A>
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pub fn variant(&self) -> Variant<u8, SPEED_A>
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Get enumerated values variant
pub fn is_low(&self) -> bool
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Checks if the value of the field is LOW
pub fn is_high(&self) -> bool
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Checks if the value of the field is HIGH
impl R<u8, INTSEL_A>
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pub fn variant(&self) -> INTSEL_A
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Get enumerated values variant
pub fn is_toggle(&self) -> bool
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Checks if the value of the field is TOGGLE
pub fn is_rising(&self) -> bool
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Checks if the value of the field is RISING
pub fn is_falling(&self) -> bool
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Checks if the value of the field is FALLING
pub fn is_eoc(&self) -> bool
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Checks if the value of the field is EOC
impl R<u8, MUXNEG_A>
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pub fn variant(&self) -> MUXNEG_A
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Get enumerated values variant
pub fn is_pin0(&self) -> bool
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Checks if the value of the field is PIN0
pub fn is_pin1(&self) -> bool
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Checks if the value of the field is PIN1
pub fn is_pin2(&self) -> bool
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Checks if the value of the field is PIN2
pub fn is_pin3(&self) -> bool
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Checks if the value of the field is PIN3
pub fn is_gnd(&self) -> bool
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Checks if the value of the field is GND
pub fn is_vscale(&self) -> bool
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Checks if the value of the field is VSCALE
pub fn is_bandgap(&self) -> bool
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Checks if the value of the field is BANDGAP
pub fn is_dac(&self) -> bool
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Checks if the value of the field is DAC
impl R<u8, MUXPOS_A>
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pub fn variant(&self) -> MUXPOS_A
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Get enumerated values variant
pub fn is_pin0(&self) -> bool
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Checks if the value of the field is PIN0
pub fn is_pin1(&self) -> bool
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Checks if the value of the field is PIN1
pub fn is_pin2(&self) -> bool
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Checks if the value of the field is PIN2
pub fn is_pin3(&self) -> bool
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Checks if the value of the field is PIN3
impl R<u8, OUT_A>
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pub fn variant(&self) -> Variant<u8, OUT_A>
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Get enumerated values variant
pub fn is_off(&self) -> bool
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Checks if the value of the field is OFF
pub fn is_async_(&self) -> bool
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Checks if the value of the field is ASYNC
pub fn is_sync(&self) -> bool
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Checks if the value of the field is SYNC
impl R<u8, FLEN_A>
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pub fn variant(&self) -> Variant<u8, FLEN_A>
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Get enumerated values variant
pub fn is_off(&self) -> bool
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Checks if the value of the field is OFF
pub fn is_maj3(&self) -> bool
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Checks if the value of the field is MAJ3
pub fn is_maj5(&self) -> bool
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Checks if the value of the field is MAJ5
impl R<u32, Reg<u32, _COMPCTRL>>
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pub fn enable(&self) -> ENABLE_R
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Bit 0 - Enable
pub fn single(&self) -> SINGLE_R
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Bit 1 - Single-Shot Mode
pub fn speed(&self) -> SPEED_R
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Bits 2:3 - Speed Selection
pub fn intsel(&self) -> INTSEL_R
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Bits 5:6 - Interrupt Selection
pub fn muxneg(&self) -> MUXNEG_R
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Bits 8:10 - Negative Input Mux Selection
pub fn muxpos(&self) -> MUXPOS_R
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Bits 12:13 - Positive Input Mux Selection
pub fn swap(&self) -> SWAP_R
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Bit 15 - Swap Inputs and Invert
pub fn out(&self) -> OUT_R
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Bits 16:17 - Output
pub fn hyst(&self) -> HYST_R
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Bit 19 - Hysteresis Enable
pub fn flen(&self) -> FLEN_R
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Bits 24:26 - Filter Length
impl R<u8, Reg<u8, _SCALER>>
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impl R<u8, Reg<u8, _CTRLA>>
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pub fn swrst(&self) -> SWRST_R
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Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
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Bit 1 - Enable
pub fn runstdby(&self) -> RUNSTDBY_R
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Bit 2 - Run in Standby
impl R<u8, REFSEL_A>
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pub fn variant(&self) -> Variant<u8, REFSEL_A>
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Get enumerated values variant
pub fn is_int1v(&self) -> bool
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Checks if the value of the field is INT1V
pub fn is_intvcc0(&self) -> bool
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Checks if the value of the field is INTVCC0
pub fn is_intvcc1(&self) -> bool
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Checks if the value of the field is INTVCC1
pub fn is_arefa(&self) -> bool
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Checks if the value of the field is AREFA
pub fn is_arefb(&self) -> bool
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Checks if the value of the field is AREFB
impl R<u8, Reg<u8, _REFCTRL>>
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pub fn refsel(&self) -> REFSEL_R
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Bits 0:3 - Reference Selection
pub fn refcomp(&self) -> REFCOMP_R
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Bit 7 - Reference Buffer Offset Compensation Enable
impl R<u8, SAMPLENUM_A>
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pub fn variant(&self) -> Variant<u8, SAMPLENUM_A>
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Get enumerated values variant
pub fn is_1(&self) -> bool
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Checks if the value of the field is _1
pub fn is_2(&self) -> bool
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Checks if the value of the field is _2
pub fn is_4(&self) -> bool
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Checks if the value of the field is _4
pub fn is_8(&self) -> bool
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Checks if the value of the field is _8
pub fn is_16(&self) -> bool
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Checks if the value of the field is _16
pub fn is_32(&self) -> bool
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Checks if the value of the field is _32
pub fn is_64(&self) -> bool
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Checks if the value of the field is _64
pub fn is_128(&self) -> bool
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Checks if the value of the field is _128
pub fn is_256(&self) -> bool
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Checks if the value of the field is _256
pub fn is_512(&self) -> bool
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Checks if the value of the field is _512
pub fn is_1024(&self) -> bool
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Checks if the value of the field is _1024
impl R<u8, Reg<u8, _AVGCTRL>>
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pub fn samplenum(&self) -> SAMPLENUM_R
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Bits 0:3 - Number of Samples to be Collected
pub fn adjres(&self) -> ADJRES_R
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Bits 4:6 - Adjusting Result / Division Coefficient
impl R<u8, Reg<u8, _SAMPCTRL>>
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impl R<u8, RESSEL_A>
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pub fn variant(&self) -> RESSEL_A
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Get enumerated values variant
pub fn is_12bit(&self) -> bool
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Checks if the value of the field is _12BIT
pub fn is_16bit(&self) -> bool
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Checks if the value of the field is _16BIT
pub fn is_10bit(&self) -> bool
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Checks if the value of the field is _10BIT
pub fn is_8bit(&self) -> bool
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Checks if the value of the field is _8BIT
impl R<u8, PRESCALER_A>
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pub fn variant(&self) -> PRESCALER_A
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Get enumerated values variant
pub fn is_div4(&self) -> bool
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Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
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Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
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Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
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Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
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Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
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Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
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Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
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Checks if the value of the field is DIV512
impl R<u16, Reg<u16, _CTRLB>>
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pub fn diffmode(&self) -> DIFFMODE_R
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Bit 0 - Differential Mode
pub fn leftadj(&self) -> LEFTADJ_R
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Bit 1 - Left-Adjusted Result
pub fn freerun(&self) -> FREERUN_R
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Bit 2 - Free Running Mode
pub fn corren(&self) -> CORREN_R
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Bit 3 - Digital Correction Logic Enabled
pub fn ressel(&self) -> RESSEL_R
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Bits 4:5 - Conversion Result Resolution
pub fn prescaler(&self) -> PRESCALER_R
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Bits 8:10 - Prescaler Configuration
impl R<u8, WINMODE_A>
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pub fn variant(&self) -> Variant<u8, WINMODE_A>
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Get enumerated values variant
pub fn is_disable(&self) -> bool
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Checks if the value of the field is DISABLE
pub fn is_mode1(&self) -> bool
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Checks if the value of the field is MODE1
pub fn is_mode2(&self) -> bool
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Checks if the value of the field is MODE2
pub fn is_mode3(&self) -> bool
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Checks if the value of the field is MODE3
pub fn is_mode4(&self) -> bool
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Checks if the value of the field is MODE4
impl R<u8, Reg<u8, _WINCTRL>>
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impl R<u8, Reg<u8, _SWTRIG>>
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pub fn flush(&self) -> FLUSH_R
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Bit 0 - ADC Conversion Flush
pub fn start(&self) -> START_R
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Bit 1 - ADC Start Conversion
impl R<u8, MUXPOS_A>
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pub fn variant(&self) -> Variant<u8, MUXPOS_A>
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Get enumerated values variant
pub fn is_pin0(&self) -> bool
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Checks if the value of the field is PIN0
pub fn is_pin1(&self) -> bool
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Checks if the value of the field is PIN1
pub fn is_pin2(&self) -> bool
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Checks if the value of the field is PIN2
pub fn is_pin3(&self) -> bool
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Checks if the value of the field is PIN3
pub fn is_pin4(&self) -> bool
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Checks if the value of the field is PIN4
pub fn is_pin5(&self) -> bool
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Checks if the value of the field is PIN5
pub fn is_pin6(&self) -> bool
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Checks if the value of the field is PIN6
pub fn is_pin7(&self) -> bool
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Checks if the value of the field is PIN7
pub fn is_pin8(&self) -> bool
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Checks if the value of the field is PIN8
pub fn is_pin9(&self) -> bool
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Checks if the value of the field is PIN9
pub fn is_pin10(&self) -> bool
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Checks if the value of the field is PIN10
pub fn is_pin11(&self) -> bool
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Checks if the value of the field is PIN11
pub fn is_pin12(&self) -> bool
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Checks if the value of the field is PIN12
pub fn is_pin13(&self) -> bool
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Checks if the value of the field is PIN13
pub fn is_pin14(&self) -> bool
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Checks if the value of the field is PIN14
pub fn is_pin15(&self) -> bool
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Checks if the value of the field is PIN15
pub fn is_pin16(&self) -> bool
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Checks if the value of the field is PIN16
pub fn is_pin17(&self) -> bool
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Checks if the value of the field is PIN17
pub fn is_pin18(&self) -> bool
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Checks if the value of the field is PIN18
pub fn is_pin19(&self) -> bool
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Checks if the value of the field is PIN19
pub fn is_temp(&self) -> bool
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Checks if the value of the field is TEMP
pub fn is_bandgap(&self) -> bool
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Checks if the value of the field is BANDGAP
pub fn is_scaledcorevcc(&self) -> bool
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Checks if the value of the field is SCALEDCOREVCC
pub fn is_scalediovcc(&self) -> bool
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Checks if the value of the field is SCALEDIOVCC
pub fn is_dac(&self) -> bool
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Checks if the value of the field is DAC
impl R<u8, MUXNEG_A>
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pub fn variant(&self) -> Variant<u8, MUXNEG_A>
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Get enumerated values variant
pub fn is_pin0(&self) -> bool
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Checks if the value of the field is PIN0
pub fn is_pin1(&self) -> bool
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Checks if the value of the field is PIN1
pub fn is_pin2(&self) -> bool
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Checks if the value of the field is PIN2
pub fn is_pin3(&self) -> bool
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Checks if the value of the field is PIN3
pub fn is_pin4(&self) -> bool
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Checks if the value of the field is PIN4
pub fn is_pin5(&self) -> bool
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Checks if the value of the field is PIN5
pub fn is_pin6(&self) -> bool
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Checks if the value of the field is PIN6
pub fn is_pin7(&self) -> bool
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Checks if the value of the field is PIN7
pub fn is_gnd(&self) -> bool
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Checks if the value of the field is GND
pub fn is_iognd(&self) -> bool
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Checks if the value of the field is IOGND
impl R<u8, GAIN_A>
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pub fn variant(&self) -> Variant<u8, GAIN_A>
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Get enumerated values variant
pub fn is_1x(&self) -> bool
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Checks if the value of the field is _1X
pub fn is_2x(&self) -> bool
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Checks if the value of the field is _2X
pub fn is_4x(&self) -> bool
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Checks if the value of the field is _4X
pub fn is_8x(&self) -> bool
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Checks if the value of the field is _8X
pub fn is_16x(&self) -> bool
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Checks if the value of the field is _16X
pub fn is_div2(&self) -> bool
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Checks if the value of the field is DIV2
impl R<u32, Reg<u32, _INPUTCTRL>>
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pub fn muxpos(&self) -> MUXPOS_R
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Bits 0:4 - Positive Mux Input Selection
pub fn muxneg(&self) -> MUXNEG_R
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Bits 8:12 - Negative Mux Input Selection
pub fn inputscan(&self) -> INPUTSCAN_R
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Bits 16:19 - Number of Input Channels Included in Scan
pub fn inputoffset(&self) -> INPUTOFFSET_R
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Bits 20:23 - Positive Mux Setting Offset
pub fn gain(&self) -> GAIN_R
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Bits 24:27 - Gain Factor Selection
impl R<u8, Reg<u8, _EVCTRL>>
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pub fn startei(&self) -> STARTEI_R
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Bit 0 - Start Conversion Event In
pub fn syncei(&self) -> SYNCEI_R
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Bit 1 - Synchronization Event In
pub fn resrdyeo(&self) -> RESRDYEO_R
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Bit 4 - Result Ready Event Out
pub fn winmoneo(&self) -> WINMONEO_R
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Bit 5 - Window Monitor Event Out
impl R<u8, Reg<u8, _INTENCLR>>
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pub fn resrdy(&self) -> RESRDY_R
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Bit 0 - Result Ready Interrupt Enable
pub fn overrun(&self) -> OVERRUN_R
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Bit 1 - Overrun Interrupt Enable
pub fn winmon(&self) -> WINMON_R
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Bit 2 - Window Monitor Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
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Bit 3 - Synchronization Ready Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
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pub fn resrdy(&self) -> RESRDY_R
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Bit 0 - Result Ready Interrupt Enable
pub fn overrun(&self) -> OVERRUN_R
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Bit 1 - Overrun Interrupt Enable
pub fn winmon(&self) -> WINMON_R
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Bit 2 - Window Monitor Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
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Bit 3 - Synchronization Ready Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
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pub fn resrdy(&self) -> RESRDY_R
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Bit 0 - Result Ready
pub fn overrun(&self) -> OVERRUN_R
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Bit 1 - Overrun
pub fn winmon(&self) -> WINMON_R
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Bit 2 - Window Monitor
pub fn syncrdy(&self) -> SYNCRDY_R
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Bit 3 - Synchronization Ready
impl R<u8, Reg<u8, _STATUS>>
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pub fn syncbusy(&self) -> SYNCBUSY_R
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Bit 7 - Synchronization Busy
impl R<u16, Reg<u16, _RESULT>>
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impl R<u16, Reg<u16, _WINLT>>
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impl R<u16, Reg<u16, _WINUT>>
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impl R<u16, Reg<u16, _GAINCORR>>
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pub fn gaincorr(&self) -> GAINCORR_R
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Bits 0:11 - Gain Correction Value
impl R<u16, Reg<u16, _OFFSETCORR>>
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pub fn offsetcorr(&self) -> OFFSETCORR_R
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Bits 0:11 - Offset Correction Value
impl R<u16, Reg<u16, _CALIB>>
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pub fn linearity_cal(&self) -> LINEARITY_CAL_R
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Bits 0:7 - Linearity Calibration Value
pub fn bias_cal(&self) -> BIAS_CAL_R
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Bits 8:10 - Bias Calibration Value
impl R<u8, Reg<u8, _DBGCTRL>>
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impl R<u8, Reg<u8, _CTRLA>>
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pub fn swrst(&self) -> SWRST_R
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Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
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Bit 1 - Enable
pub fn runstdby(&self) -> RUNSTDBY_R
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Bit 2 - Run in Standby
impl R<u8, REFSEL_A>
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pub fn variant(&self) -> Variant<u8, REFSEL_A>
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Get enumerated values variant
pub fn is_int1v(&self) -> bool
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Checks if the value of the field is INT1V
pub fn is_avcc(&self) -> bool
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Checks if the value of the field is AVCC
pub fn is_vrefp(&self) -> bool
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Checks if the value of the field is VREFP
impl R<u8, Reg<u8, _CTRLB>>
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pub fn eoen(&self) -> EOEN_R
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Bit 0 - External Output Enable
pub fn ioen(&self) -> IOEN_R
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Bit 1 - Internal Output Enable
pub fn leftadj(&self) -> LEFTADJ_R
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Bit 2 - Left Adjusted Data
pub fn vpd(&self) -> VPD_R
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Bit 3 - Voltage Pump Disable
pub fn bdwp(&self) -> BDWP_R
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Bit 4 - Bypass DATABUF Write Protection
pub fn refsel(&self) -> REFSEL_R
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Bits 6:7 - Reference Selection
impl R<u8, Reg<u8, _EVCTRL>>
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pub fn startei(&self) -> STARTEI_R
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Bit 0 - Start Conversion Event Input
pub fn emptyeo(&self) -> EMPTYEO_R
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Bit 1 - Data Buffer Empty Event Output
impl R<u8, Reg<u8, _INTENCLR>>
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pub fn underrun(&self) -> UNDERRUN_R
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Bit 0 - Underrun Interrupt Enable
pub fn empty(&self) -> EMPTY_R
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Bit 1 - Data Buffer Empty Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
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Bit 2 - Synchronization Ready Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
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pub fn underrun(&self) -> UNDERRUN_R
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Bit 0 - Underrun Interrupt Enable
pub fn empty(&self) -> EMPTY_R
[src]
Bit 1 - Data Buffer Empty Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 2 - Synchronization Ready Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn underrun(&self) -> UNDERRUN_R
[src]
Bit 0 - Underrun
pub fn empty(&self) -> EMPTY_R
[src]
Bit 1 - Data Buffer Empty
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 2 - Synchronization Ready
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy Status
impl R<u16, Reg<u16, _DATA>>
[src]
impl R<u16, Reg<u16, _DATABUF>>
[src]
impl R<u16, Reg<u16, _CTRL>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn dmaenable(&self) -> DMAENABLE_R
[src]
Bit 1 - DMA Enable
pub fn crcenable(&self) -> CRCENABLE_R
[src]
Bit 2 - CRC Enable
pub fn lvlen0(&self) -> LVLEN0_R
[src]
Bit 8 - Priority Level 0 Enable
pub fn lvlen1(&self) -> LVLEN1_R
[src]
Bit 9 - Priority Level 1 Enable
pub fn lvlen2(&self) -> LVLEN2_R
[src]
Bit 10 - Priority Level 2 Enable
pub fn lvlen3(&self) -> LVLEN3_R
[src]
Bit 11 - Priority Level 3 Enable
impl R<u8, CRCBEATSIZE_A>
[src]
pub fn variant(&self) -> Variant<u8, CRCBEATSIZE_A>
[src]
Get enumerated values variant
pub fn is_byte(&self) -> bool
[src]
Checks if the value of the field is BYTE
pub fn is_hword(&self) -> bool
[src]
Checks if the value of the field is HWORD
pub fn is_word(&self) -> bool
[src]
Checks if the value of the field is WORD
impl R<u8, CRCPOLY_A>
[src]
pub fn variant(&self) -> Variant<u8, CRCPOLY_A>
[src]
Get enumerated values variant
pub fn is_crc16(&self) -> bool
[src]
Checks if the value of the field is CRC16
pub fn is_crc32(&self) -> bool
[src]
Checks if the value of the field is CRC32
impl R<u8, CRCSRC_A>
[src]
pub fn variant(&self) -> Variant<u8, CRCSRC_A>
[src]
Get enumerated values variant
pub fn is_noact(&self) -> bool
[src]
Checks if the value of the field is NOACT
pub fn is_io(&self) -> bool
[src]
Checks if the value of the field is IO
impl R<u16, Reg<u16, _CRCCTRL>>
[src]
pub fn crcbeatsize(&self) -> CRCBEATSIZE_R
[src]
Bits 0:1 - CRC Beat Size
pub fn crcpoly(&self) -> CRCPOLY_R
[src]
Bits 2:3 - CRC Polynomial Type
pub fn crcsrc(&self) -> CRCSRC_R
[src]
Bits 8:13 - CRC Input Source
impl R<u32, Reg<u32, _CRCDATAIN>>
[src]
pub fn crcdatain(&self) -> CRCDATAIN_R
[src]
Bits 0:31 - CRC Data Input
impl R<u32, Reg<u32, _CRCCHKSUM>>
[src]
pub fn crcchksum(&self) -> CRCCHKSUM_R
[src]
Bits 0:31 - CRC Checksum
impl R<u8, Reg<u8, _CRCSTATUS>>
[src]
pub fn crcbusy(&self) -> CRCBUSY_R
[src]
Bit 0 - CRC Module Busy
pub fn crczero(&self) -> CRCZERO_R
[src]
Bit 1 - CRC Zero
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, WRBQOS_A>
[src]
pub fn variant(&self) -> WRBQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, FQOS_A>
[src]
pub fn variant(&self) -> FQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, DQOS_A>
[src]
pub fn variant(&self) -> DQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, Reg<u8, _QOSCTRL>>
[src]
pub fn wrbqos(&self) -> WRBQOS_R
[src]
Bits 0:1 - Write-Back Quality of Service
pub fn fqos(&self) -> FQOS_R
[src]
Bits 2:3 - Fetch Quality of Service
pub fn dqos(&self) -> DQOS_R
[src]
Bits 4:5 - Data Transfer Quality of Service
impl R<u32, Reg<u32, _SWTRIGCTRL>>
[src]
pub fn swtrig0(&self) -> SWTRIG0_R
[src]
Bit 0 - Channel 0 Software Trigger
pub fn swtrig1(&self) -> SWTRIG1_R
[src]
Bit 1 - Channel 1 Software Trigger
pub fn swtrig2(&self) -> SWTRIG2_R
[src]
Bit 2 - Channel 2 Software Trigger
pub fn swtrig3(&self) -> SWTRIG3_R
[src]
Bit 3 - Channel 3 Software Trigger
pub fn swtrig4(&self) -> SWTRIG4_R
[src]
Bit 4 - Channel 4 Software Trigger
pub fn swtrig5(&self) -> SWTRIG5_R
[src]
Bit 5 - Channel 5 Software Trigger
pub fn swtrig6(&self) -> SWTRIG6_R
[src]
Bit 6 - Channel 6 Software Trigger
pub fn swtrig7(&self) -> SWTRIG7_R
[src]
Bit 7 - Channel 7 Software Trigger
pub fn swtrig8(&self) -> SWTRIG8_R
[src]
Bit 8 - Channel 8 Software Trigger
pub fn swtrig9(&self) -> SWTRIG9_R
[src]
Bit 9 - Channel 9 Software Trigger
pub fn swtrig10(&self) -> SWTRIG10_R
[src]
Bit 10 - Channel 10 Software Trigger
pub fn swtrig11(&self) -> SWTRIG11_R
[src]
Bit 11 - Channel 11 Software Trigger
impl R<u32, Reg<u32, _PRICTRL0>>
[src]
pub fn lvlpri0(&self) -> LVLPRI0_R
[src]
Bits 0:3 - Level 0 Channel Priority Number
pub fn rrlvlen0(&self) -> RRLVLEN0_R
[src]
Bit 7 - Level 0 Round-Robin Scheduling Enable
pub fn lvlpri1(&self) -> LVLPRI1_R
[src]
Bits 8:11 - Level 1 Channel Priority Number
pub fn rrlvlen1(&self) -> RRLVLEN1_R
[src]
Bit 15 - Level 1 Round-Robin Scheduling Enable
pub fn lvlpri2(&self) -> LVLPRI2_R
[src]
Bits 16:19 - Level 2 Channel Priority Number
pub fn rrlvlen2(&self) -> RRLVLEN2_R
[src]
Bit 23 - Level 2 Round-Robin Scheduling Enable
pub fn lvlpri3(&self) -> LVLPRI3_R
[src]
Bits 24:27 - Level 3 Channel Priority Number
pub fn rrlvlen3(&self) -> RRLVLEN3_R
[src]
Bit 31 - Level 3 Round-Robin Scheduling Enable
impl R<u16, Reg<u16, _INTPEND>>
[src]
pub fn id(&self) -> ID_R
[src]
Bits 0:3 - Channel ID
pub fn terr(&self) -> TERR_R
[src]
Bit 8 - Transfer Error
pub fn tcmpl(&self) -> TCMPL_R
[src]
Bit 9 - Transfer Complete
pub fn susp(&self) -> SUSP_R
[src]
Bit 10 - Channel Suspend
pub fn ferr(&self) -> FERR_R
[src]
Bit 13 - Fetch Error
pub fn busy(&self) -> BUSY_R
[src]
Bit 14 - Busy
pub fn pend(&self) -> PEND_R
[src]
Bit 15 - Pending
impl R<u32, Reg<u32, _INTSTATUS>>
[src]
pub fn chint0(&self) -> CHINT0_R
[src]
Bit 0 - Channel 0 Pending Interrupt
pub fn chint1(&self) -> CHINT1_R
[src]
Bit 1 - Channel 1 Pending Interrupt
pub fn chint2(&self) -> CHINT2_R
[src]
Bit 2 - Channel 2 Pending Interrupt
pub fn chint3(&self) -> CHINT3_R
[src]
Bit 3 - Channel 3 Pending Interrupt
pub fn chint4(&self) -> CHINT4_R
[src]
Bit 4 - Channel 4 Pending Interrupt
pub fn chint5(&self) -> CHINT5_R
[src]
Bit 5 - Channel 5 Pending Interrupt
pub fn chint6(&self) -> CHINT6_R
[src]
Bit 6 - Channel 6 Pending Interrupt
pub fn chint7(&self) -> CHINT7_R
[src]
Bit 7 - Channel 7 Pending Interrupt
pub fn chint8(&self) -> CHINT8_R
[src]
Bit 8 - Channel 8 Pending Interrupt
pub fn chint9(&self) -> CHINT9_R
[src]
Bit 9 - Channel 9 Pending Interrupt
pub fn chint10(&self) -> CHINT10_R
[src]
Bit 10 - Channel 10 Pending Interrupt
pub fn chint11(&self) -> CHINT11_R
[src]
Bit 11 - Channel 11 Pending Interrupt
impl R<u32, Reg<u32, _BUSYCH>>
[src]
pub fn busych0(&self) -> BUSYCH0_R
[src]
Bit 0 - Busy Channel 0
pub fn busych1(&self) -> BUSYCH1_R
[src]
Bit 1 - Busy Channel 1
pub fn busych2(&self) -> BUSYCH2_R
[src]
Bit 2 - Busy Channel 2
pub fn busych3(&self) -> BUSYCH3_R
[src]
Bit 3 - Busy Channel 3
pub fn busych4(&self) -> BUSYCH4_R
[src]
Bit 4 - Busy Channel 4
pub fn busych5(&self) -> BUSYCH5_R
[src]
Bit 5 - Busy Channel 5
pub fn busych6(&self) -> BUSYCH6_R
[src]
Bit 6 - Busy Channel 6
pub fn busych7(&self) -> BUSYCH7_R
[src]
Bit 7 - Busy Channel 7
pub fn busych8(&self) -> BUSYCH8_R
[src]
Bit 8 - Busy Channel 8
pub fn busych9(&self) -> BUSYCH9_R
[src]
Bit 9 - Busy Channel 9
pub fn busych10(&self) -> BUSYCH10_R
[src]
Bit 10 - Busy Channel 10
pub fn busych11(&self) -> BUSYCH11_R
[src]
Bit 11 - Busy Channel 11
impl R<u32, Reg<u32, _PENDCH>>
[src]
pub fn pendch0(&self) -> PENDCH0_R
[src]
Bit 0 - Pending Channel 0
pub fn pendch1(&self) -> PENDCH1_R
[src]
Bit 1 - Pending Channel 1
pub fn pendch2(&self) -> PENDCH2_R
[src]
Bit 2 - Pending Channel 2
pub fn pendch3(&self) -> PENDCH3_R
[src]
Bit 3 - Pending Channel 3
pub fn pendch4(&self) -> PENDCH4_R
[src]
Bit 4 - Pending Channel 4
pub fn pendch5(&self) -> PENDCH5_R
[src]
Bit 5 - Pending Channel 5
pub fn pendch6(&self) -> PENDCH6_R
[src]
Bit 6 - Pending Channel 6
pub fn pendch7(&self) -> PENDCH7_R
[src]
Bit 7 - Pending Channel 7
pub fn pendch8(&self) -> PENDCH8_R
[src]
Bit 8 - Pending Channel 8
pub fn pendch9(&self) -> PENDCH9_R
[src]
Bit 9 - Pending Channel 9
pub fn pendch10(&self) -> PENDCH10_R
[src]
Bit 10 - Pending Channel 10
pub fn pendch11(&self) -> PENDCH11_R
[src]
Bit 11 - Pending Channel 11
impl R<u32, Reg<u32, _ACTIVE>>
[src]
pub fn lvlex0(&self) -> LVLEX0_R
[src]
Bit 0 - Level 0 Channel Trigger Request Executing
pub fn lvlex1(&self) -> LVLEX1_R
[src]
Bit 1 - Level 1 Channel Trigger Request Executing
pub fn lvlex2(&self) -> LVLEX2_R
[src]
Bit 2 - Level 2 Channel Trigger Request Executing
pub fn lvlex3(&self) -> LVLEX3_R
[src]
Bit 3 - Level 3 Channel Trigger Request Executing
pub fn id(&self) -> ID_R
[src]
Bits 8:12 - Active Channel ID
pub fn abusy(&self) -> ABUSY_R
[src]
Bit 15 - Active Channel Busy
pub fn btcnt(&self) -> BTCNT_R
[src]
Bits 16:31 - Active Channel Block Transfer Count
impl R<u32, Reg<u32, _BASEADDR>>
[src]
pub fn baseaddr(&self) -> BASEADDR_R
[src]
Bits 0:31 - Descriptor Memory Base Address
impl R<u32, Reg<u32, _WRBADDR>>
[src]
impl R<u8, Reg<u8, _CHID>>
[src]
impl R<u8, Reg<u8, _CHCTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Channel Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Channel Enable
impl R<u8, EVACT_A>
[src]
pub fn variant(&self) -> Variant<u8, EVACT_A>
[src]
Get enumerated values variant
pub fn is_noact(&self) -> bool
[src]
Checks if the value of the field is NOACT
pub fn is_trig(&self) -> bool
[src]
Checks if the value of the field is TRIG
pub fn is_ctrig(&self) -> bool
[src]
Checks if the value of the field is CTRIG
pub fn is_cblock(&self) -> bool
[src]
Checks if the value of the field is CBLOCK
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
pub fn is_resume(&self) -> bool
[src]
Checks if the value of the field is RESUME
pub fn is_sskip(&self) -> bool
[src]
Checks if the value of the field is SSKIP
impl R<u8, LVL_A>
[src]
pub fn variant(&self) -> LVL_A
[src]
Get enumerated values variant
pub fn is_lvl0(&self) -> bool
[src]
Checks if the value of the field is LVL0
pub fn is_lvl1(&self) -> bool
[src]
Checks if the value of the field is LVL1
pub fn is_lvl2(&self) -> bool
[src]
Checks if the value of the field is LVL2
pub fn is_lvl3(&self) -> bool
[src]
Checks if the value of the field is LVL3
impl R<u8, TRIGSRC_A>
[src]
pub fn variant(&self) -> Variant<u8, TRIGSRC_A>
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
impl R<u8, TRIGACT_A>
[src]
pub fn variant(&self) -> Variant<u8, TRIGACT_A>
[src]
Get enumerated values variant
pub fn is_block(&self) -> bool
[src]
Checks if the value of the field is BLOCK
pub fn is_beat(&self) -> bool
[src]
Checks if the value of the field is BEAT
pub fn is_transaction(&self) -> bool
[src]
Checks if the value of the field is TRANSACTION
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_noact(&self) -> bool
[src]
Checks if the value of the field is NOACT
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
pub fn is_resume(&self) -> bool
[src]
Checks if the value of the field is RESUME
impl R<u32, Reg<u32, _CHCTRLB>>
[src]
pub fn evact(&self) -> EVACT_R
[src]
Bits 0:2 - Event Input Action
pub fn evie(&self) -> EVIE_R
[src]
Bit 3 - Channel Event Input Enable
pub fn evoe(&self) -> EVOE_R
[src]
Bit 4 - Channel Event Output Enable
pub fn lvl(&self) -> LVL_R
[src]
Bits 5:6 - Channel Arbitration Level
pub fn trigsrc(&self) -> TRIGSRC_R
[src]
Bits 8:13 - Trigger Source
pub fn trigact(&self) -> TRIGACT_R
[src]
Bits 22:23 - Trigger Action
pub fn cmd(&self) -> CMD_R
[src]
Bits 24:25 - Software Command
impl R<u8, Reg<u8, _CHINTENCLR>>
[src]
pub fn terr(&self) -> TERR_R
[src]
Bit 0 - Channel Transfer Error Interrupt Enable
pub fn tcmpl(&self) -> TCMPL_R
[src]
Bit 1 - Channel Transfer Complete Interrupt Enable
pub fn susp(&self) -> SUSP_R
[src]
Bit 2 - Channel Suspend Interrupt Enable
impl R<u8, Reg<u8, _CHINTENSET>>
[src]
pub fn terr(&self) -> TERR_R
[src]
Bit 0 - Channel Transfer Error Interrupt Enable
pub fn tcmpl(&self) -> TCMPL_R
[src]
Bit 1 - Channel Transfer Complete Interrupt Enable
pub fn susp(&self) -> SUSP_R
[src]
Bit 2 - Channel Suspend Interrupt Enable
impl R<u8, Reg<u8, _CHINTFLAG>>
[src]
pub fn terr(&self) -> TERR_R
[src]
Bit 0 - Channel Transfer Error
pub fn tcmpl(&self) -> TCMPL_R
[src]
Bit 1 - Channel Transfer Complete
pub fn susp(&self) -> SUSP_R
[src]
Bit 2 - Channel Suspend
impl R<u8, Reg<u8, _CHSTATUS>>
[src]
pub fn pend(&self) -> PEND_R
[src]
Bit 0 - Channel Pending
pub fn busy(&self) -> BUSY_R
[src]
Bit 1 - Channel Busy
pub fn ferr(&self) -> FERR_R
[src]
Bit 2 - Channel Fetch Error
impl R<u8, Reg<u8, _STATUSA>>
[src]
pub fn done(&self) -> DONE_R
[src]
Bit 0 - Done
pub fn crstext(&self) -> CRSTEXT_R
[src]
Bit 1 - CPU Reset Phase Extension
pub fn berr(&self) -> BERR_R
[src]
Bit 2 - Bus Error
pub fn fail(&self) -> FAIL_R
[src]
Bit 3 - Failure
pub fn perr(&self) -> PERR_R
[src]
Bit 4 - Protection Error
impl R<u8, Reg<u8, _STATUSB>>
[src]
pub fn prot(&self) -> PROT_R
[src]
Bit 0 - Protected
pub fn dbgpres(&self) -> DBGPRES_R
[src]
Bit 1 - Debugger Present
pub fn dccd0(&self) -> DCCD0_R
[src]
Bit 2 - Debug Communication Channel 0 Dirty
pub fn dccd1(&self) -> DCCD1_R
[src]
Bit 3 - Debug Communication Channel 1 Dirty
pub fn hpe(&self) -> HPE_R
[src]
Bit 4 - Hot-Plugging Enable
impl R<u32, Reg<u32, _ADDR>>
[src]
impl R<u32, Reg<u32, _LENGTH>>
[src]
impl R<u32, Reg<u32, _DATA>>
[src]
impl R<u32, Reg<u32, _DCC>>
[src]
impl R<u32, Reg<u32, _DID>>
[src]
pub fn devsel(&self) -> DEVSEL_R
[src]
Bits 0:7 - Device Select
pub fn revision(&self) -> REVISION_R
[src]
Bits 8:11 - Revision
pub fn die(&self) -> DIE_R
[src]
Bits 12:15 - Die Identification
pub fn series(&self) -> SERIES_R
[src]
Bits 16:21 - Product Series
pub fn family(&self) -> FAMILY_R
[src]
Bits 23:27 - Product Family
pub fn processor(&self) -> PROCESSOR_R
[src]
Bits 28:31 - Processor
impl R<u32, Reg<u32, _ENTRY>>
[src]
pub fn epres(&self) -> EPRES_R
[src]
Bit 0 - Entry Present
pub fn fmt(&self) -> FMT_R
[src]
Bit 1 - Format
pub fn addoff(&self) -> ADDOFF_R
[src]
Bits 12:31 - Address Offset
impl R<u32, Reg<u32, _END>>
[src]
impl R<u32, Reg<u32, _MEMTYPE>>
[src]
impl R<u32, Reg<u32, _PID4>>
[src]
pub fn jepcc(&self) -> JEPCC_R
[src]
Bits 0:3 - JEP-106 Continuation Code
pub fn fkbc(&self) -> FKBC_R
[src]
Bits 4:7 - 4KB Count
impl R<u32, Reg<u32, _PID0>>
[src]
impl R<u32, Reg<u32, _PID1>>
[src]
pub fn partnbh(&self) -> PARTNBH_R
[src]
Bits 0:3 - Part Number High
pub fn jepidcl(&self) -> JEPIDCL_R
[src]
Bits 4:7 - Low part of the JEP-106 Identity Code
impl R<u32, Reg<u32, _PID2>>
[src]
pub fn jepidch(&self) -> JEPIDCH_R
[src]
Bits 0:2 - JEP-106 Identity Code High
pub fn jepu(&self) -> JEPU_R
[src]
Bit 3 - JEP-106 Identity Code is used
pub fn revision(&self) -> REVISION_R
[src]
Bits 4:7 - Revision Number
impl R<u32, Reg<u32, _PID3>>
[src]
pub fn cusmod(&self) -> CUSMOD_R
[src]
Bits 0:3 - ARM CUSMOD
pub fn revand(&self) -> REVAND_R
[src]
Bits 4:7 - Revision Number
impl R<u32, Reg<u32, _CID0>>
[src]
pub fn preambleb0(&self) -> PREAMBLEB0_R
[src]
Bits 0:7 - Preamble Byte 0
impl R<u32, Reg<u32, _CID1>>
[src]
pub fn preamble(&self) -> PREAMBLE_R
[src]
Bits 0:3 - Preamble
pub fn cclass(&self) -> CCLASS_R
[src]
Bits 4:7 - Component Class
impl R<u32, Reg<u32, _CID2>>
[src]
pub fn preambleb2(&self) -> PREAMBLEB2_R
[src]
Bits 0:7 - Preamble Byte 2
impl R<u32, Reg<u32, _CID3>>
[src]
pub fn preambleb3(&self) -> PREAMBLEB3_R
[src]
Bits 0:7 - Preamble Byte 3
impl R<u8, Reg<u8, _CTRL>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u8, NMISENSE_A>
[src]
pub fn variant(&self) -> Variant<u8, NMISENSE_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, Reg<u8, _NMICTRL>>
[src]
pub fn nmisense(&self) -> NMISENSE_R
[src]
Bits 0:2 - Non-Maskable Interrupt Sense
pub fn nmifilten(&self) -> NMIFILTEN_R
[src]
Bit 3 - Non-Maskable Interrupt Filter Enable
impl R<u8, Reg<u8, _NMIFLAG>>
[src]
impl R<u32, Reg<u32, _EVCTRL>>
[src]
pub fn extinteo0(&self) -> EXTINTEO0_R
[src]
Bit 0 - External Interrupt 0 Event Output Enable
pub fn extinteo1(&self) -> EXTINTEO1_R
[src]
Bit 1 - External Interrupt 1 Event Output Enable
pub fn extinteo2(&self) -> EXTINTEO2_R
[src]
Bit 2 - External Interrupt 2 Event Output Enable
pub fn extinteo3(&self) -> EXTINTEO3_R
[src]
Bit 3 - External Interrupt 3 Event Output Enable
pub fn extinteo4(&self) -> EXTINTEO4_R
[src]
Bit 4 - External Interrupt 4 Event Output Enable
pub fn extinteo5(&self) -> EXTINTEO5_R
[src]
Bit 5 - External Interrupt 5 Event Output Enable
pub fn extinteo6(&self) -> EXTINTEO6_R
[src]
Bit 6 - External Interrupt 6 Event Output Enable
pub fn extinteo7(&self) -> EXTINTEO7_R
[src]
Bit 7 - External Interrupt 7 Event Output Enable
pub fn extinteo8(&self) -> EXTINTEO8_R
[src]
Bit 8 - External Interrupt 8 Event Output Enable
pub fn extinteo9(&self) -> EXTINTEO9_R
[src]
Bit 9 - External Interrupt 9 Event Output Enable
pub fn extinteo10(&self) -> EXTINTEO10_R
[src]
Bit 10 - External Interrupt 10 Event Output Enable
pub fn extinteo11(&self) -> EXTINTEO11_R
[src]
Bit 11 - External Interrupt 11 Event Output Enable
pub fn extinteo12(&self) -> EXTINTEO12_R
[src]
Bit 12 - External Interrupt 12 Event Output Enable
pub fn extinteo13(&self) -> EXTINTEO13_R
[src]
Bit 13 - External Interrupt 13 Event Output Enable
pub fn extinteo14(&self) -> EXTINTEO14_R
[src]
Bit 14 - External Interrupt 14 Event Output Enable
pub fn extinteo15(&self) -> EXTINTEO15_R
[src]
Bit 15 - External Interrupt 15 Event Output Enable
impl R<u32, Reg<u32, _INTENCLR>>
[src]
pub fn extint0(&self) -> EXTINT0_R
[src]
Bit 0 - External Interrupt 0 Enable
pub fn extint1(&self) -> EXTINT1_R
[src]
Bit 1 - External Interrupt 1 Enable
pub fn extint2(&self) -> EXTINT2_R
[src]
Bit 2 - External Interrupt 2 Enable
pub fn extint3(&self) -> EXTINT3_R
[src]
Bit 3 - External Interrupt 3 Enable
pub fn extint4(&self) -> EXTINT4_R
[src]
Bit 4 - External Interrupt 4 Enable
pub fn extint5(&self) -> EXTINT5_R
[src]
Bit 5 - External Interrupt 5 Enable
pub fn extint6(&self) -> EXTINT6_R
[src]
Bit 6 - External Interrupt 6 Enable
pub fn extint7(&self) -> EXTINT7_R
[src]
Bit 7 - External Interrupt 7 Enable
pub fn extint8(&self) -> EXTINT8_R
[src]
Bit 8 - External Interrupt 8 Enable
pub fn extint9(&self) -> EXTINT9_R
[src]
Bit 9 - External Interrupt 9 Enable
pub fn extint10(&self) -> EXTINT10_R
[src]
Bit 10 - External Interrupt 10 Enable
pub fn extint11(&self) -> EXTINT11_R
[src]
Bit 11 - External Interrupt 11 Enable
pub fn extint12(&self) -> EXTINT12_R
[src]
Bit 12 - External Interrupt 12 Enable
pub fn extint13(&self) -> EXTINT13_R
[src]
Bit 13 - External Interrupt 13 Enable
pub fn extint14(&self) -> EXTINT14_R
[src]
Bit 14 - External Interrupt 14 Enable
pub fn extint15(&self) -> EXTINT15_R
[src]
Bit 15 - External Interrupt 15 Enable
impl R<u32, Reg<u32, _INTENSET>>
[src]
pub fn extint0(&self) -> EXTINT0_R
[src]
Bit 0 - External Interrupt 0 Enable
pub fn extint1(&self) -> EXTINT1_R
[src]
Bit 1 - External Interrupt 1 Enable
pub fn extint2(&self) -> EXTINT2_R
[src]
Bit 2 - External Interrupt 2 Enable
pub fn extint3(&self) -> EXTINT3_R
[src]
Bit 3 - External Interrupt 3 Enable
pub fn extint4(&self) -> EXTINT4_R
[src]
Bit 4 - External Interrupt 4 Enable
pub fn extint5(&self) -> EXTINT5_R
[src]
Bit 5 - External Interrupt 5 Enable
pub fn extint6(&self) -> EXTINT6_R
[src]
Bit 6 - External Interrupt 6 Enable
pub fn extint7(&self) -> EXTINT7_R
[src]
Bit 7 - External Interrupt 7 Enable
pub fn extint8(&self) -> EXTINT8_R
[src]
Bit 8 - External Interrupt 8 Enable
pub fn extint9(&self) -> EXTINT9_R
[src]
Bit 9 - External Interrupt 9 Enable
pub fn extint10(&self) -> EXTINT10_R
[src]
Bit 10 - External Interrupt 10 Enable
pub fn extint11(&self) -> EXTINT11_R
[src]
Bit 11 - External Interrupt 11 Enable
pub fn extint12(&self) -> EXTINT12_R
[src]
Bit 12 - External Interrupt 12 Enable
pub fn extint13(&self) -> EXTINT13_R
[src]
Bit 13 - External Interrupt 13 Enable
pub fn extint14(&self) -> EXTINT14_R
[src]
Bit 14 - External Interrupt 14 Enable
pub fn extint15(&self) -> EXTINT15_R
[src]
Bit 15 - External Interrupt 15 Enable
impl R<u32, Reg<u32, _INTFLAG>>
[src]
pub fn extint0(&self) -> EXTINT0_R
[src]
Bit 0 - External Interrupt 0
pub fn extint1(&self) -> EXTINT1_R
[src]
Bit 1 - External Interrupt 1
pub fn extint2(&self) -> EXTINT2_R
[src]
Bit 2 - External Interrupt 2
pub fn extint3(&self) -> EXTINT3_R
[src]
Bit 3 - External Interrupt 3
pub fn extint4(&self) -> EXTINT4_R
[src]
Bit 4 - External Interrupt 4
pub fn extint5(&self) -> EXTINT5_R
[src]
Bit 5 - External Interrupt 5
pub fn extint6(&self) -> EXTINT6_R
[src]
Bit 6 - External Interrupt 6
pub fn extint7(&self) -> EXTINT7_R
[src]
Bit 7 - External Interrupt 7
pub fn extint8(&self) -> EXTINT8_R
[src]
Bit 8 - External Interrupt 8
pub fn extint9(&self) -> EXTINT9_R
[src]
Bit 9 - External Interrupt 9
pub fn extint10(&self) -> EXTINT10_R
[src]
Bit 10 - External Interrupt 10
pub fn extint11(&self) -> EXTINT11_R
[src]
Bit 11 - External Interrupt 11
pub fn extint12(&self) -> EXTINT12_R
[src]
Bit 12 - External Interrupt 12
pub fn extint13(&self) -> EXTINT13_R
[src]
Bit 13 - External Interrupt 13
pub fn extint14(&self) -> EXTINT14_R
[src]
Bit 14 - External Interrupt 14
pub fn extint15(&self) -> EXTINT15_R
[src]
Bit 15 - External Interrupt 15
impl R<u32, Reg<u32, _WAKEUP>>
[src]
pub fn wakeupen0(&self) -> WAKEUPEN0_R
[src]
Bit 0 - External Interrupt 0 Wake-up Enable
pub fn wakeupen1(&self) -> WAKEUPEN1_R
[src]
Bit 1 - External Interrupt 1 Wake-up Enable
pub fn wakeupen2(&self) -> WAKEUPEN2_R
[src]
Bit 2 - External Interrupt 2 Wake-up Enable
pub fn wakeupen3(&self) -> WAKEUPEN3_R
[src]
Bit 3 - External Interrupt 3 Wake-up Enable
pub fn wakeupen4(&self) -> WAKEUPEN4_R
[src]
Bit 4 - External Interrupt 4 Wake-up Enable
pub fn wakeupen5(&self) -> WAKEUPEN5_R
[src]
Bit 5 - External Interrupt 5 Wake-up Enable
pub fn wakeupen6(&self) -> WAKEUPEN6_R
[src]
Bit 6 - External Interrupt 6 Wake-up Enable
pub fn wakeupen7(&self) -> WAKEUPEN7_R
[src]
Bit 7 - External Interrupt 7 Wake-up Enable
pub fn wakeupen8(&self) -> WAKEUPEN8_R
[src]
Bit 8 - External Interrupt 8 Wake-up Enable
pub fn wakeupen9(&self) -> WAKEUPEN9_R
[src]
Bit 9 - External Interrupt 9 Wake-up Enable
pub fn wakeupen10(&self) -> WAKEUPEN10_R
[src]
Bit 10 - External Interrupt 10 Wake-up Enable
pub fn wakeupen11(&self) -> WAKEUPEN11_R
[src]
Bit 11 - External Interrupt 11 Wake-up Enable
pub fn wakeupen12(&self) -> WAKEUPEN12_R
[src]
Bit 12 - External Interrupt 12 Wake-up Enable
pub fn wakeupen13(&self) -> WAKEUPEN13_R
[src]
Bit 13 - External Interrupt 13 Wake-up Enable
pub fn wakeupen14(&self) -> WAKEUPEN14_R
[src]
Bit 14 - External Interrupt 14 Wake-up Enable
pub fn wakeupen15(&self) -> WAKEUPEN15_R
[src]
Bit 15 - External Interrupt 15 Wake-up Enable
impl R<u8, SENSE0_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE0_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE1_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE1_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE2_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE2_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE3_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE3_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE4_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE4_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE5_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE5_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE6_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE6_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u8, SENSE7_A>
[src]
pub fn variant(&self) -> Variant<u8, SENSE7_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
impl R<u32, Reg<u32, _CONFIG>>
[src]
pub fn sense0(&self) -> SENSE0_R
[src]
Bits 0:2 - Input Sense 0 Configuration
pub fn filten0(&self) -> FILTEN0_R
[src]
Bit 3 - Filter 0 Enable
pub fn sense1(&self) -> SENSE1_R
[src]
Bits 4:6 - Input Sense 1 Configuration
pub fn filten1(&self) -> FILTEN1_R
[src]
Bit 7 - Filter 1 Enable
pub fn sense2(&self) -> SENSE2_R
[src]
Bits 8:10 - Input Sense 2 Configuration
pub fn filten2(&self) -> FILTEN2_R
[src]
Bit 11 - Filter 2 Enable
pub fn sense3(&self) -> SENSE3_R
[src]
Bits 12:14 - Input Sense 3 Configuration
pub fn filten3(&self) -> FILTEN3_R
[src]
Bit 15 - Filter 3 Enable
pub fn sense4(&self) -> SENSE4_R
[src]
Bits 16:18 - Input Sense 4 Configuration
pub fn filten4(&self) -> FILTEN4_R
[src]
Bit 19 - Filter 4 Enable
pub fn sense5(&self) -> SENSE5_R
[src]
Bits 20:22 - Input Sense 5 Configuration
pub fn filten5(&self) -> FILTEN5_R
[src]
Bit 23 - Filter 5 Enable
pub fn sense6(&self) -> SENSE6_R
[src]
Bits 24:26 - Input Sense 6 Configuration
pub fn filten6(&self) -> FILTEN6_R
[src]
Bit 27 - Filter 6 Enable
pub fn sense7(&self) -> SENSE7_R
[src]
Bits 28:30 - Input Sense 7 Configuration
pub fn filten7(&self) -> FILTEN7_R
[src]
Bit 31 - Filter 7 Enable
impl R<u8, PATH_A>
[src]
pub fn variant(&self) -> Variant<u8, PATH_A>
[src]
Get enumerated values variant
pub fn is_synchronous(&self) -> bool
[src]
Checks if the value of the field is SYNCHRONOUS
pub fn is_resynchronized(&self) -> bool
[src]
Checks if the value of the field is RESYNCHRONIZED
pub fn is_asynchronous(&self) -> bool
[src]
Checks if the value of the field is ASYNCHRONOUS
impl R<u8, EDGSEL_A>
[src]
pub fn variant(&self) -> EDGSEL_A
[src]
Get enumerated values variant
pub fn is_no_evt_output(&self) -> bool
[src]
Checks if the value of the field is NO_EVT_OUTPUT
pub fn is_rising_edge(&self) -> bool
[src]
Checks if the value of the field is RISING_EDGE
pub fn is_falling_edge(&self) -> bool
[src]
Checks if the value of the field is FALLING_EDGE
pub fn is_both_edges(&self) -> bool
[src]
Checks if the value of the field is BOTH_EDGES
impl R<u32, Reg<u32, _CHANNEL>>
[src]
pub fn channel(&self) -> CHANNEL_R
[src]
Bits 0:3 - Channel Selection
pub fn swevt(&self) -> SWEVT_R
[src]
Bit 8 - Software Event
pub fn evgen(&self) -> EVGEN_R
[src]
Bits 16:22 - Event Generator Selection
pub fn path(&self) -> PATH_R
[src]
Bits 24:25 - Path Selection
pub fn edgsel(&self) -> EDGSEL_R
[src]
Bits 26:27 - Edge Detection Selection
impl R<u8, CHANNEL_A>
[src]
pub fn variant(&self) -> Variant<u8, CHANNEL_A>
[src]
Get enumerated values variant
pub fn is_0(&self) -> bool
[src]
Checks if the value of the field is _0
impl R<u16, Reg<u16, _USER>>
[src]
pub fn user(&self) -> USER_R
[src]
Bits 0:4 - User Multiplexer Selection
pub fn channel(&self) -> CHANNEL_R
[src]
Bits 8:12 - Channel Event Selection
impl R<u32, Reg<u32, _CHSTATUS>>
[src]
pub fn usrrdy0(&self) -> USRRDY0_R
[src]
Bit 0 - Channel 0 User Ready
pub fn usrrdy1(&self) -> USRRDY1_R
[src]
Bit 1 - Channel 1 User Ready
pub fn usrrdy2(&self) -> USRRDY2_R
[src]
Bit 2 - Channel 2 User Ready
pub fn usrrdy3(&self) -> USRRDY3_R
[src]
Bit 3 - Channel 3 User Ready
pub fn usrrdy4(&self) -> USRRDY4_R
[src]
Bit 4 - Channel 4 User Ready
pub fn usrrdy5(&self) -> USRRDY5_R
[src]
Bit 5 - Channel 5 User Ready
pub fn usrrdy6(&self) -> USRRDY6_R
[src]
Bit 6 - Channel 6 User Ready
pub fn usrrdy7(&self) -> USRRDY7_R
[src]
Bit 7 - Channel 7 User Ready
pub fn chbusy0(&self) -> CHBUSY0_R
[src]
Bit 8 - Channel 0 Busy
pub fn chbusy1(&self) -> CHBUSY1_R
[src]
Bit 9 - Channel 1 Busy
pub fn chbusy2(&self) -> CHBUSY2_R
[src]
Bit 10 - Channel 2 Busy
pub fn chbusy3(&self) -> CHBUSY3_R
[src]
Bit 11 - Channel 3 Busy
pub fn chbusy4(&self) -> CHBUSY4_R
[src]
Bit 12 - Channel 4 Busy
pub fn chbusy5(&self) -> CHBUSY5_R
[src]
Bit 13 - Channel 5 Busy
pub fn chbusy6(&self) -> CHBUSY6_R
[src]
Bit 14 - Channel 6 Busy
pub fn chbusy7(&self) -> CHBUSY7_R
[src]
Bit 15 - Channel 7 Busy
pub fn usrrdy8(&self) -> USRRDY8_R
[src]
Bit 16 - Channel 8 User Ready
pub fn usrrdy9(&self) -> USRRDY9_R
[src]
Bit 17 - Channel 9 User Ready
pub fn usrrdy10(&self) -> USRRDY10_R
[src]
Bit 18 - Channel 10 User Ready
pub fn usrrdy11(&self) -> USRRDY11_R
[src]
Bit 19 - Channel 11 User Ready
pub fn chbusy8(&self) -> CHBUSY8_R
[src]
Bit 24 - Channel 8 Busy
pub fn chbusy9(&self) -> CHBUSY9_R
[src]
Bit 25 - Channel 9 Busy
pub fn chbusy10(&self) -> CHBUSY10_R
[src]
Bit 26 - Channel 10 Busy
pub fn chbusy11(&self) -> CHBUSY11_R
[src]
Bit 27 - Channel 11 Busy
impl R<u32, Reg<u32, _INTENCLR>>
[src]
pub fn ovr0(&self) -> OVR0_R
[src]
Bit 0 - Channel 0 Overrun Interrupt Enable
pub fn ovr1(&self) -> OVR1_R
[src]
Bit 1 - Channel 1 Overrun Interrupt Enable
pub fn ovr2(&self) -> OVR2_R
[src]
Bit 2 - Channel 2 Overrun Interrupt Enable
pub fn ovr3(&self) -> OVR3_R
[src]
Bit 3 - Channel 3 Overrun Interrupt Enable
pub fn ovr4(&self) -> OVR4_R
[src]
Bit 4 - Channel 4 Overrun Interrupt Enable
pub fn ovr5(&self) -> OVR5_R
[src]
Bit 5 - Channel 5 Overrun Interrupt Enable
pub fn ovr6(&self) -> OVR6_R
[src]
Bit 6 - Channel 6 Overrun Interrupt Enable
pub fn ovr7(&self) -> OVR7_R
[src]
Bit 7 - Channel 7 Overrun Interrupt Enable
pub fn evd0(&self) -> EVD0_R
[src]
Bit 8 - Channel 0 Event Detection Interrupt Enable
pub fn evd1(&self) -> EVD1_R
[src]
Bit 9 - Channel 1 Event Detection Interrupt Enable
pub fn evd2(&self) -> EVD2_R
[src]
Bit 10 - Channel 2 Event Detection Interrupt Enable
pub fn evd3(&self) -> EVD3_R
[src]
Bit 11 - Channel 3 Event Detection Interrupt Enable
pub fn evd4(&self) -> EVD4_R
[src]
Bit 12 - Channel 4 Event Detection Interrupt Enable
pub fn evd5(&self) -> EVD5_R
[src]
Bit 13 - Channel 5 Event Detection Interrupt Enable
pub fn evd6(&self) -> EVD6_R
[src]
Bit 14 - Channel 6 Event Detection Interrupt Enable
pub fn evd7(&self) -> EVD7_R
[src]
Bit 15 - Channel 7 Event Detection Interrupt Enable
pub fn ovr8(&self) -> OVR8_R
[src]
Bit 16 - Channel 8 Overrun Interrupt Enable
pub fn ovr9(&self) -> OVR9_R
[src]
Bit 17 - Channel 9 Overrun Interrupt Enable
pub fn ovr10(&self) -> OVR10_R
[src]
Bit 18 - Channel 10 Overrun Interrupt Enable
pub fn ovr11(&self) -> OVR11_R
[src]
Bit 19 - Channel 11 Overrun Interrupt Enable
pub fn evd8(&self) -> EVD8_R
[src]
Bit 24 - Channel 8 Event Detection Interrupt Enable
pub fn evd9(&self) -> EVD9_R
[src]
Bit 25 - Channel 9 Event Detection Interrupt Enable
pub fn evd10(&self) -> EVD10_R
[src]
Bit 26 - Channel 10 Event Detection Interrupt Enable
pub fn evd11(&self) -> EVD11_R
[src]
Bit 27 - Channel 11 Event Detection Interrupt Enable
impl R<u32, Reg<u32, _INTENSET>>
[src]
pub fn ovr0(&self) -> OVR0_R
[src]
Bit 0 - Channel 0 Overrun Interrupt Enable
pub fn ovr1(&self) -> OVR1_R
[src]
Bit 1 - Channel 1 Overrun Interrupt Enable
pub fn ovr2(&self) -> OVR2_R
[src]
Bit 2 - Channel 2 Overrun Interrupt Enable
pub fn ovr3(&self) -> OVR3_R
[src]
Bit 3 - Channel 3 Overrun Interrupt Enable
pub fn ovr4(&self) -> OVR4_R
[src]
Bit 4 - Channel 4 Overrun Interrupt Enable
pub fn ovr5(&self) -> OVR5_R
[src]
Bit 5 - Channel 5 Overrun Interrupt Enable
pub fn ovr6(&self) -> OVR6_R
[src]
Bit 6 - Channel 6 Overrun Interrupt Enable
pub fn ovr7(&self) -> OVR7_R
[src]
Bit 7 - Channel 7 Overrun Interrupt Enable
pub fn evd0(&self) -> EVD0_R
[src]
Bit 8 - Channel 0 Event Detection Interrupt Enable
pub fn evd1(&self) -> EVD1_R
[src]
Bit 9 - Channel 1 Event Detection Interrupt Enable
pub fn evd2(&self) -> EVD2_R
[src]
Bit 10 - Channel 2 Event Detection Interrupt Enable
pub fn evd3(&self) -> EVD3_R
[src]
Bit 11 - Channel 3 Event Detection Interrupt Enable
pub fn evd4(&self) -> EVD4_R
[src]
Bit 12 - Channel 4 Event Detection Interrupt Enable
pub fn evd5(&self) -> EVD5_R
[src]
Bit 13 - Channel 5 Event Detection Interrupt Enable
pub fn evd6(&self) -> EVD6_R
[src]
Bit 14 - Channel 6 Event Detection Interrupt Enable
pub fn evd7(&self) -> EVD7_R
[src]
Bit 15 - Channel 7 Event Detection Interrupt Enable
pub fn ovr8(&self) -> OVR8_R
[src]
Bit 16 - Channel 8 Overrun Interrupt Enable
pub fn ovr9(&self) -> OVR9_R
[src]
Bit 17 - Channel 9 Overrun Interrupt Enable
pub fn ovr10(&self) -> OVR10_R
[src]
Bit 18 - Channel 10 Overrun Interrupt Enable
pub fn ovr11(&self) -> OVR11_R
[src]
Bit 19 - Channel 11 Overrun Interrupt Enable
pub fn evd8(&self) -> EVD8_R
[src]
Bit 24 - Channel 8 Event Detection Interrupt Enable
pub fn evd9(&self) -> EVD9_R
[src]
Bit 25 - Channel 9 Event Detection Interrupt Enable
pub fn evd10(&self) -> EVD10_R
[src]
Bit 26 - Channel 10 Event Detection Interrupt Enable
pub fn evd11(&self) -> EVD11_R
[src]
Bit 27 - Channel 11 Event Detection Interrupt Enable
impl R<u32, Reg<u32, _INTFLAG>>
[src]
pub fn ovr0(&self) -> OVR0_R
[src]
Bit 0 - Channel 0 Overrun
pub fn ovr1(&self) -> OVR1_R
[src]
Bit 1 - Channel 1 Overrun
pub fn ovr2(&self) -> OVR2_R
[src]
Bit 2 - Channel 2 Overrun
pub fn ovr3(&self) -> OVR3_R
[src]
Bit 3 - Channel 3 Overrun
pub fn ovr4(&self) -> OVR4_R
[src]
Bit 4 - Channel 4 Overrun
pub fn ovr5(&self) -> OVR5_R
[src]
Bit 5 - Channel 5 Overrun
pub fn ovr6(&self) -> OVR6_R
[src]
Bit 6 - Channel 6 Overrun
pub fn ovr7(&self) -> OVR7_R
[src]
Bit 7 - Channel 7 Overrun
pub fn evd0(&self) -> EVD0_R
[src]
Bit 8 - Channel 0 Event Detection
pub fn evd1(&self) -> EVD1_R
[src]
Bit 9 - Channel 1 Event Detection
pub fn evd2(&self) -> EVD2_R
[src]
Bit 10 - Channel 2 Event Detection
pub fn evd3(&self) -> EVD3_R
[src]
Bit 11 - Channel 3 Event Detection
pub fn evd4(&self) -> EVD4_R
[src]
Bit 12 - Channel 4 Event Detection
pub fn evd5(&self) -> EVD5_R
[src]
Bit 13 - Channel 5 Event Detection
pub fn evd6(&self) -> EVD6_R
[src]
Bit 14 - Channel 6 Event Detection
pub fn evd7(&self) -> EVD7_R
[src]
Bit 15 - Channel 7 Event Detection
pub fn ovr8(&self) -> OVR8_R
[src]
Bit 16 - Channel 8 Overrun
pub fn ovr9(&self) -> OVR9_R
[src]
Bit 17 - Channel 9 Overrun
pub fn ovr10(&self) -> OVR10_R
[src]
Bit 18 - Channel 10 Overrun
pub fn ovr11(&self) -> OVR11_R
[src]
Bit 19 - Channel 11 Overrun
pub fn evd8(&self) -> EVD8_R
[src]
Bit 24 - Channel 8 Event Detection
pub fn evd9(&self) -> EVD9_R
[src]
Bit 25 - Channel 9 Event Detection
pub fn evd10(&self) -> EVD10_R
[src]
Bit 26 - Channel 10 Event Detection
pub fn evd11(&self) -> EVD11_R
[src]
Bit 27 - Channel 11 Event Detection
impl R<u8, Reg<u8, _CTRL>>
[src]
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy Status
impl R<u8, ID_A>
[src]
pub fn variant(&self) -> Variant<u8, ID_A>
[src]
Get enumerated values variant
pub fn is_dfll48(&self) -> bool
[src]
Checks if the value of the field is DFLL48
pub fn is_fdpll(&self) -> bool
[src]
Checks if the value of the field is FDPLL
pub fn is_fdpll32k(&self) -> bool
[src]
Checks if the value of the field is FDPLL32K
pub fn is_wdt(&self) -> bool
[src]
Checks if the value of the field is WDT
pub fn is_rtc(&self) -> bool
[src]
Checks if the value of the field is RTC
pub fn is_eic(&self) -> bool
[src]
Checks if the value of the field is EIC
pub fn is_usb(&self) -> bool
[src]
Checks if the value of the field is USB
pub fn is_evsys_0(&self) -> bool
[src]
Checks if the value of the field is EVSYS_0
pub fn is_evsys_1(&self) -> bool
[src]
Checks if the value of the field is EVSYS_1
pub fn is_evsys_2(&self) -> bool
[src]
Checks if the value of the field is EVSYS_2
pub fn is_evsys_3(&self) -> bool
[src]
Checks if the value of the field is EVSYS_3
pub fn is_evsys_4(&self) -> bool
[src]
Checks if the value of the field is EVSYS_4
pub fn is_evsys_5(&self) -> bool
[src]
Checks if the value of the field is EVSYS_5
pub fn is_evsys_6(&self) -> bool
[src]
Checks if the value of the field is EVSYS_6
pub fn is_evsys_7(&self) -> bool
[src]
Checks if the value of the field is EVSYS_7
pub fn is_evsys_8(&self) -> bool
[src]
Checks if the value of the field is EVSYS_8
pub fn is_evsys_9(&self) -> bool
[src]
Checks if the value of the field is EVSYS_9
pub fn is_evsys_10(&self) -> bool
[src]
Checks if the value of the field is EVSYS_10
pub fn is_evsys_11(&self) -> bool
[src]
Checks if the value of the field is EVSYS_11
pub fn is_sercomx_slow(&self) -> bool
[src]
Checks if the value of the field is SERCOMX_SLOW
pub fn is_sercom0_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM0_CORE
pub fn is_sercom1_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM1_CORE
pub fn is_sercom2_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM2_CORE
pub fn is_sercom3_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM3_CORE
pub fn is_sercom4_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM4_CORE
pub fn is_sercom5_core(&self) -> bool
[src]
Checks if the value of the field is SERCOM5_CORE
pub fn is_tcc0_tcc1(&self) -> bool
[src]
Checks if the value of the field is TCC0_TCC1
pub fn is_tcc2_tc3(&self) -> bool
[src]
Checks if the value of the field is TCC2_TC3
pub fn is_tc4_tc5(&self) -> bool
[src]
Checks if the value of the field is TC4_TC5
pub fn is_tc6_tc7(&self) -> bool
[src]
Checks if the value of the field is TC6_TC7
pub fn is_adc(&self) -> bool
[src]
Checks if the value of the field is ADC
pub fn is_ac_dig(&self) -> bool
[src]
Checks if the value of the field is AC_DIG
pub fn is_ac_ana(&self) -> bool
[src]
Checks if the value of the field is AC_ANA
pub fn is_dac(&self) -> bool
[src]
Checks if the value of the field is DAC
pub fn is_i2s_0(&self) -> bool
[src]
Checks if the value of the field is I2S_0
pub fn is_i2s_1(&self) -> bool
[src]
Checks if the value of the field is I2S_1
impl R<u8, GEN_A>
[src]
pub fn variant(&self) -> Variant<u8, GEN_A>
[src]
Get enumerated values variant
pub fn is_gclk0(&self) -> bool
[src]
Checks if the value of the field is GCLK0
pub fn is_gclk1(&self) -> bool
[src]
Checks if the value of the field is GCLK1
pub fn is_gclk2(&self) -> bool
[src]
Checks if the value of the field is GCLK2
pub fn is_gclk3(&self) -> bool
[src]
Checks if the value of the field is GCLK3
pub fn is_gclk4(&self) -> bool
[src]
Checks if the value of the field is GCLK4
pub fn is_gclk5(&self) -> bool
[src]
Checks if the value of the field is GCLK5
pub fn is_gclk6(&self) -> bool
[src]
Checks if the value of the field is GCLK6
pub fn is_gclk7(&self) -> bool
[src]
Checks if the value of the field is GCLK7
pub fn is_gclk8(&self) -> bool
[src]
Checks if the value of the field is GCLK8
impl R<u16, Reg<u16, _CLKCTRL>>
[src]
pub fn id(&self) -> ID_R
[src]
Bits 0:5 - Generic Clock Selection ID
pub fn gen(&self) -> GEN_R
[src]
Bits 8:11 - Generic Clock Generator
pub fn clken(&self) -> CLKEN_R
[src]
Bit 14 - Clock Enable
pub fn wrtlock(&self) -> WRTLOCK_R
[src]
Bit 15 - Write Lock
impl R<u8, SRC_A>
[src]
pub fn variant(&self) -> Variant<u8, SRC_A>
[src]
Get enumerated values variant
pub fn is_xosc(&self) -> bool
[src]
Checks if the value of the field is XOSC
pub fn is_gclkin(&self) -> bool
[src]
Checks if the value of the field is GCLKIN
pub fn is_gclkgen1(&self) -> bool
[src]
Checks if the value of the field is GCLKGEN1
pub fn is_osculp32k(&self) -> bool
[src]
Checks if the value of the field is OSCULP32K
pub fn is_osc32k(&self) -> bool
[src]
Checks if the value of the field is OSC32K
pub fn is_xosc32k(&self) -> bool
[src]
Checks if the value of the field is XOSC32K
pub fn is_osc8m(&self) -> bool
[src]
Checks if the value of the field is OSC8M
pub fn is_dfll48m(&self) -> bool
[src]
Checks if the value of the field is DFLL48M
pub fn is_dpll96m(&self) -> bool
[src]
Checks if the value of the field is DPLL96M
impl R<u32, Reg<u32, _GENCTRL>>
[src]
pub fn id(&self) -> ID_R
[src]
Bits 0:3 - Generic Clock Generator Selection
pub fn src(&self) -> SRC_R
[src]
Bits 8:12 - Source Select
pub fn genen(&self) -> GENEN_R
[src]
Bit 16 - Generic Clock Generator Enable
pub fn idc(&self) -> IDC_R
[src]
Bit 17 - Improve Duty Cycle
pub fn oov(&self) -> OOV_R
[src]
Bit 18 - Output Off Value
pub fn oe(&self) -> OE_R
[src]
Bit 19 - Output Enable
pub fn divsel(&self) -> DIVSEL_R
[src]
Bit 20 - Divide Selection
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 21 - Run in Standby
impl R<u32, Reg<u32, _GENDIV>>
[src]
pub fn id(&self) -> ID_R
[src]
Bits 0:3 - Generic Clock Generator Selection
pub fn div(&self) -> DIV_R
[src]
Bits 8:23 - Division Factor
impl R<u32, Reg<u32, _SFR>>
[src]
impl R<u8, Reg<u8, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn cken0(&self) -> CKEN0_R
[src]
Bit 2 - Clock Unit 0 Enable
pub fn cken1(&self) -> CKEN1_R
[src]
Bit 3 - Clock Unit 1 Enable
pub fn seren0(&self) -> SEREN0_R
[src]
Bit 4 - Serializer 0 Enable
pub fn seren1(&self) -> SEREN1_R
[src]
Bit 5 - Serializer 1 Enable
impl R<u8, SLOTSIZE_A>
[src]
pub fn variant(&self) -> SLOTSIZE_A
[src]
Get enumerated values variant
pub fn is_8(&self) -> bool
[src]
Checks if the value of the field is _8
pub fn is_16(&self) -> bool
[src]
Checks if the value of the field is _16
pub fn is_24(&self) -> bool
[src]
Checks if the value of the field is _24
pub fn is_32(&self) -> bool
[src]
Checks if the value of the field is _32
impl R<u8, FSWIDTH_A>
[src]
pub fn variant(&self) -> FSWIDTH_A
[src]
Get enumerated values variant
pub fn is_slot(&self) -> bool
[src]
Checks if the value of the field is SLOT
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
pub fn is_bit_(&self) -> bool
[src]
Checks if the value of the field is BIT
pub fn is_burst(&self) -> bool
[src]
Checks if the value of the field is BURST
impl R<bool, BITDELAY_A>
[src]
pub fn variant(&self) -> BITDELAY_A
[src]
Get enumerated values variant
pub fn is_lj(&self) -> bool
[src]
Checks if the value of the field is LJ
pub fn is_i2s(&self) -> bool
[src]
Checks if the value of the field is I2S
impl R<bool, FSSEL_A>
[src]
pub fn variant(&self) -> FSSEL_A
[src]
Get enumerated values variant
pub fn is_sckdiv(&self) -> bool
[src]
Checks if the value of the field is SCKDIV
pub fn is_fspin(&self) -> bool
[src]
Checks if the value of the field is FSPIN
impl R<bool, SCKSEL_A>
[src]
pub fn variant(&self) -> SCKSEL_A
[src]
Get enumerated values variant
pub fn is_mckdiv(&self) -> bool
[src]
Checks if the value of the field is MCKDIV
pub fn is_sckpin(&self) -> bool
[src]
Checks if the value of the field is SCKPIN
impl R<bool, MCKSEL_A>
[src]
pub fn variant(&self) -> MCKSEL_A
[src]
Get enumerated values variant
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
pub fn is_mckpin(&self) -> bool
[src]
Checks if the value of the field is MCKPIN
impl R<u32, Reg<u32, _CLKCTRL>>
[src]
pub fn slotsize(&self) -> SLOTSIZE_R
[src]
Bits 0:1 - Slot Size
pub fn nbslots(&self) -> NBSLOTS_R
[src]
Bits 2:4 - Number of Slots in Frame
pub fn fswidth(&self) -> FSWIDTH_R
[src]
Bits 5:6 - Frame Sync Width
pub fn bitdelay(&self) -> BITDELAY_R
[src]
Bit 7 - Data Delay from Frame Sync
pub fn fssel(&self) -> FSSEL_R
[src]
Bit 8 - Frame Sync Select
pub fn fsinv(&self) -> FSINV_R
[src]
Bit 11 - Frame Sync Invert
pub fn scksel(&self) -> SCKSEL_R
[src]
Bit 12 - Serial Clock Select
pub fn mcksel(&self) -> MCKSEL_R
[src]
Bit 16 - Master Clock Select
pub fn mcken(&self) -> MCKEN_R
[src]
Bit 18 - Master Clock Enable
pub fn mckdiv(&self) -> MCKDIV_R
[src]
Bits 19:23 - Master Clock Division Factor
pub fn mckoutdiv(&self) -> MCKOUTDIV_R
[src]
Bits 24:28 - Master Clock Output Division Factor
pub fn fsoutinv(&self) -> FSOUTINV_R
[src]
Bit 29 - Frame Sync Output Invert
pub fn sckoutinv(&self) -> SCKOUTINV_R
[src]
Bit 30 - Serial Clock Output Invert
pub fn mckoutinv(&self) -> MCKOUTINV_R
[src]
Bit 31 - Master Clock Output Invert
impl R<u16, Reg<u16, _INTENCLR>>
[src]
pub fn rxrdy0(&self) -> RXRDY0_R
[src]
Bit 0 - Receive Ready 0 Interrupt Enable
pub fn rxrdy1(&self) -> RXRDY1_R
[src]
Bit 1 - Receive Ready 1 Interrupt Enable
pub fn rxor0(&self) -> RXOR0_R
[src]
Bit 4 - Receive Overrun 0 Interrupt Enable
pub fn rxor1(&self) -> RXOR1_R
[src]
Bit 5 - Receive Overrun 1 Interrupt Enable
pub fn txrdy0(&self) -> TXRDY0_R
[src]
Bit 8 - Transmit Ready 0 Interrupt Enable
pub fn txrdy1(&self) -> TXRDY1_R
[src]
Bit 9 - Transmit Ready 1 Interrupt Enable
pub fn txur0(&self) -> TXUR0_R
[src]
Bit 12 - Transmit Underrun 0 Interrupt Enable
pub fn txur1(&self) -> TXUR1_R
[src]
Bit 13 - Transmit Underrun 1 Interrupt Enable
impl R<u16, Reg<u16, _INTENSET>>
[src]
pub fn rxrdy0(&self) -> RXRDY0_R
[src]
Bit 0 - Receive Ready 0 Interrupt Enable
pub fn rxrdy1(&self) -> RXRDY1_R
[src]
Bit 1 - Receive Ready 1 Interrupt Enable
pub fn rxor0(&self) -> RXOR0_R
[src]
Bit 4 - Receive Overrun 0 Interrupt Enable
pub fn rxor1(&self) -> RXOR1_R
[src]
Bit 5 - Receive Overrun 1 Interrupt Enable
pub fn txrdy0(&self) -> TXRDY0_R
[src]
Bit 8 - Transmit Ready 0 Interrupt Enable
pub fn txrdy1(&self) -> TXRDY1_R
[src]
Bit 9 - Transmit Ready 1 Interrupt Enable
pub fn txur0(&self) -> TXUR0_R
[src]
Bit 12 - Transmit Underrun 0 Interrupt Enable
pub fn txur1(&self) -> TXUR1_R
[src]
Bit 13 - Transmit Underrun 1 Interrupt Enable
impl R<u16, Reg<u16, _INTFLAG>>
[src]
pub fn rxrdy0(&self) -> RXRDY0_R
[src]
Bit 0 - Receive Ready 0
pub fn rxrdy1(&self) -> RXRDY1_R
[src]
Bit 1 - Receive Ready 1
pub fn rxor0(&self) -> RXOR0_R
[src]
Bit 4 - Receive Overrun 0
pub fn rxor1(&self) -> RXOR1_R
[src]
Bit 5 - Receive Overrun 1
pub fn txrdy0(&self) -> TXRDY0_R
[src]
Bit 8 - Transmit Ready 0
pub fn txrdy1(&self) -> TXRDY1_R
[src]
Bit 9 - Transmit Ready 1
pub fn txur0(&self) -> TXUR0_R
[src]
Bit 12 - Transmit Underrun 0
pub fn txur1(&self) -> TXUR1_R
[src]
Bit 13 - Transmit Underrun 1
impl R<u16, Reg<u16, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Status
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable Synchronization Status
pub fn cken0(&self) -> CKEN0_R
[src]
Bit 2 - Clock Unit 0 Enable Synchronization Status
pub fn cken1(&self) -> CKEN1_R
[src]
Bit 3 - Clock Unit 1 Enable Synchronization Status
pub fn seren0(&self) -> SEREN0_R
[src]
Bit 4 - Serializer 0 Enable Synchronization Status
pub fn seren1(&self) -> SEREN1_R
[src]
Bit 5 - Serializer 1 Enable Synchronization Status
pub fn data0(&self) -> DATA0_R
[src]
Bit 8 - Data 0 Synchronization Status
pub fn data1(&self) -> DATA1_R
[src]
Bit 9 - Data 1 Synchronization Status
impl R<u8, SERMODE_A>
[src]
pub fn variant(&self) -> Variant<u8, SERMODE_A>
[src]
Get enumerated values variant
pub fn is_rx(&self) -> bool
[src]
Checks if the value of the field is RX
pub fn is_tx(&self) -> bool
[src]
Checks if the value of the field is TX
pub fn is_pdm2(&self) -> bool
[src]
Checks if the value of the field is PDM2
impl R<u8, TXDEFAULT_A>
[src]
pub fn variant(&self) -> Variant<u8, TXDEFAULT_A>
[src]
Get enumerated values variant
pub fn is_zero(&self) -> bool
[src]
Checks if the value of the field is ZERO
pub fn is_one(&self) -> bool
[src]
Checks if the value of the field is ONE
pub fn is_hiz(&self) -> bool
[src]
Checks if the value of the field is HIZ
impl R<bool, TXSAME_A>
[src]
pub fn variant(&self) -> TXSAME_A
[src]
Get enumerated values variant
pub fn is_zero(&self) -> bool
[src]
Checks if the value of the field is ZERO
pub fn is_same(&self) -> bool
[src]
Checks if the value of the field is SAME
impl R<bool, CLKSEL_A>
[src]
pub fn variant(&self) -> CLKSEL_A
[src]
Get enumerated values variant
pub fn is_clk0(&self) -> bool
[src]
Checks if the value of the field is CLK0
pub fn is_clk1(&self) -> bool
[src]
Checks if the value of the field is CLK1
impl R<bool, SLOTADJ_A>
[src]
pub fn variant(&self) -> SLOTADJ_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<u8, DATASIZE_A>
[src]
pub fn variant(&self) -> DATASIZE_A
[src]
Get enumerated values variant
pub fn is_32(&self) -> bool
[src]
Checks if the value of the field is _32
pub fn is_24(&self) -> bool
[src]
Checks if the value of the field is _24
pub fn is_20(&self) -> bool
[src]
Checks if the value of the field is _20
pub fn is_18(&self) -> bool
[src]
Checks if the value of the field is _18
pub fn is_16(&self) -> bool
[src]
Checks if the value of the field is _16
pub fn is_16c(&self) -> bool
[src]
Checks if the value of the field is _16C
pub fn is_8(&self) -> bool
[src]
Checks if the value of the field is _8
pub fn is_8c(&self) -> bool
[src]
Checks if the value of the field is _8C
impl R<bool, WORDADJ_A>
[src]
pub fn variant(&self) -> WORDADJ_A
[src]
Get enumerated values variant
pub fn is_right(&self) -> bool
[src]
Checks if the value of the field is RIGHT
pub fn is_left(&self) -> bool
[src]
Checks if the value of the field is LEFT
impl R<u8, EXTEND_A>
[src]
pub fn variant(&self) -> EXTEND_A
[src]
Get enumerated values variant
pub fn is_zero(&self) -> bool
[src]
Checks if the value of the field is ZERO
pub fn is_one(&self) -> bool
[src]
Checks if the value of the field is ONE
pub fn is_msbit(&self) -> bool
[src]
Checks if the value of the field is MSBIT
pub fn is_lsbit(&self) -> bool
[src]
Checks if the value of the field is LSBIT
impl R<bool, BITREV_A>
[src]
pub fn variant(&self) -> BITREV_A
[src]
Get enumerated values variant
pub fn is_msbit(&self) -> bool
[src]
Checks if the value of the field is MSBIT
pub fn is_lsbit(&self) -> bool
[src]
Checks if the value of the field is LSBIT
impl R<bool, MONO_A>
[src]
pub fn variant(&self) -> MONO_A
[src]
Get enumerated values variant
pub fn is_stereo(&self) -> bool
[src]
Checks if the value of the field is STEREO
pub fn is_mono(&self) -> bool
[src]
Checks if the value of the field is MONO
impl R<bool, DMA_A>
[src]
pub fn variant(&self) -> DMA_A
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_multiple(&self) -> bool
[src]
Checks if the value of the field is MULTIPLE
impl R<u32, Reg<u32, _SERCTRL>>
[src]
pub fn sermode(&self) -> SERMODE_R
[src]
Bits 0:1 - Serializer Mode
pub fn txdefault(&self) -> TXDEFAULT_R
[src]
Bits 2:3 - Line Default Line when Slot Disabled
pub fn txsame(&self) -> TXSAME_R
[src]
Bit 4 - Transmit Data when Underrun
pub fn clksel(&self) -> CLKSEL_R
[src]
Bit 5 - Clock Unit Selection
pub fn slotadj(&self) -> SLOTADJ_R
[src]
Bit 7 - Data Slot Formatting Adjust
pub fn datasize(&self) -> DATASIZE_R
[src]
Bits 8:10 - Data Word Size
pub fn wordadj(&self) -> WORDADJ_R
[src]
Bit 12 - Data Word Formatting Adjust
pub fn extend(&self) -> EXTEND_R
[src]
Bits 13:14 - Data Formatting Bit Extension
pub fn bitrev(&self) -> BITREV_R
[src]
Bit 15 - Data Formatting Bit Reverse
pub fn slotdis0(&self) -> SLOTDIS0_R
[src]
Bit 16 - Slot 0 Disabled for this Serializer
pub fn slotdis1(&self) -> SLOTDIS1_R
[src]
Bit 17 - Slot 1 Disabled for this Serializer
pub fn slotdis2(&self) -> SLOTDIS2_R
[src]
Bit 18 - Slot 2 Disabled for this Serializer
pub fn slotdis3(&self) -> SLOTDIS3_R
[src]
Bit 19 - Slot 3 Disabled for this Serializer
pub fn slotdis4(&self) -> SLOTDIS4_R
[src]
Bit 20 - Slot 4 Disabled for this Serializer
pub fn slotdis5(&self) -> SLOTDIS5_R
[src]
Bit 21 - Slot 5 Disabled for this Serializer
pub fn slotdis6(&self) -> SLOTDIS6_R
[src]
Bit 22 - Slot 6 Disabled for this Serializer
pub fn slotdis7(&self) -> SLOTDIS7_R
[src]
Bit 23 - Slot 7 Disabled for this Serializer
pub fn mono(&self) -> MONO_R
[src]
Bit 24 - Mono Mode
pub fn dma(&self) -> DMA_R
[src]
Bit 25 - Single or Multiple DMA Channels
pub fn rxloop(&self) -> RXLOOP_R
[src]
Bit 26 - Loop-back Test Mode
impl R<u32, Reg<u32, _DATA>>
[src]
impl R<u32, Reg<u32, _POSITION>>
[src]
pub fn wrap(&self) -> WRAP_R
[src]
Bit 2 - Pointer Value Wraps
pub fn pointer(&self) -> POINTER_R
[src]
Bits 3:31 - Trace Packet Location Pointer
impl R<u32, Reg<u32, _MASTER>>
[src]
pub fn mask(&self) -> MASK_R
[src]
Bits 0:4 - Maximum Value of the Trace Buffer in SRAM
pub fn tstarten(&self) -> TSTARTEN_R
[src]
Bit 5 - Trace Start Input Enable
pub fn tstopen(&self) -> TSTOPEN_R
[src]
Bit 6 - Trace Stop Input Enable
pub fn sfrwpriv(&self) -> SFRWPRIV_R
[src]
Bit 7 - Special Function Register Write Privilege
pub fn rampriv(&self) -> RAMPRIV_R
[src]
Bit 8 - SRAM Privilege
pub fn haltreq(&self) -> HALTREQ_R
[src]
Bit 9 - Halt Request
pub fn en(&self) -> EN_R
[src]
Bit 31 - Main Trace Enable
impl R<u32, Reg<u32, _FLOW>>
[src]
pub fn autostop(&self) -> AUTOSTOP_R
[src]
Bit 0 - Auto Stop Tracing
pub fn autohalt(&self) -> AUTOHALT_R
[src]
Bit 1 - Auto Halt Request
pub fn watermark(&self) -> WATERMARK_R
[src]
Bits 3:31 - Watermark value
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_er(&self) -> bool
[src]
Checks if the value of the field is ER
pub fn is_wp(&self) -> bool
[src]
Checks if the value of the field is WP
pub fn is_ear(&self) -> bool
[src]
Checks if the value of the field is EAR
pub fn is_wap(&self) -> bool
[src]
Checks if the value of the field is WAP
pub fn is_sf(&self) -> bool
[src]
Checks if the value of the field is SF
pub fn is_wl(&self) -> bool
[src]
Checks if the value of the field is WL
pub fn is_lr(&self) -> bool
[src]
Checks if the value of the field is LR
pub fn is_ur(&self) -> bool
[src]
Checks if the value of the field is UR
pub fn is_sprm(&self) -> bool
[src]
Checks if the value of the field is SPRM
pub fn is_cprm(&self) -> bool
[src]
Checks if the value of the field is CPRM
pub fn is_pbc(&self) -> bool
[src]
Checks if the value of the field is PBC
pub fn is_ssb(&self) -> bool
[src]
Checks if the value of the field is SSB
pub fn is_invall(&self) -> bool
[src]
Checks if the value of the field is INVALL
impl R<u8, CMDEX_A>
[src]
pub fn variant(&self) -> Variant<u8, CMDEX_A>
[src]
Get enumerated values variant
pub fn is_key(&self) -> bool
[src]
Checks if the value of the field is KEY
impl R<u16, Reg<u16, _CTRLA>>
[src]
pub fn cmd(&self) -> CMD_R
[src]
Bits 0:6 - Command
pub fn cmdex(&self) -> CMDEX_R
[src]
Bits 8:15 - Command Execution
impl R<u8, RWS_A>
[src]
pub fn variant(&self) -> Variant<u8, RWS_A>
[src]
Get enumerated values variant
pub fn is_single(&self) -> bool
[src]
Checks if the value of the field is SINGLE
pub fn is_half(&self) -> bool
[src]
Checks if the value of the field is HALF
pub fn is_dual(&self) -> bool
[src]
Checks if the value of the field is DUAL
impl R<u8, SLEEPPRM_A>
[src]
pub fn variant(&self) -> Variant<u8, SLEEPPRM_A>
[src]
Get enumerated values variant
pub fn is_wakeonaccess(&self) -> bool
[src]
Checks if the value of the field is WAKEONACCESS
pub fn is_wakeupinstant(&self) -> bool
[src]
Checks if the value of the field is WAKEUPINSTANT
pub fn is_disabled(&self) -> bool
[src]
Checks if the value of the field is DISABLED
impl R<u8, READMODE_A>
[src]
pub fn variant(&self) -> Variant<u8, READMODE_A>
[src]
Get enumerated values variant
pub fn is_no_miss_penalty(&self) -> bool
[src]
Checks if the value of the field is NO_MISS_PENALTY
pub fn is_low_power(&self) -> bool
[src]
Checks if the value of the field is LOW_POWER
pub fn is_deterministic(&self) -> bool
[src]
Checks if the value of the field is DETERMINISTIC
impl R<u32, Reg<u32, _CTRLB>>
[src]
pub fn rws(&self) -> RWS_R
[src]
Bits 1:4 - NVM Read Wait States
pub fn manw(&self) -> MANW_R
[src]
Bit 7 - Manual Write
pub fn sleepprm(&self) -> SLEEPPRM_R
[src]
Bits 8:9 - Power Reduction Mode during Sleep
pub fn readmode(&self) -> READMODE_R
[src]
Bits 16:17 - NVMCTRL Read Mode
pub fn cachedis(&self) -> CACHEDIS_R
[src]
Bit 18 - Cache Disable
impl R<u8, PSZ_A>
[src]
pub fn variant(&self) -> PSZ_A
[src]
Get enumerated values variant
pub fn is_8(&self) -> bool
[src]
Checks if the value of the field is _8
pub fn is_16(&self) -> bool
[src]
Checks if the value of the field is _16
pub fn is_32(&self) -> bool
[src]
Checks if the value of the field is _32
pub fn is_64(&self) -> bool
[src]
Checks if the value of the field is _64
pub fn is_128(&self) -> bool
[src]
Checks if the value of the field is _128
pub fn is_256(&self) -> bool
[src]
Checks if the value of the field is _256
pub fn is_512(&self) -> bool
[src]
Checks if the value of the field is _512
pub fn is_1024(&self) -> bool
[src]
Checks if the value of the field is _1024
impl R<u32, Reg<u32, _PARAM>>
[src]
pub fn nvmp(&self) -> NVMP_R
[src]
Bits 0:15 - NVM Pages
pub fn psz(&self) -> PSZ_R
[src]
Bits 16:18 - Page Size
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn ready(&self) -> READY_R
[src]
Bit 0 - NVM Ready Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 1 - Error Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn ready(&self) -> READY_R
[src]
Bit 0 - NVM Ready Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 1 - Error Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn ready(&self) -> READY_R
[src]
Bit 0 - NVM Ready
pub fn error(&self) -> ERROR_R
[src]
Bit 1 - Error
impl R<u16, Reg<u16, _STATUS>>
[src]
pub fn prm(&self) -> PRM_R
[src]
Bit 0 - Power Reduction Mode
pub fn load(&self) -> LOAD_R
[src]
Bit 1 - NVM Page Buffer Active Loading
pub fn proge(&self) -> PROGE_R
[src]
Bit 2 - Programming Error Status
pub fn locke(&self) -> LOCKE_R
[src]
Bit 3 - Lock Error Status
pub fn nvme(&self) -> NVME_R
[src]
Bit 4 - NVM Error
pub fn sb(&self) -> SB_R
[src]
Bit 8 - Security Bit Status
impl R<u32, Reg<u32, _ADDR>>
[src]
impl R<u16, Reg<u16, _LOCK>>
[src]
impl R<u32, Reg<u32, _WPCLR>>
[src]
impl R<u32, Reg<u32, _WPSET>>
[src]
impl R<u8, IDLE_A>
[src]
pub fn variant(&self) -> Variant<u8, IDLE_A>
[src]
Get enumerated values variant
pub fn is_cpu(&self) -> bool
[src]
Checks if the value of the field is CPU
pub fn is_ahb(&self) -> bool
[src]
Checks if the value of the field is AHB
pub fn is_apb(&self) -> bool
[src]
Checks if the value of the field is APB
impl R<u8, Reg<u8, _SLEEP>>
[src]
impl R<u8, CPUDIV_A>
[src]
pub fn variant(&self) -> CPUDIV_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
impl R<u8, Reg<u8, _CPUSEL>>
[src]
impl R<u8, APBADIV_A>
[src]
pub fn variant(&self) -> APBADIV_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
impl R<u8, Reg<u8, _APBASEL>>
[src]
impl R<u8, APBBDIV_A>
[src]
pub fn variant(&self) -> APBBDIV_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
impl R<u8, Reg<u8, _APBBSEL>>
[src]
impl R<u8, APBCDIV_A>
[src]
pub fn variant(&self) -> APBCDIV_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
impl R<u8, Reg<u8, _APBCSEL>>
[src]
impl R<u32, Reg<u32, _AHBMASK>>
[src]
pub fn hpb0_(&self) -> HPB0__R
[src]
Bit 0 - HPB0 AHB Clock Mask
pub fn hpb1_(&self) -> HPB1__R
[src]
Bit 1 - HPB1 AHB Clock Mask
pub fn hpb2_(&self) -> HPB2__R
[src]
Bit 2 - HPB2 AHB Clock Mask
pub fn dsu_(&self) -> DSU__R
[src]
Bit 3 - DSU AHB Clock Mask
pub fn nvmctrl_(&self) -> NVMCTRL__R
[src]
Bit 4 - NVMCTRL AHB Clock Mask
pub fn dmac_(&self) -> DMAC__R
[src]
Bit 5 - DMAC AHB Clock Mask
pub fn usb_(&self) -> USB__R
[src]
Bit 6 - USB AHB Clock Mask
impl R<u32, Reg<u32, _APBAMASK>>
[src]
pub fn pac0_(&self) -> PAC0__R
[src]
Bit 0 - PAC0 APB Clock Enable
pub fn pm_(&self) -> PM__R
[src]
Bit 1 - PM APB Clock Enable
pub fn sysctrl_(&self) -> SYSCTRL__R
[src]
Bit 2 - SYSCTRL APB Clock Enable
pub fn gclk_(&self) -> GCLK__R
[src]
Bit 3 - GCLK APB Clock Enable
pub fn wdt_(&self) -> WDT__R
[src]
Bit 4 - WDT APB Clock Enable
pub fn rtc_(&self) -> RTC__R
[src]
Bit 5 - RTC APB Clock Enable
pub fn eic_(&self) -> EIC__R
[src]
Bit 6 - EIC APB Clock Enable
impl R<u32, Reg<u32, _APBBMASK>>
[src]
pub fn pac1_(&self) -> PAC1__R
[src]
Bit 0 - PAC1 APB Clock Enable
pub fn dsu_(&self) -> DSU__R
[src]
Bit 1 - DSU APB Clock Enable
pub fn nvmctrl_(&self) -> NVMCTRL__R
[src]
Bit 2 - NVMCTRL APB Clock Enable
pub fn port_(&self) -> PORT__R
[src]
Bit 3 - PORT APB Clock Enable
pub fn dmac_(&self) -> DMAC__R
[src]
Bit 4 - DMAC APB Clock Enable
pub fn usb_(&self) -> USB__R
[src]
Bit 5 - USB APB Clock Enable
pub fn hmatrix_(&self) -> HMATRIX__R
[src]
Bit 6 - HMATRIX APB Clock Enable
impl R<u32, Reg<u32, _APBCMASK>>
[src]
pub fn pac2_(&self) -> PAC2__R
[src]
Bit 0 - PAC2 APB Clock Enable
pub fn evsys_(&self) -> EVSYS__R
[src]
Bit 1 - EVSYS APB Clock Enable
pub fn sercom0_(&self) -> SERCOM0__R
[src]
Bit 2 - SERCOM0 APB Clock Enable
pub fn sercom1_(&self) -> SERCOM1__R
[src]
Bit 3 - SERCOM1 APB Clock Enable
pub fn sercom2_(&self) -> SERCOM2__R
[src]
Bit 4 - SERCOM2 APB Clock Enable
pub fn sercom3_(&self) -> SERCOM3__R
[src]
Bit 5 - SERCOM3 APB Clock Enable
pub fn tcc0_(&self) -> TCC0__R
[src]
Bit 8 - TCC0 APB Clock Enable
pub fn tcc1_(&self) -> TCC1__R
[src]
Bit 9 - TCC1 APB Clock Enable
pub fn tcc2_(&self) -> TCC2__R
[src]
Bit 10 - TCC2 APB Clock Enable
pub fn tc3_(&self) -> TC3__R
[src]
Bit 11 - TC3 APB Clock Enable
pub fn tc4_(&self) -> TC4__R
[src]
Bit 12 - TC4 APB Clock Enable
pub fn tc5_(&self) -> TC5__R
[src]
Bit 13 - TC5 APB Clock Enable
pub fn adc_(&self) -> ADC__R
[src]
Bit 16 - ADC APB Clock Enable
pub fn ac_(&self) -> AC__R
[src]
Bit 17 - AC APB Clock Enable
pub fn dac_(&self) -> DAC__R
[src]
Bit 18 - DAC APB Clock Enable
pub fn ptc_(&self) -> PTC__R
[src]
Bit 19 - PTC APB Clock Enable
pub fn i2s_(&self) -> I2S__R
[src]
Bit 20 - I2S APB Clock Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
impl R<u8, Reg<u8, _INTENSET>>
[src]
impl R<u8, Reg<u8, _INTFLAG>>
[src]
impl R<u8, Reg<u8, _RCAUSE>>
[src]
pub fn por(&self) -> POR_R
[src]
Bit 0 - Power On Reset
pub fn bod12(&self) -> BOD12_R
[src]
Bit 1 - Brown Out 12 Detector Reset
pub fn bod33(&self) -> BOD33_R
[src]
Bit 2 - Brown Out 33 Detector Reset
pub fn ext(&self) -> EXT_R
[src]
Bit 4 - External Reset
pub fn wdt(&self) -> WDT_R
[src]
Bit 5 - Watchdog Reset
pub fn syst(&self) -> SYST_R
[src]
Bit 6 - System Reset Request
impl R<u32, Reg<u32, _DIR>>
[src]
impl R<u32, Reg<u32, _DIRCLR>>
[src]
impl R<u32, Reg<u32, _DIRSET>>
[src]
impl R<u32, Reg<u32, _DIRTGL>>
[src]
impl R<u32, Reg<u32, _OUT>>
[src]
impl R<u32, Reg<u32, _OUTCLR>>
[src]
impl R<u32, Reg<u32, _OUTSET>>
[src]
impl R<u32, Reg<u32, _OUTTGL>>
[src]
impl R<u32, Reg<u32, _IN>>
[src]
impl R<u8, PMUXE_A>
[src]
pub fn variant(&self) -> Variant<u8, PMUXE_A>
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
pub fn is_e(&self) -> bool
[src]
Checks if the value of the field is E
pub fn is_f(&self) -> bool
[src]
Checks if the value of the field is F
pub fn is_g(&self) -> bool
[src]
Checks if the value of the field is G
pub fn is_h(&self) -> bool
[src]
Checks if the value of the field is H
impl R<u8, PMUXO_A>
[src]
pub fn variant(&self) -> Variant<u8, PMUXO_A>
[src]
Get enumerated values variant
pub fn is_a(&self) -> bool
[src]
Checks if the value of the field is A
pub fn is_b(&self) -> bool
[src]
Checks if the value of the field is B
pub fn is_c(&self) -> bool
[src]
Checks if the value of the field is C
pub fn is_d(&self) -> bool
[src]
Checks if the value of the field is D
pub fn is_e(&self) -> bool
[src]
Checks if the value of the field is E
pub fn is_f(&self) -> bool
[src]
Checks if the value of the field is F
pub fn is_g(&self) -> bool
[src]
Checks if the value of the field is G
pub fn is_h(&self) -> bool
[src]
Checks if the value of the field is H
impl R<u8, Reg<u8, _PMUX0_>>
[src]
pub fn pmuxe(&self) -> PMUXE_R
[src]
Bits 0:3 - Peripheral Multiplexing Even
pub fn pmuxo(&self) -> PMUXO_R
[src]
Bits 4:7 - Peripheral Multiplexing Odd
impl R<u8, Reg<u8, _PINCFG0_>>
[src]
pub fn pmuxen(&self) -> PMUXEN_R
[src]
Bit 0 - Peripheral Multiplexer Enable
pub fn inen(&self) -> INEN_R
[src]
Bit 1 - Input Enable
pub fn pullen(&self) -> PULLEN_R
[src]
Bit 2 - Pull Enable
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_clock(&self) -> bool
[src]
Checks if the value of the field is CLOCK
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCALER_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u16, Reg<u16, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - Operating Mode
pub fn matchclr(&self) -> MATCHCLR_R
[src]
Bit 7 - Clear on Match
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:11 - Prescaler
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:5 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn pereo0(&self) -> PEREO0_R
[src]
Bit 0 - Periodic Interval 0 Event Output Enable
pub fn pereo1(&self) -> PEREO1_R
[src]
Bit 1 - Periodic Interval 1 Event Output Enable
pub fn pereo2(&self) -> PEREO2_R
[src]
Bit 2 - Periodic Interval 2 Event Output Enable
pub fn pereo3(&self) -> PEREO3_R
[src]
Bit 3 - Periodic Interval 3 Event Output Enable
pub fn pereo4(&self) -> PEREO4_R
[src]
Bit 4 - Periodic Interval 4 Event Output Enable
pub fn pereo5(&self) -> PEREO5_R
[src]
Bit 5 - Periodic Interval 5 Event Output Enable
pub fn pereo6(&self) -> PEREO6_R
[src]
Bit 6 - Periodic Interval 6 Event Output Enable
pub fn pereo7(&self) -> PEREO7_R
[src]
Bit 7 - Periodic Interval 7 Event Output Enable
pub fn cmpeo0(&self) -> CMPEO0_R
[src]
Bit 8 - Compare 0 Event Output Enable
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 15 - Overflow Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, Reg<u8, _FREQCORR>>
[src]
pub fn value(&self) -> VALUE_R
[src]
Bits 0:6 - Correction Value
pub fn sign(&self) -> SIGN_R
[src]
Bit 7 - Correction Sign
impl R<u32, Reg<u32, _COUNT>>
[src]
impl R<u32, Reg<u32, _COMP>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_clock(&self) -> bool
[src]
Checks if the value of the field is CLOCK
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCALER_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u16, Reg<u16, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - Operating Mode
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:11 - Prescaler
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:5 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn pereo0(&self) -> PEREO0_R
[src]
Bit 0 - Periodic Interval 0 Event Output Enable
pub fn pereo1(&self) -> PEREO1_R
[src]
Bit 1 - Periodic Interval 1 Event Output Enable
pub fn pereo2(&self) -> PEREO2_R
[src]
Bit 2 - Periodic Interval 2 Event Output Enable
pub fn pereo3(&self) -> PEREO3_R
[src]
Bit 3 - Periodic Interval 3 Event Output Enable
pub fn pereo4(&self) -> PEREO4_R
[src]
Bit 4 - Periodic Interval 4 Event Output Enable
pub fn pereo5(&self) -> PEREO5_R
[src]
Bit 5 - Periodic Interval 5 Event Output Enable
pub fn pereo6(&self) -> PEREO6_R
[src]
Bit 6 - Periodic Interval 6 Event Output Enable
pub fn pereo7(&self) -> PEREO7_R
[src]
Bit 7 - Periodic Interval 7 Event Output Enable
pub fn cmpeo0(&self) -> CMPEO0_R
[src]
Bit 8 - Compare 0 Event Output Enable
pub fn cmpeo1(&self) -> CMPEO1_R
[src]
Bit 9 - Compare 1 Event Output Enable
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 15 - Overflow Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0 Interrupt Enable
pub fn cmp1(&self) -> CMP1_R
[src]
Bit 1 - Compare 1 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0 Interrupt Enable
pub fn cmp1(&self) -> CMP1_R
[src]
Bit 1 - Compare 1 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 0 - Compare 0
pub fn cmp1(&self) -> CMP1_R
[src]
Bit 1 - Compare 1
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, Reg<u8, _FREQCORR>>
[src]
pub fn value(&self) -> VALUE_R
[src]
Bits 0:6 - Correction Value
pub fn sign(&self) -> SIGN_R
[src]
Bit 7 - Correction Sign
impl R<u16, Reg<u16, _COUNT>>
[src]
impl R<u16, Reg<u16, _PER>>
[src]
impl R<u16, Reg<u16, _COMP>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_clock(&self) -> bool
[src]
Checks if the value of the field is CLOCK
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCALER_A>
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u16, Reg<u16, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - Operating Mode
pub fn clkrep(&self) -> CLKREP_R
[src]
Bit 6 - Clock Representation
pub fn matchclr(&self) -> MATCHCLR_R
[src]
Bit 7 - Clear on Match
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:11 - Prescaler
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:5 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn pereo0(&self) -> PEREO0_R
[src]
Bit 0 - Periodic Interval 0 Event Output Enable
pub fn pereo1(&self) -> PEREO1_R
[src]
Bit 1 - Periodic Interval 1 Event Output Enable
pub fn pereo2(&self) -> PEREO2_R
[src]
Bit 2 - Periodic Interval 2 Event Output Enable
pub fn pereo3(&self) -> PEREO3_R
[src]
Bit 3 - Periodic Interval 3 Event Output Enable
pub fn pereo4(&self) -> PEREO4_R
[src]
Bit 4 - Periodic Interval 4 Event Output Enable
pub fn pereo5(&self) -> PEREO5_R
[src]
Bit 5 - Periodic Interval 5 Event Output Enable
pub fn pereo6(&self) -> PEREO6_R
[src]
Bit 6 - Periodic Interval 6 Event Output Enable
pub fn pereo7(&self) -> PEREO7_R
[src]
Bit 7 - Periodic Interval 7 Event Output Enable
pub fn alarmeo0(&self) -> ALARMEO0_R
[src]
Bit 8 - Alarm 0 Event Output Enable
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 15 - Overflow Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn alarm0(&self) -> ALARM0_R
[src]
Bit 0 - Alarm 0 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn alarm0(&self) -> ALARM0_R
[src]
Bit 0 - Alarm 0 Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready Interrupt Enable
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn alarm0(&self) -> ALARM0_R
[src]
Bit 0 - Alarm 0
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 6 - Synchronization Ready
pub fn ovf(&self) -> OVF_R
[src]
Bit 7 - Overflow
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, Reg<u8, _FREQCORR>>
[src]
pub fn value(&self) -> VALUE_R
[src]
Bits 0:6 - Correction Value
pub fn sign(&self) -> SIGN_R
[src]
Bit 7 - Correction Sign
impl R<u8, HOUR_A>
[src]
pub fn variant(&self) -> Variant<u8, HOUR_A>
[src]
Get enumerated values variant
pub fn is_am(&self) -> bool
[src]
Checks if the value of the field is AM
pub fn is_pm(&self) -> bool
[src]
Checks if the value of the field is PM
impl R<u32, Reg<u32, _CLOCK>>
[src]
pub fn second(&self) -> SECOND_R
[src]
Bits 0:5 - Second
pub fn minute(&self) -> MINUTE_R
[src]
Bits 6:11 - Minute
pub fn hour(&self) -> HOUR_R
[src]
Bits 12:16 - Hour
pub fn day(&self) -> DAY_R
[src]
Bits 17:21 - Day
pub fn month(&self) -> MONTH_R
[src]
Bits 22:25 - Month
pub fn year(&self) -> YEAR_R
[src]
Bits 26:31 - Year
impl R<u8, HOUR_A>
[src]
pub fn variant(&self) -> Variant<u8, HOUR_A>
[src]
Get enumerated values variant
pub fn is_am(&self) -> bool
[src]
Checks if the value of the field is AM
pub fn is_pm(&self) -> bool
[src]
Checks if the value of the field is PM
impl R<u32, Reg<u32, _ALARM>>
[src]
pub fn second(&self) -> SECOND_R
[src]
Bits 0:5 - Second
pub fn minute(&self) -> MINUTE_R
[src]
Bits 6:11 - Minute
pub fn hour(&self) -> HOUR_R
[src]
Bits 12:16 - Hour
pub fn day(&self) -> DAY_R
[src]
Bits 17:21 - Day
pub fn month(&self) -> MONTH_R
[src]
Bits 22:25 - Month
pub fn year(&self) -> YEAR_R
[src]
Bits 26:31 - Year
impl R<u8, SEL_A>
[src]
pub fn variant(&self) -> Variant<u8, SEL_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_ss(&self) -> bool
[src]
Checks if the value of the field is SS
pub fn is_mmss(&self) -> bool
[src]
Checks if the value of the field is MMSS
pub fn is_hhmmss(&self) -> bool
[src]
Checks if the value of the field is HHMMSS
pub fn is_ddhhmmss(&self) -> bool
[src]
Checks if the value of the field is DDHHMMSS
pub fn is_mmddhhmmss(&self) -> bool
[src]
Checks if the value of the field is MMDDHHMMSS
pub fn is_yymmddhhmmss(&self) -> bool
[src]
Checks if the value of the field is YYMMDDHHMMSS
impl R<u8, Reg<u8, _MASK>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_usart_ext_clk(&self) -> bool
[src]
Checks if the value of the field is USART_EXT_CLK
pub fn is_usart_int_clk(&self) -> bool
[src]
Checks if the value of the field is USART_INT_CLK
pub fn is_spi_slave(&self) -> bool
[src]
Checks if the value of the field is SPI_SLAVE
pub fn is_spi_master(&self) -> bool
[src]
Checks if the value of the field is SPI_MASTER
pub fn is_i2c_slave(&self) -> bool
[src]
Checks if the value of the field is I2C_SLAVE
pub fn is_i2c_master(&self) -> bool
[src]
Checks if the value of the field is I2C_MASTER
impl R<u32, Reg<u32, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:4 - Operating Mode
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 7 - Run in Standby
pub fn pinout(&self) -> PINOUT_R
[src]
Bit 16 - Pin Usage
pub fn sdahold(&self) -> SDAHOLD_R
[src]
Bits 20:21 - SDA Hold Time
pub fn mexttoen(&self) -> MEXTTOEN_R
[src]
Bit 22 - Master SCL Low Extend Timeout
pub fn sexttoen(&self) -> SEXTTOEN_R
[src]
Bit 23 - Slave SCL Low Extend Timeout
pub fn speed(&self) -> SPEED_R
[src]
Bits 24:25 - Transfer Speed
pub fn sclsm(&self) -> SCLSM_R
[src]
Bit 27 - SCL Clock Stretch Mode
pub fn inactout(&self) -> INACTOUT_R
[src]
Bits 28:29 - Inactive Time-Out
pub fn lowtouten(&self) -> LOWTOUTEN_R
[src]
Bit 30 - SCL Low Timeout Enable
impl R<u32, Reg<u32, _CTRLB>>
[src]
pub fn smen(&self) -> SMEN_R
[src]
Bit 8 - Smart Mode Enable
pub fn qcen(&self) -> QCEN_R
[src]
Bit 9 - Quick Command Enable
pub fn ackact(&self) -> ACKACT_R
[src]
Bit 18 - Acknowledge Action
impl R<u32, Reg<u32, _BAUD>>
[src]
pub fn baud(&self) -> BAUD_R
[src]
Bits 0:7 - Baud Rate Value
pub fn baudlow(&self) -> BAUDLOW_R
[src]
Bits 8:15 - Baud Rate Value Low
pub fn hsbaud(&self) -> HSBAUD_R
[src]
Bits 16:23 - High Speed Baud Rate Value
pub fn hsbaudlow(&self) -> HSBAUDLOW_R
[src]
Bits 24:31 - High Speed Baud Rate Value Low
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - Master On Bus Interrupt Disable
pub fn sb(&self) -> SB_R
[src]
Bit 1 - Slave On Bus Interrupt Disable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Disable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - Master On Bus Interrupt Enable
pub fn sb(&self) -> SB_R
[src]
Bit 1 - Slave On Bus Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn mb(&self) -> MB_R
[src]
Bit 0 - Master On Bus Interrupt
pub fn sb(&self) -> SB_R
[src]
Bit 1 - Slave On Bus Interrupt
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt
impl R<u16, Reg<u16, _STATUS>>
[src]
pub fn buserr(&self) -> BUSERR_R
[src]
Bit 0 - Bus Error
pub fn arblost(&self) -> ARBLOST_R
[src]
Bit 1 - Arbitration Lost
pub fn rxnack(&self) -> RXNACK_R
[src]
Bit 2 - Received Not Acknowledge
pub fn busstate(&self) -> BUSSTATE_R
[src]
Bits 4:5 - Bus State
pub fn lowtout(&self) -> LOWTOUT_R
[src]
Bit 6 - SCL Low Timeout
pub fn clkhold(&self) -> CLKHOLD_R
[src]
Bit 7 - Clock Hold
pub fn mexttout(&self) -> MEXTTOUT_R
[src]
Bit 8 - Master SCL Low Extend Timeout
pub fn sexttout(&self) -> SEXTTOUT_R
[src]
Bit 9 - Slave SCL Low Extend Timeout
pub fn lenerr(&self) -> LENERR_R
[src]
Bit 10 - Length Error
impl R<u32, Reg<u32, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - SERCOM Enable Synchronization Busy
pub fn sysop(&self) -> SYSOP_R
[src]
Bit 2 - System Operation Synchronization Busy
impl R<u32, Reg<u32, _ADDR>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:10 - Address Value
pub fn lenen(&self) -> LENEN_R
[src]
Bit 13 - Length Enable
pub fn hs(&self) -> HS_R
[src]
Bit 14 - High Speed Mode
pub fn tenbiten(&self) -> TENBITEN_R
[src]
Bit 15 - Ten Bit Addressing Enable
pub fn len(&self) -> LEN_R
[src]
Bits 16:23 - Length
impl R<u8, Reg<u8, _DATA>>
[src]
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_usart_ext_clk(&self) -> bool
[src]
Checks if the value of the field is USART_EXT_CLK
pub fn is_usart_int_clk(&self) -> bool
[src]
Checks if the value of the field is USART_INT_CLK
pub fn is_spi_slave(&self) -> bool
[src]
Checks if the value of the field is SPI_SLAVE
pub fn is_spi_master(&self) -> bool
[src]
Checks if the value of the field is SPI_MASTER
pub fn is_i2c_slave(&self) -> bool
[src]
Checks if the value of the field is I2C_SLAVE
pub fn is_i2c_master(&self) -> bool
[src]
Checks if the value of the field is I2C_MASTER
impl R<u32, Reg<u32, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:4 - Operating Mode
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 7 - Run during Standby
pub fn pinout(&self) -> PINOUT_R
[src]
Bit 16 - Pin Usage
pub fn sdahold(&self) -> SDAHOLD_R
[src]
Bits 20:21 - SDA Hold Time
pub fn sexttoen(&self) -> SEXTTOEN_R
[src]
Bit 23 - Slave SCL Low Extend Timeout
pub fn speed(&self) -> SPEED_R
[src]
Bits 24:25 - Transfer Speed
pub fn sclsm(&self) -> SCLSM_R
[src]
Bit 27 - SCL Clock Stretch Mode
pub fn lowtouten(&self) -> LOWTOUTEN_R
[src]
Bit 30 - SCL Low Timeout Enable
impl R<u32, Reg<u32, _CTRLB>>
[src]
pub fn smen(&self) -> SMEN_R
[src]
Bit 8 - Smart Mode Enable
pub fn gcmd(&self) -> GCMD_R
[src]
Bit 9 - PMBus Group Command
pub fn aacken(&self) -> AACKEN_R
[src]
Bit 10 - Automatic Address Acknowledge
pub fn amode(&self) -> AMODE_R
[src]
Bits 14:15 - Address Mode
pub fn ackact(&self) -> ACKACT_R
[src]
Bit 18 - Acknowledge Action
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn prec(&self) -> PREC_R
[src]
Bit 0 - Stop Received Interrupt Disable
pub fn amatch(&self) -> AMATCH_R
[src]
Bit 1 - Address Match Interrupt Disable
pub fn drdy(&self) -> DRDY_R
[src]
Bit 2 - Data Interrupt Disable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Disable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn prec(&self) -> PREC_R
[src]
Bit 0 - Stop Received Interrupt Enable
pub fn amatch(&self) -> AMATCH_R
[src]
Bit 1 - Address Match Interrupt Enable
pub fn drdy(&self) -> DRDY_R
[src]
Bit 2 - Data Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn prec(&self) -> PREC_R
[src]
Bit 0 - Stop Received Interrupt
pub fn amatch(&self) -> AMATCH_R
[src]
Bit 1 - Address Match Interrupt
pub fn drdy(&self) -> DRDY_R
[src]
Bit 2 - Data Interrupt
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt
impl R<u16, Reg<u16, _STATUS>>
[src]
pub fn buserr(&self) -> BUSERR_R
[src]
Bit 0 - Bus Error
pub fn coll(&self) -> COLL_R
[src]
Bit 1 - Transmit Collision
pub fn rxnack(&self) -> RXNACK_R
[src]
Bit 2 - Received Not Acknowledge
pub fn dir(&self) -> DIR_R
[src]
Bit 3 - Read/Write Direction
pub fn sr(&self) -> SR_R
[src]
Bit 4 - Repeated Start
pub fn lowtout(&self) -> LOWTOUT_R
[src]
Bit 6 - SCL Low Timeout
pub fn clkhold(&self) -> CLKHOLD_R
[src]
Bit 7 - Clock Hold
pub fn sexttout(&self) -> SEXTTOUT_R
[src]
Bit 9 - Slave SCL Low Extend Timeout
pub fn hs(&self) -> HS_R
[src]
Bit 10 - High Speed
impl R<u32, Reg<u32, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - SERCOM Enable Synchronization Busy
impl R<u32, Reg<u32, _ADDR>>
[src]
pub fn gencen(&self) -> GENCEN_R
[src]
Bit 0 - General Call Address Enable
pub fn addr(&self) -> ADDR_R
[src]
Bits 1:10 - Address Value
pub fn tenbiten(&self) -> TENBITEN_R
[src]
Bit 15 - Ten Bit Addressing Enable
pub fn addrmask(&self) -> ADDRMASK_R
[src]
Bits 17:26 - Address Mask
impl R<u8, Reg<u8, _DATA>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_usart_ext_clk(&self) -> bool
[src]
Checks if the value of the field is USART_EXT_CLK
pub fn is_usart_int_clk(&self) -> bool
[src]
Checks if the value of the field is USART_INT_CLK
pub fn is_spi_slave(&self) -> bool
[src]
Checks if the value of the field is SPI_SLAVE
pub fn is_spi_master(&self) -> bool
[src]
Checks if the value of the field is SPI_MASTER
pub fn is_i2c_slave(&self) -> bool
[src]
Checks if the value of the field is I2C_SLAVE
pub fn is_i2c_master(&self) -> bool
[src]
Checks if the value of the field is I2C_MASTER
impl R<u32, Reg<u32, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:4 - Operating Mode
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 7 - Run during Standby
pub fn ibon(&self) -> IBON_R
[src]
Bit 8 - Immediate Buffer Overflow Notification
pub fn dopo(&self) -> DOPO_R
[src]
Bits 16:17 - Data Out Pinout
pub fn dipo(&self) -> DIPO_R
[src]
Bits 20:21 - Data In Pinout
pub fn form(&self) -> FORM_R
[src]
Bits 24:27 - Frame Format
pub fn cpha(&self) -> CPHA_R
[src]
Bit 28 - Clock Phase
pub fn cpol(&self) -> CPOL_R
[src]
Bit 29 - Clock Polarity
pub fn dord(&self) -> DORD_R
[src]
Bit 30 - Data Order
impl R<u32, Reg<u32, _CTRLB>>
[src]
pub fn chsize(&self) -> CHSIZE_R
[src]
Bits 0:2 - Character Size
pub fn ploaden(&self) -> PLOADEN_R
[src]
Bit 6 - Data Preload Enable
pub fn ssde(&self) -> SSDE_R
[src]
Bit 9 - Slave Select Low Detect Enable
pub fn mssen(&self) -> MSSEN_R
[src]
Bit 13 - Master Slave Select Enable
pub fn amode(&self) -> AMODE_R
[src]
Bits 14:15 - Address Mode
pub fn rxen(&self) -> RXEN_R
[src]
Bit 17 - Receiver Enable
impl R<u8, Reg<u8, _BAUD>>
[src]
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt Disable
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt Disable
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt Disable
pub fn ssl(&self) -> SSL_R
[src]
Bit 3 - Slave Select Low Interrupt Disable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Disable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt Enable
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt Enable
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt Enable
pub fn ssl(&self) -> SSL_R
[src]
Bit 3 - Slave Select Low Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt
pub fn ssl(&self) -> SSL_R
[src]
Bit 3 - Slave Select Low Interrupt Flag
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt
impl R<u16, Reg<u16, _STATUS>>
[src]
impl R<u32, Reg<u32, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - SERCOM Enable Synchronization Busy
pub fn ctrlb(&self) -> CTRLB_R
[src]
Bit 2 - CTRLB Synchronization Busy
impl R<u32, Reg<u32, _ADDR>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:7 - Address Value
pub fn addrmask(&self) -> ADDRMASK_R
[src]
Bits 16:23 - Address Mask
impl R<u32, Reg<u32, _DATA>>
[src]
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_usart_ext_clk(&self) -> bool
[src]
Checks if the value of the field is USART_EXT_CLK
pub fn is_usart_int_clk(&self) -> bool
[src]
Checks if the value of the field is USART_INT_CLK
pub fn is_spi_slave(&self) -> bool
[src]
Checks if the value of the field is SPI_SLAVE
pub fn is_spi_master(&self) -> bool
[src]
Checks if the value of the field is SPI_MASTER
pub fn is_i2c_slave(&self) -> bool
[src]
Checks if the value of the field is I2C_SLAVE
pub fn is_i2c_master(&self) -> bool
[src]
Checks if the value of the field is I2C_MASTER
impl R<u32, Reg<u32, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:4 - Operating Mode
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 7 - Run during Standby
pub fn ibon(&self) -> IBON_R
[src]
Bit 8 - Immediate Buffer Overflow Notification
pub fn sampr(&self) -> SAMPR_R
[src]
Bits 13:15 - Sample
pub fn txpo(&self) -> TXPO_R
[src]
Bits 16:17 - Transmit Data Pinout
pub fn rxpo(&self) -> RXPO_R
[src]
Bits 20:21 - Receive Data Pinout
pub fn sampa(&self) -> SAMPA_R
[src]
Bits 22:23 - Sample Adjustment
pub fn form(&self) -> FORM_R
[src]
Bits 24:27 - Frame Format
pub fn cmode(&self) -> CMODE_R
[src]
Bit 28 - Communication Mode
pub fn cpol(&self) -> CPOL_R
[src]
Bit 29 - Clock Polarity
pub fn dord(&self) -> DORD_R
[src]
Bit 30 - Data Order
impl R<u32, Reg<u32, _CTRLB>>
[src]
pub fn chsize(&self) -> CHSIZE_R
[src]
Bits 0:2 - Character Size
pub fn sbmode(&self) -> SBMODE_R
[src]
Bit 6 - Stop Bit Mode
pub fn colden(&self) -> COLDEN_R
[src]
Bit 8 - Collision Detection Enable
pub fn sfde(&self) -> SFDE_R
[src]
Bit 9 - Start of Frame Detection Enable
pub fn enc(&self) -> ENC_R
[src]
Bit 10 - Encoding Format
pub fn pmode(&self) -> PMODE_R
[src]
Bit 13 - Parity Mode
pub fn txen(&self) -> TXEN_R
[src]
Bit 16 - Transmitter Enable
pub fn rxen(&self) -> RXEN_R
[src]
Bit 17 - Receiver Enable
impl R<u16, Reg<u16, _BAUD>>
[src]
impl R<u16, Reg<u16, _BAUD_FRAC_MODE>>
[src]
pub fn baud(&self) -> BAUD_R
[src]
Bits 0:12 - Baud Rate Value
pub fn fp(&self) -> FP_R
[src]
Bits 13:15 - Fractional Part
impl R<u16, Reg<u16, _BAUD_FRACFP_MODE>>
[src]
pub fn baud(&self) -> BAUD_R
[src]
Bits 0:12 - Baud Rate Value
pub fn fp(&self) -> FP_R
[src]
Bits 13:15 - Fractional Part
impl R<u16, Reg<u16, _BAUD_USARTFP_MODE>>
[src]
impl R<u8, Reg<u8, _RXPL>>
[src]
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt Disable
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt Disable
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt Disable
pub fn rxs(&self) -> RXS_R
[src]
Bit 3 - Receive Start Interrupt Disable
pub fn ctsic(&self) -> CTSIC_R
[src]
Bit 4 - Clear To Send Input Change Interrupt Disable
pub fn rxbrk(&self) -> RXBRK_R
[src]
Bit 5 - Break Received Interrupt Disable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Disable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt Enable
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt Enable
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt Enable
pub fn rxs(&self) -> RXS_R
[src]
Bit 3 - Receive Start Interrupt Enable
pub fn ctsic(&self) -> CTSIC_R
[src]
Bit 4 - Clear To Send Input Change Interrupt Enable
pub fn rxbrk(&self) -> RXBRK_R
[src]
Bit 5 - Break Received Interrupt Enable
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn dre(&self) -> DRE_R
[src]
Bit 0 - Data Register Empty Interrupt
pub fn txc(&self) -> TXC_R
[src]
Bit 1 - Transmit Complete Interrupt
pub fn rxc(&self) -> RXC_R
[src]
Bit 2 - Receive Complete Interrupt
pub fn ctsic(&self) -> CTSIC_R
[src]
Bit 4 - Clear To Send Input Change Interrupt
pub fn rxbrk(&self) -> RXBRK_R
[src]
Bit 5 - Break Received Interrupt
pub fn error(&self) -> ERROR_R
[src]
Bit 7 - Combined Error Interrupt
impl R<u16, Reg<u16, _STATUS>>
[src]
pub fn perr(&self) -> PERR_R
[src]
Bit 0 - Parity Error
pub fn ferr(&self) -> FERR_R
[src]
Bit 1 - Frame Error
pub fn bufovf(&self) -> BUFOVF_R
[src]
Bit 2 - Buffer Overflow
pub fn cts(&self) -> CTS_R
[src]
Bit 3 - Clear To Send
pub fn isf(&self) -> ISF_R
[src]
Bit 4 - Inconsistent Sync Field
pub fn coll(&self) -> COLL_R
[src]
Bit 5 - Collision Detected
impl R<u32, Reg<u32, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - SERCOM Enable Synchronization Busy
pub fn ctrlb(&self) -> CTRLB_R
[src]
Bit 2 - CTRLB Synchronization Busy
impl R<u16, Reg<u16, _DATA>>
[src]
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u32, Reg<u32, _INTENCLR>>
[src]
pub fn xoscrdy(&self) -> XOSCRDY_R
[src]
Bit 0 - XOSC Ready Interrupt Enable
pub fn xosc32krdy(&self) -> XOSC32KRDY_R
[src]
Bit 1 - XOSC32K Ready Interrupt Enable
pub fn osc32krdy(&self) -> OSC32KRDY_R
[src]
Bit 2 - OSC32K Ready Interrupt Enable
pub fn osc8mrdy(&self) -> OSC8MRDY_R
[src]
Bit 3 - OSC8M Ready Interrupt Enable
pub fn dfllrdy(&self) -> DFLLRDY_R
[src]
Bit 4 - DFLL Ready Interrupt Enable
pub fn dflloob(&self) -> DFLLOOB_R
[src]
Bit 5 - DFLL Out Of Bounds Interrupt Enable
pub fn dflllckf(&self) -> DFLLLCKF_R
[src]
Bit 6 - DFLL Lock Fine Interrupt Enable
pub fn dflllckc(&self) -> DFLLLCKC_R
[src]
Bit 7 - DFLL Lock Coarse Interrupt Enable
pub fn dfllrcs(&self) -> DFLLRCS_R
[src]
Bit 8 - DFLL Reference Clock Stopped Interrupt Enable
pub fn bod33rdy(&self) -> BOD33RDY_R
[src]
Bit 9 - BOD33 Ready Interrupt Enable
pub fn bod33det(&self) -> BOD33DET_R
[src]
Bit 10 - BOD33 Detection Interrupt Enable
pub fn b33srdy(&self) -> B33SRDY_R
[src]
Bit 11 - BOD33 Synchronization Ready Interrupt Enable
pub fn dplllckr(&self) -> DPLLLCKR_R
[src]
Bit 15 - DPLL Lock Rise Interrupt Enable
pub fn dplllckf(&self) -> DPLLLCKF_R
[src]
Bit 16 - DPLL Lock Fall Interrupt Enable
pub fn dplllto(&self) -> DPLLLTO_R
[src]
Bit 17 - DPLL Lock Timeout Interrupt Enable
impl R<u32, Reg<u32, _INTENSET>>
[src]
pub fn xoscrdy(&self) -> XOSCRDY_R
[src]
Bit 0 - XOSC Ready Interrupt Enable
pub fn xosc32krdy(&self) -> XOSC32KRDY_R
[src]
Bit 1 - XOSC32K Ready Interrupt Enable
pub fn osc32krdy(&self) -> OSC32KRDY_R
[src]
Bit 2 - OSC32K Ready Interrupt Enable
pub fn osc8mrdy(&self) -> OSC8MRDY_R
[src]
Bit 3 - OSC8M Ready Interrupt Enable
pub fn dfllrdy(&self) -> DFLLRDY_R
[src]
Bit 4 - DFLL Ready Interrupt Enable
pub fn dflloob(&self) -> DFLLOOB_R
[src]
Bit 5 - DFLL Out Of Bounds Interrupt Enable
pub fn dflllckf(&self) -> DFLLLCKF_R
[src]
Bit 6 - DFLL Lock Fine Interrupt Enable
pub fn dflllckc(&self) -> DFLLLCKC_R
[src]
Bit 7 - DFLL Lock Coarse Interrupt Enable
pub fn dfllrcs(&self) -> DFLLRCS_R
[src]
Bit 8 - DFLL Reference Clock Stopped Interrupt Enable
pub fn bod33rdy(&self) -> BOD33RDY_R
[src]
Bit 9 - BOD33 Ready Interrupt Enable
pub fn bod33det(&self) -> BOD33DET_R
[src]
Bit 10 - BOD33 Detection Interrupt Enable
pub fn b33srdy(&self) -> B33SRDY_R
[src]
Bit 11 - BOD33 Synchronization Ready Interrupt Enable
pub fn dplllckr(&self) -> DPLLLCKR_R
[src]
Bit 15 - DPLL Lock Rise Interrupt Enable
pub fn dplllckf(&self) -> DPLLLCKF_R
[src]
Bit 16 - DPLL Lock Fall Interrupt Enable
pub fn dplllto(&self) -> DPLLLTO_R
[src]
Bit 17 - DPLL Lock Timeout Interrupt Enable
impl R<u32, Reg<u32, _INTFLAG>>
[src]
pub fn xoscrdy(&self) -> XOSCRDY_R
[src]
Bit 0 - XOSC Ready
pub fn xosc32krdy(&self) -> XOSC32KRDY_R
[src]
Bit 1 - XOSC32K Ready
pub fn osc32krdy(&self) -> OSC32KRDY_R
[src]
Bit 2 - OSC32K Ready
pub fn osc8mrdy(&self) -> OSC8MRDY_R
[src]
Bit 3 - OSC8M Ready
pub fn dfllrdy(&self) -> DFLLRDY_R
[src]
Bit 4 - DFLL Ready
pub fn dflloob(&self) -> DFLLOOB_R
[src]
Bit 5 - DFLL Out Of Bounds
pub fn dflllckf(&self) -> DFLLLCKF_R
[src]
Bit 6 - DFLL Lock Fine
pub fn dflllckc(&self) -> DFLLLCKC_R
[src]
Bit 7 - DFLL Lock Coarse
pub fn dfllrcs(&self) -> DFLLRCS_R
[src]
Bit 8 - DFLL Reference Clock Stopped
pub fn bod33rdy(&self) -> BOD33RDY_R
[src]
Bit 9 - BOD33 Ready
pub fn bod33det(&self) -> BOD33DET_R
[src]
Bit 10 - BOD33 Detection
pub fn b33srdy(&self) -> B33SRDY_R
[src]
Bit 11 - BOD33 Synchronization Ready
pub fn dplllckr(&self) -> DPLLLCKR_R
[src]
Bit 15 - DPLL Lock Rise
pub fn dplllckf(&self) -> DPLLLCKF_R
[src]
Bit 16 - DPLL Lock Fall
pub fn dplllto(&self) -> DPLLLTO_R
[src]
Bit 17 - DPLL Lock Timeout
impl R<u32, Reg<u32, _PCLKSR>>
[src]
pub fn xoscrdy(&self) -> XOSCRDY_R
[src]
Bit 0 - XOSC Ready
pub fn xosc32krdy(&self) -> XOSC32KRDY_R
[src]
Bit 1 - XOSC32K Ready
pub fn osc32krdy(&self) -> OSC32KRDY_R
[src]
Bit 2 - OSC32K Ready
pub fn osc8mrdy(&self) -> OSC8MRDY_R
[src]
Bit 3 - OSC8M Ready
pub fn dfllrdy(&self) -> DFLLRDY_R
[src]
Bit 4 - DFLL Ready
pub fn dflloob(&self) -> DFLLOOB_R
[src]
Bit 5 - DFLL Out Of Bounds
pub fn dflllckf(&self) -> DFLLLCKF_R
[src]
Bit 6 - DFLL Lock Fine
pub fn dflllckc(&self) -> DFLLLCKC_R
[src]
Bit 7 - DFLL Lock Coarse
pub fn dfllrcs(&self) -> DFLLRCS_R
[src]
Bit 8 - DFLL Reference Clock Stopped
pub fn bod33rdy(&self) -> BOD33RDY_R
[src]
Bit 9 - BOD33 Ready
pub fn bod33det(&self) -> BOD33DET_R
[src]
Bit 10 - BOD33 Detection
pub fn b33srdy(&self) -> B33SRDY_R
[src]
Bit 11 - BOD33 Synchronization Ready
pub fn dplllckr(&self) -> DPLLLCKR_R
[src]
Bit 15 - DPLL Lock Rise
pub fn dplllckf(&self) -> DPLLLCKF_R
[src]
Bit 16 - DPLL Lock Fall
pub fn dplllto(&self) -> DPLLLTO_R
[src]
Bit 17 - DPLL Lock Timeout
impl R<u8, GAIN_A>
[src]
pub fn variant(&self) -> Variant<u8, GAIN_A>
[src]
Get enumerated values variant
pub fn is_0(&self) -> bool
[src]
Checks if the value of the field is _0
pub fn is_1(&self) -> bool
[src]
Checks if the value of the field is _1
pub fn is_2(&self) -> bool
[src]
Checks if the value of the field is _2
pub fn is_3(&self) -> bool
[src]
Checks if the value of the field is _3
pub fn is_4(&self) -> bool
[src]
Checks if the value of the field is _4
impl R<u16, Reg<u16, _XOSC>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Oscillator Enable
pub fn xtalen(&self) -> XTALEN_R
[src]
Bit 2 - Crystal Oscillator Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Control
pub fn gain(&self) -> GAIN_R
[src]
Bits 8:10 - Oscillator Gain
pub fn ampgc(&self) -> AMPGC_R
[src]
Bit 11 - Automatic Amplitude Gain Control
pub fn startup(&self) -> STARTUP_R
[src]
Bits 12:15 - Start-Up Time
impl R<u16, Reg<u16, _XOSC32K>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Oscillator Enable
pub fn xtalen(&self) -> XTALEN_R
[src]
Bit 2 - Crystal Oscillator Enable
pub fn en32k(&self) -> EN32K_R
[src]
Bit 3 - 32kHz Output Enable
pub fn en1k(&self) -> EN1K_R
[src]
Bit 4 - 1kHz Output Enable
pub fn aampen(&self) -> AAMPEN_R
[src]
Bit 5 - Automatic Amplitude Control Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Control
pub fn startup(&self) -> STARTUP_R
[src]
Bits 8:10 - Oscillator Start-Up Time
pub fn wrtlock(&self) -> WRTLOCK_R
[src]
Bit 12 - Write Lock
impl R<u32, Reg<u32, _OSC32K>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Oscillator Enable
pub fn en32k(&self) -> EN32K_R
[src]
Bit 2 - 32kHz Output Enable
pub fn en1k(&self) -> EN1K_R
[src]
Bit 3 - 1kHz Output Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Control
pub fn startup(&self) -> STARTUP_R
[src]
Bits 8:10 - Oscillator Start-Up Time
pub fn wrtlock(&self) -> WRTLOCK_R
[src]
Bit 12 - Write Lock
pub fn calib(&self) -> CALIB_R
[src]
Bits 16:22 - Oscillator Calibration
impl R<u8, Reg<u8, _OSCULP32K>>
[src]
pub fn calib(&self) -> CALIB_R
[src]
Bits 0:4 - Oscillator Calibration
pub fn wrtlock(&self) -> WRTLOCK_R
[src]
Bit 7 - Write Lock
impl R<u8, PRESC_A>
[src]
pub fn variant(&self) -> PRESC_A
[src]
Get enumerated values variant
pub fn is_0(&self) -> bool
[src]
Checks if the value of the field is _0
pub fn is_1(&self) -> bool
[src]
Checks if the value of the field is _1
pub fn is_2(&self) -> bool
[src]
Checks if the value of the field is _2
pub fn is_3(&self) -> bool
[src]
Checks if the value of the field is _3
impl R<u8, FRANGE_A>
[src]
pub fn variant(&self) -> FRANGE_A
[src]
Get enumerated values variant
pub fn is_0(&self) -> bool
[src]
Checks if the value of the field is _0
pub fn is_1(&self) -> bool
[src]
Checks if the value of the field is _1
pub fn is_2(&self) -> bool
[src]
Checks if the value of the field is _2
pub fn is_3(&self) -> bool
[src]
Checks if the value of the field is _3
impl R<u32, Reg<u32, _OSC8M>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Oscillator Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Control
pub fn presc(&self) -> PRESC_R
[src]
Bits 8:9 - Oscillator Prescaler
pub fn calib(&self) -> CALIB_R
[src]
Bits 16:27 - Oscillator Calibration
pub fn frange(&self) -> FRANGE_R
[src]
Bits 30:31 - Oscillator Frequency Range
impl R<u16, Reg<u16, _DFLLCTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - DFLL Enable
pub fn mode(&self) -> MODE_R
[src]
Bit 2 - Operating Mode Selection
pub fn stable(&self) -> STABLE_R
[src]
Bit 3 - Stable DFLL Frequency
pub fn llaw(&self) -> LLAW_R
[src]
Bit 4 - Lose Lock After Wake
pub fn usbcrm(&self) -> USBCRM_R
[src]
Bit 5 - USB Clock Recovery Mode
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Control
pub fn ccdis(&self) -> CCDIS_R
[src]
Bit 8 - Chill Cycle Disable
pub fn qldis(&self) -> QLDIS_R
[src]
Bit 9 - Quick Lock Disable
pub fn bplckc(&self) -> BPLCKC_R
[src]
Bit 10 - Bypass Coarse Lock
pub fn waitlock(&self) -> WAITLOCK_R
[src]
Bit 11 - Wait Lock
impl R<u32, Reg<u32, _DFLLVAL>>
[src]
pub fn fine(&self) -> FINE_R
[src]
Bits 0:9 - Fine Value
pub fn coarse(&self) -> COARSE_R
[src]
Bits 10:15 - Coarse Value
pub fn diff(&self) -> DIFF_R
[src]
Bits 16:31 - Multiplication Ratio Difference
impl R<u32, Reg<u32, _DFLLMUL>>
[src]
pub fn mul(&self) -> MUL_R
[src]
Bits 0:15 - DFLL Multiply Factor
pub fn fstep(&self) -> FSTEP_R
[src]
Bits 16:25 - Fine Maximum Step
pub fn cstep(&self) -> CSTEP_R
[src]
Bits 26:31 - Coarse Maximum Step
impl R<u8, ACTION_A>
[src]
pub fn variant(&self) -> Variant<u8, ACTION_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
pub fn is_interrupt(&self) -> bool
[src]
Checks if the value of the field is INTERRUPT
impl R<u8, PSEL_A>
[src]
pub fn variant(&self) -> PSEL_A
[src]
Get enumerated values variant
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div32(&self) -> bool
[src]
Checks if the value of the field is DIV32
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div128(&self) -> bool
[src]
Checks if the value of the field is DIV128
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div512(&self) -> bool
[src]
Checks if the value of the field is DIV512
pub fn is_div1k(&self) -> bool
[src]
Checks if the value of the field is DIV1K
pub fn is_div2k(&self) -> bool
[src]
Checks if the value of the field is DIV2K
pub fn is_div4k(&self) -> bool
[src]
Checks if the value of the field is DIV4K
pub fn is_div8k(&self) -> bool
[src]
Checks if the value of the field is DIV8K
pub fn is_div16k(&self) -> bool
[src]
Checks if the value of the field is DIV16K
pub fn is_div32k(&self) -> bool
[src]
Checks if the value of the field is DIV32K
pub fn is_div64k(&self) -> bool
[src]
Checks if the value of the field is DIV64K
impl R<u32, Reg<u32, _BOD33>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn hyst(&self) -> HYST_R
[src]
Bit 2 - Hysteresis
pub fn action(&self) -> ACTION_R
[src]
Bits 3:4 - BOD33 Action
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn mode(&self) -> MODE_R
[src]
Bit 8 - Operation Mode
pub fn cen(&self) -> CEN_R
[src]
Bit 9 - Clock Enable
pub fn psel(&self) -> PSEL_R
[src]
Bits 12:15 - Prescaler Select
pub fn level(&self) -> LEVEL_R
[src]
Bits 16:21 - BOD33 Threshold Level
impl R<u16, Reg<u16, _VREG>>
[src]
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn forceldo(&self) -> FORCELDO_R
[src]
Bit 13 - Force LDO Voltage Regulator
impl R<u32, Reg<u32, _VREF>>
[src]
pub fn tsen(&self) -> TSEN_R
[src]
Bit 1 - Temperature Sensor Enable
pub fn bgouten(&self) -> BGOUTEN_R
[src]
Bit 2 - Bandgap Output Enable
pub fn calib(&self) -> CALIB_R
[src]
Bits 16:26 - Bandgap Voltage Generator Calibration
impl R<u8, Reg<u8, _DPLLCTRLA>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - DPLL Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 6 - Run in Standby
pub fn ondemand(&self) -> ONDEMAND_R
[src]
Bit 7 - On Demand Clock Activation
impl R<u32, Reg<u32, _DPLLRATIO>>
[src]
pub fn ldr(&self) -> LDR_R
[src]
Bits 0:11 - Loop Divider Ratio
pub fn ldrfrac(&self) -> LDRFRAC_R
[src]
Bits 16:19 - Loop Divider Ratio Fractional Part
impl R<u8, FILTER_A>
[src]
pub fn variant(&self) -> FILTER_A
[src]
Get enumerated values variant
pub fn is_default(&self) -> bool
[src]
Checks if the value of the field is DEFAULT
pub fn is_lbfilt(&self) -> bool
[src]
Checks if the value of the field is LBFILT
pub fn is_hbfilt(&self) -> bool
[src]
Checks if the value of the field is HBFILT
pub fn is_hdfilt(&self) -> bool
[src]
Checks if the value of the field is HDFILT
impl R<u8, REFCLK_A>
[src]
pub fn variant(&self) -> Variant<u8, REFCLK_A>
[src]
Get enumerated values variant
pub fn is_ref0(&self) -> bool
[src]
Checks if the value of the field is REF0
pub fn is_ref1(&self) -> bool
[src]
Checks if the value of the field is REF1
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
impl R<u8, LTIME_A>
[src]
pub fn variant(&self) -> Variant<u8, LTIME_A>
[src]
Get enumerated values variant
pub fn is_default(&self) -> bool
[src]
Checks if the value of the field is DEFAULT
pub fn is_8ms(&self) -> bool
[src]
Checks if the value of the field is _8MS
pub fn is_9ms(&self) -> bool
[src]
Checks if the value of the field is _9MS
pub fn is_10ms(&self) -> bool
[src]
Checks if the value of the field is _10MS
pub fn is_11ms(&self) -> bool
[src]
Checks if the value of the field is _11MS
impl R<u32, Reg<u32, _DPLLCTRLB>>
[src]
pub fn filter(&self) -> FILTER_R
[src]
Bits 0:1 - Proportional Integral Filter Selection
pub fn lpen(&self) -> LPEN_R
[src]
Bit 2 - Low-Power Enable
pub fn wuf(&self) -> WUF_R
[src]
Bit 3 - Wake Up Fast
pub fn refclk(&self) -> REFCLK_R
[src]
Bits 4:5 - Reference Clock Selection
pub fn ltime(&self) -> LTIME_R
[src]
Bits 8:10 - Lock Time
pub fn lbypass(&self) -> LBYPASS_R
[src]
Bit 12 - Lock Bypass
pub fn div(&self) -> DIV_R
[src]
Bits 16:26 - Clock Divider
impl R<u8, Reg<u8, _DPLLSTATUS>>
[src]
pub fn lock(&self) -> LOCK_R
[src]
Bit 0 - DPLL Lock Status
pub fn clkrdy(&self) -> CLKRDY_R
[src]
Bit 1 - Output Clock Ready
pub fn enable(&self) -> ENABLE_R
[src]
Bit 2 - DPLL Enable
pub fn div(&self) -> DIV_R
[src]
Bit 3 - Divider Enable
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_count8(&self) -> bool
[src]
Checks if the value of the field is COUNT8
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
impl R<u8, WAVEGEN_A>
[src]
pub fn variant(&self) -> WAVEGEN_A
[src]
Get enumerated values variant
pub fn is_nfrq(&self) -> bool
[src]
Checks if the value of the field is NFRQ
pub fn is_mfrq(&self) -> bool
[src]
Checks if the value of the field is MFRQ
pub fn is_npwm(&self) -> bool
[src]
Checks if the value of the field is NPWM
pub fn is_mpwm(&self) -> bool
[src]
Checks if the value of the field is MPWM
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> PRESCALER_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u8, PRESCSYNC_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>
[src]
Get enumerated values variant
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
pub fn is_presc(&self) -> bool
[src]
Checks if the value of the field is PRESC
pub fn is_resync(&self) -> bool
[src]
Checks if the value of the field is RESYNC
impl R<u16, Reg<u16, _CTRLA>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - TC Mode
pub fn wavegen(&self) -> WAVEGEN_R
[src]
Bits 5:6 - Waveform Generation Operation
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:10 - Prescaler
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 11 - Run in Standby
pub fn prescsync(&self) -> PRESCSYNC_R
[src]
Bits 12:13 - Prescaler and Counter Synchronization
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:4 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
pub fn rreq(&self) -> RREQ_R
[src]
Bit 15 - Read Request
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBCLR>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBSET>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, Reg<u8, _CTRLC>>
[src]
pub fn inven0(&self) -> INVEN0_R
[src]
Bit 0 - Output Waveform 0 Invert Enable
pub fn inven1(&self) -> INVEN1_R
[src]
Bit 1 - Output Waveform 1 Invert Enable
pub fn cpten0(&self) -> CPTEN0_R
[src]
Bit 4 - Capture Channel 0 Enable
pub fn cpten1(&self) -> CPTEN1_R
[src]
Bit 5 - Capture Channel 1 Enable
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, EVACT_A>
[src]
pub fn variant(&self) -> Variant<u8, EVACT_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_count(&self) -> bool
[src]
Checks if the value of the field is COUNT
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
pub fn is_ppw(&self) -> bool
[src]
Checks if the value of the field is PPW
pub fn is_pwp(&self) -> bool
[src]
Checks if the value of the field is PWP
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn evact(&self) -> EVACT_R
[src]
Bits 0:2 - Event Action
pub fn tcinv(&self) -> TCINV_R
[src]
Bit 4 - TC Inverted Event Input
pub fn tcei(&self) -> TCEI_R
[src]
Bit 5 - TC Event Input
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 8 - Overflow/Underflow Event Output Enable
pub fn mceo0(&self) -> MCEO0_R
[src]
Bit 12 - Match or Capture Channel 0 Event Output Enable
pub fn mceo1(&self) -> MCEO1_R
[src]
Bit 13 - Match or Capture Channel 1 Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn stop(&self) -> STOP_R
[src]
Bit 3 - Stop
pub fn slave(&self) -> SLAVE_R
[src]
Bit 4 - Slave
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u8, Reg<u8, _COUNT>>
[src]
impl R<u8, Reg<u8, _PER>>
[src]
impl R<u8, Reg<u8, _CC>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_count8(&self) -> bool
[src]
Checks if the value of the field is COUNT8
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
impl R<u8, WAVEGEN_A>
[src]
pub fn variant(&self) -> WAVEGEN_A
[src]
Get enumerated values variant
pub fn is_nfrq(&self) -> bool
[src]
Checks if the value of the field is NFRQ
pub fn is_mfrq(&self) -> bool
[src]
Checks if the value of the field is MFRQ
pub fn is_npwm(&self) -> bool
[src]
Checks if the value of the field is NPWM
pub fn is_mpwm(&self) -> bool
[src]
Checks if the value of the field is MPWM
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> PRESCALER_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u8, PRESCSYNC_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>
[src]
Get enumerated values variant
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
pub fn is_presc(&self) -> bool
[src]
Checks if the value of the field is PRESC
pub fn is_resync(&self) -> bool
[src]
Checks if the value of the field is RESYNC
impl R<u16, Reg<u16, _CTRLA>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - TC Mode
pub fn wavegen(&self) -> WAVEGEN_R
[src]
Bits 5:6 - Waveform Generation Operation
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:10 - Prescaler
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 11 - Run in Standby
pub fn prescsync(&self) -> PRESCSYNC_R
[src]
Bits 12:13 - Prescaler and Counter Synchronization
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:4 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
pub fn rreq(&self) -> RREQ_R
[src]
Bit 15 - Read Request
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBCLR>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBSET>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, Reg<u8, _CTRLC>>
[src]
pub fn inven0(&self) -> INVEN0_R
[src]
Bit 0 - Output Waveform 0 Invert Enable
pub fn inven1(&self) -> INVEN1_R
[src]
Bit 1 - Output Waveform 1 Invert Enable
pub fn cpten0(&self) -> CPTEN0_R
[src]
Bit 4 - Capture Channel 0 Enable
pub fn cpten1(&self) -> CPTEN1_R
[src]
Bit 5 - Capture Channel 1 Enable
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, EVACT_A>
[src]
pub fn variant(&self) -> Variant<u8, EVACT_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_count(&self) -> bool
[src]
Checks if the value of the field is COUNT
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
pub fn is_ppw(&self) -> bool
[src]
Checks if the value of the field is PPW
pub fn is_pwp(&self) -> bool
[src]
Checks if the value of the field is PWP
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn evact(&self) -> EVACT_R
[src]
Bits 0:2 - Event Action
pub fn tcinv(&self) -> TCINV_R
[src]
Bit 4 - TC Inverted Event Input
pub fn tcei(&self) -> TCEI_R
[src]
Bit 5 - TC Event Input
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 8 - Overflow/Underflow Event Output Enable
pub fn mceo0(&self) -> MCEO0_R
[src]
Bit 12 - Match or Capture Channel 0 Event Output Enable
pub fn mceo1(&self) -> MCEO1_R
[src]
Bit 13 - Match or Capture Channel 1 Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn stop(&self) -> STOP_R
[src]
Bit 3 - Stop
pub fn slave(&self) -> SLAVE_R
[src]
Bit 4 - Slave
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u16, Reg<u16, _COUNT>>
[src]
impl R<u16, Reg<u16, _CC>>
[src]
impl R<u8, MODE_A>
[src]
pub fn variant(&self) -> Variant<u8, MODE_A>
[src]
Get enumerated values variant
pub fn is_count16(&self) -> bool
[src]
Checks if the value of the field is COUNT16
pub fn is_count8(&self) -> bool
[src]
Checks if the value of the field is COUNT8
pub fn is_count32(&self) -> bool
[src]
Checks if the value of the field is COUNT32
impl R<u8, WAVEGEN_A>
[src]
pub fn variant(&self) -> WAVEGEN_A
[src]
Get enumerated values variant
pub fn is_nfrq(&self) -> bool
[src]
Checks if the value of the field is NFRQ
pub fn is_mfrq(&self) -> bool
[src]
Checks if the value of the field is MFRQ
pub fn is_npwm(&self) -> bool
[src]
Checks if the value of the field is NPWM
pub fn is_mpwm(&self) -> bool
[src]
Checks if the value of the field is MPWM
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> PRESCALER_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u8, PRESCSYNC_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>
[src]
Get enumerated values variant
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
pub fn is_presc(&self) -> bool
[src]
Checks if the value of the field is PRESC
pub fn is_resync(&self) -> bool
[src]
Checks if the value of the field is RESYNC
impl R<u16, Reg<u16, _CTRLA>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn mode(&self) -> MODE_R
[src]
Bits 2:3 - TC Mode
pub fn wavegen(&self) -> WAVEGEN_R
[src]
Bits 5:6 - Waveform Generation Operation
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:10 - Prescaler
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 11 - Run in Standby
pub fn prescsync(&self) -> PRESCSYNC_R
[src]
Bits 12:13 - Prescaler and Counter Synchronization
impl R<u16, Reg<u16, _READREQ>>
[src]
pub fn addr(&self) -> ADDR_R
[src]
Bits 0:4 - Address
pub fn rcont(&self) -> RCONT_R
[src]
Bit 14 - Read Continuously
pub fn rreq(&self) -> RREQ_R
[src]
Bit 15 - Read Request
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBCLR>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
impl R<u8, Reg<u8, _CTRLBSET>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn cmd(&self) -> CMD_R
[src]
Bits 6:7 - Command
impl R<u8, Reg<u8, _CTRLC>>
[src]
pub fn inven0(&self) -> INVEN0_R
[src]
Bit 0 - Output Waveform 0 Invert Enable
pub fn inven1(&self) -> INVEN1_R
[src]
Bit 1 - Output Waveform 1 Invert Enable
pub fn cpten0(&self) -> CPTEN0_R
[src]
Bit 4 - Capture Channel 0 Enable
pub fn cpten1(&self) -> CPTEN1_R
[src]
Bit 5 - Capture Channel 1 Enable
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
impl R<u8, EVACT_A>
[src]
pub fn variant(&self) -> Variant<u8, EVACT_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_count(&self) -> bool
[src]
Checks if the value of the field is COUNT
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
pub fn is_ppw(&self) -> bool
[src]
Checks if the value of the field is PPW
pub fn is_pwp(&self) -> bool
[src]
Checks if the value of the field is PWP
impl R<u16, Reg<u16, _EVCTRL>>
[src]
pub fn evact(&self) -> EVACT_R
[src]
Bits 0:2 - Event Action
pub fn tcinv(&self) -> TCINV_R
[src]
Bit 4 - TC Inverted Event Input
pub fn tcei(&self) -> TCEI_R
[src]
Bit 5 - TC Event Input
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 8 - Overflow/Underflow Event Output Enable
pub fn mceo0(&self) -> MCEO0_R
[src]
Bit 12 - Match or Capture Channel 0 Event Output Enable
pub fn mceo1(&self) -> MCEO1_R
[src]
Bit 13 - Match or Capture Channel 1 Event Output Enable
impl R<u8, Reg<u8, _INTENCLR>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTENSET>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error Interrupt Enable
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1 Interrupt Enable
impl R<u8, Reg<u8, _INTFLAG>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow
pub fn err(&self) -> ERR_R
[src]
Bit 1 - Error
pub fn syncrdy(&self) -> SYNCRDY_R
[src]
Bit 3 - Synchronization Ready
pub fn mc0(&self) -> MC0_R
[src]
Bit 4 - Match or Capture Channel 0
pub fn mc1(&self) -> MC1_R
[src]
Bit 5 - Match or Capture Channel 1
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn stop(&self) -> STOP_R
[src]
Bit 3 - Stop
pub fn slave(&self) -> SLAVE_R
[src]
Bit 4 - Slave
pub fn syncbusy(&self) -> SYNCBUSY_R
[src]
Bit 7 - Synchronization Busy
impl R<u32, Reg<u32, _COUNT>>
[src]
impl R<u32, Reg<u32, _CC>>
[src]
impl R<u8, RESOLUTION_A>
[src]
pub fn variant(&self) -> RESOLUTION_A
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_dith4(&self) -> bool
[src]
Checks if the value of the field is DITH4
pub fn is_dith5(&self) -> bool
[src]
Checks if the value of the field is DITH5
pub fn is_dith6(&self) -> bool
[src]
Checks if the value of the field is DITH6
impl R<u8, PRESCALER_A>
[src]
pub fn variant(&self) -> PRESCALER_A
[src]
Get enumerated values variant
pub fn is_div1(&self) -> bool
[src]
Checks if the value of the field is DIV1
pub fn is_div2(&self) -> bool
[src]
Checks if the value of the field is DIV2
pub fn is_div4(&self) -> bool
[src]
Checks if the value of the field is DIV4
pub fn is_div8(&self) -> bool
[src]
Checks if the value of the field is DIV8
pub fn is_div16(&self) -> bool
[src]
Checks if the value of the field is DIV16
pub fn is_div64(&self) -> bool
[src]
Checks if the value of the field is DIV64
pub fn is_div256(&self) -> bool
[src]
Checks if the value of the field is DIV256
pub fn is_div1024(&self) -> bool
[src]
Checks if the value of the field is DIV1024
impl R<u8, PRESCSYNC_A>
[src]
pub fn variant(&self) -> Variant<u8, PRESCSYNC_A>
[src]
Get enumerated values variant
pub fn is_gclk(&self) -> bool
[src]
Checks if the value of the field is GCLK
pub fn is_presc(&self) -> bool
[src]
Checks if the value of the field is PRESC
pub fn is_resync(&self) -> bool
[src]
Checks if the value of the field is RESYNC
impl R<u32, Reg<u32, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn resolution(&self) -> RESOLUTION_R
[src]
Bits 5:6 - Enhanced Resolution
pub fn prescaler(&self) -> PRESCALER_R
[src]
Bits 8:10 - Prescaler
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 11 - Run in Standby
pub fn prescsync(&self) -> PRESCSYNC_R
[src]
Bits 12:13 - Prescaler and Counter Synchronization Selection
pub fn alock(&self) -> ALOCK_R
[src]
Bit 14 - Auto Lock
pub fn cpten0(&self) -> CPTEN0_R
[src]
Bit 24 - Capture Channel 0 Enable
pub fn cpten1(&self) -> CPTEN1_R
[src]
Bit 25 - Capture Channel 1 Enable
pub fn cpten2(&self) -> CPTEN2_R
[src]
Bit 26 - Capture Channel 2 Enable
pub fn cpten3(&self) -> CPTEN3_R
[src]
Bit 27 - Capture Channel 3 Enable
impl R<u8, IDXCMD_A>
[src]
pub fn variant(&self) -> IDXCMD_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_set(&self) -> bool
[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_hold(&self) -> bool
[src]
Checks if the value of the field is HOLD
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_readsync(&self) -> bool
[src]
Checks if the value of the field is READSYNC
impl R<u8, Reg<u8, _CTRLBCLR>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn lupd(&self) -> LUPD_R
[src]
Bit 1 - Lock Update
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn idxcmd(&self) -> IDXCMD_R
[src]
Bits 3:4 - Ramp Index Command
pub fn cmd(&self) -> CMD_R
[src]
Bits 5:7 - TCC Command
impl R<u8, IDXCMD_A>
[src]
pub fn variant(&self) -> IDXCMD_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_set(&self) -> bool
[src]
Checks if the value of the field is SET
pub fn is_clear(&self) -> bool
[src]
Checks if the value of the field is CLEAR
pub fn is_hold(&self) -> bool
[src]
Checks if the value of the field is HOLD
impl R<u8, CMD_A>
[src]
pub fn variant(&self) -> Variant<u8, CMD_A>
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
pub fn is_update(&self) -> bool
[src]
Checks if the value of the field is UPDATE
pub fn is_readsync(&self) -> bool
[src]
Checks if the value of the field is READSYNC
impl R<u8, Reg<u8, _CTRLBSET>>
[src]
pub fn dir(&self) -> DIR_R
[src]
Bit 0 - Counter Direction
pub fn lupd(&self) -> LUPD_R
[src]
Bit 1 - Lock Update
pub fn oneshot(&self) -> ONESHOT_R
[src]
Bit 2 - One-Shot
pub fn idxcmd(&self) -> IDXCMD_R
[src]
Bits 3:4 - Ramp Index Command
pub fn cmd(&self) -> CMD_R
[src]
Bits 5:7 - TCC Command
impl R<u32, Reg<u32, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Swrst Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable Busy
pub fn ctrlb(&self) -> CTRLB_R
[src]
Bit 2 - Ctrlb Busy
pub fn status(&self) -> STATUS_R
[src]
Bit 3 - Status Busy
pub fn count(&self) -> COUNT_R
[src]
Bit 4 - Count Busy
pub fn patt(&self) -> PATT_R
[src]
Bit 5 - Pattern Busy
pub fn wave(&self) -> WAVE_R
[src]
Bit 6 - Wave Busy
pub fn per(&self) -> PER_R
[src]
Bit 7 - Period busy
pub fn cc0(&self) -> CC0_R
[src]
Bit 8 - Compare Channel 0 Busy
pub fn cc1(&self) -> CC1_R
[src]
Bit 9 - Compare Channel 1 Busy
pub fn cc2(&self) -> CC2_R
[src]
Bit 10 - Compare Channel 2 Busy
pub fn cc3(&self) -> CC3_R
[src]
Bit 11 - Compare Channel 3 Busy
pub fn pattb(&self) -> PATTB_R
[src]
Bit 16 - Pattern Buffer Busy
pub fn waveb(&self) -> WAVEB_R
[src]
Bit 17 - Wave Buffer Busy
pub fn perb(&self) -> PERB_R
[src]
Bit 18 - Period Buffer Busy
pub fn ccb0(&self) -> CCB0_R
[src]
Bit 19 - Compare Channel Buffer 0 Busy
pub fn ccb1(&self) -> CCB1_R
[src]
Bit 20 - Compare Channel Buffer 1 Busy
pub fn ccb2(&self) -> CCB2_R
[src]
Bit 21 - Compare Channel Buffer 2 Busy
pub fn ccb3(&self) -> CCB3_R
[src]
Bit 22 - Compare Channel Buffer 3 Busy
impl R<u8, SRC_A>
[src]
pub fn variant(&self) -> SRC_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_invert(&self) -> bool
[src]
Checks if the value of the field is INVERT
pub fn is_altfault(&self) -> bool
[src]
Checks if the value of the field is ALTFAULT
impl R<u8, BLANK_A>
[src]
pub fn variant(&self) -> BLANK_A
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
impl R<u8, HALT_A>
[src]
pub fn variant(&self) -> HALT_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_hw(&self) -> bool
[src]
Checks if the value of the field is HW
pub fn is_sw(&self) -> bool
[src]
Checks if the value of the field is SW
pub fn is_nr(&self) -> bool
[src]
Checks if the value of the field is NR
impl R<u8, CHSEL_A>
[src]
pub fn variant(&self) -> CHSEL_A
[src]
Get enumerated values variant
pub fn is_cc0(&self) -> bool
[src]
Checks if the value of the field is CC0
pub fn is_cc1(&self) -> bool
[src]
Checks if the value of the field is CC1
pub fn is_cc2(&self) -> bool
[src]
Checks if the value of the field is CC2
pub fn is_cc3(&self) -> bool
[src]
Checks if the value of the field is CC3
impl R<u8, CAPTURE_A>
[src]
pub fn variant(&self) -> Variant<u8, CAPTURE_A>
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_capt(&self) -> bool
[src]
Checks if the value of the field is CAPT
pub fn is_captmin(&self) -> bool
[src]
Checks if the value of the field is CAPTMIN
pub fn is_captmax(&self) -> bool
[src]
Checks if the value of the field is CAPTMAX
pub fn is_locmin(&self) -> bool
[src]
Checks if the value of the field is LOCMIN
pub fn is_locmax(&self) -> bool
[src]
Checks if the value of the field is LOCMAX
pub fn is_deriv0(&self) -> bool
[src]
Checks if the value of the field is DERIV0
impl R<u32, Reg<u32, _FCTRLA>>
[src]
pub fn src(&self) -> SRC_R
[src]
Bits 0:1 - Fault A Source
pub fn keep(&self) -> KEEP_R
[src]
Bit 3 - Fault A Keeper
pub fn qual(&self) -> QUAL_R
[src]
Bit 4 - Fault A Qualification
pub fn blank(&self) -> BLANK_R
[src]
Bits 5:6 - Fault A Blanking Mode
pub fn restart(&self) -> RESTART_R
[src]
Bit 7 - Fault A Restart
pub fn halt(&self) -> HALT_R
[src]
Bits 8:9 - Fault A Halt Mode
pub fn chsel(&self) -> CHSEL_R
[src]
Bits 10:11 - Fault A Capture Channel
pub fn capture(&self) -> CAPTURE_R
[src]
Bits 12:14 - Fault A Capture Action
pub fn blankval(&self) -> BLANKVAL_R
[src]
Bits 16:23 - Fault A Blanking Time
pub fn filterval(&self) -> FILTERVAL_R
[src]
Bits 24:27 - Fault A Filter Value
impl R<u8, SRC_A>
[src]
pub fn variant(&self) -> SRC_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_enable(&self) -> bool
[src]
Checks if the value of the field is ENABLE
pub fn is_invert(&self) -> bool
[src]
Checks if the value of the field is INVERT
pub fn is_altfault(&self) -> bool
[src]
Checks if the value of the field is ALTFAULT
impl R<u8, BLANK_A>
[src]
pub fn variant(&self) -> BLANK_A
[src]
Get enumerated values variant
pub fn is_none(&self) -> bool
[src]
Checks if the value of the field is NONE
pub fn is_rise(&self) -> bool
[src]
Checks if the value of the field is RISE
pub fn is_fall(&self) -> bool
[src]
Checks if the value of the field is FALL
pub fn is_both(&self) -> bool
[src]
Checks if the value of the field is BOTH
impl R<u8, HALT_A>
[src]
pub fn variant(&self) -> HALT_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_hw(&self) -> bool
[src]
Checks if the value of the field is HW
pub fn is_sw(&self) -> bool
[src]
Checks if the value of the field is SW
pub fn is_nr(&self) -> bool
[src]
Checks if the value of the field is NR
impl R<u8, CHSEL_A>
[src]
pub fn variant(&self) -> CHSEL_A
[src]
Get enumerated values variant
pub fn is_cc0(&self) -> bool
[src]
Checks if the value of the field is CC0
pub fn is_cc1(&self) -> bool
[src]
Checks if the value of the field is CC1
pub fn is_cc2(&self) -> bool
[src]
Checks if the value of the field is CC2
pub fn is_cc3(&self) -> bool
[src]
Checks if the value of the field is CC3
impl R<u8, CAPTURE_A>
[src]
pub fn variant(&self) -> Variant<u8, CAPTURE_A>
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_capt(&self) -> bool
[src]
Checks if the value of the field is CAPT
pub fn is_captmin(&self) -> bool
[src]
Checks if the value of the field is CAPTMIN
pub fn is_captmax(&self) -> bool
[src]
Checks if the value of the field is CAPTMAX
pub fn is_locmin(&self) -> bool
[src]
Checks if the value of the field is LOCMIN
pub fn is_locmax(&self) -> bool
[src]
Checks if the value of the field is LOCMAX
pub fn is_deriv0(&self) -> bool
[src]
Checks if the value of the field is DERIV0
impl R<u32, Reg<u32, _FCTRLB>>
[src]
pub fn src(&self) -> SRC_R
[src]
Bits 0:1 - Fault B Source
pub fn keep(&self) -> KEEP_R
[src]
Bit 3 - Fault B Keeper
pub fn qual(&self) -> QUAL_R
[src]
Bit 4 - Fault B Qualification
pub fn blank(&self) -> BLANK_R
[src]
Bits 5:6 - Fault B Blanking Mode
pub fn restart(&self) -> RESTART_R
[src]
Bit 7 - Fault B Restart
pub fn halt(&self) -> HALT_R
[src]
Bits 8:9 - Fault B Halt Mode
pub fn chsel(&self) -> CHSEL_R
[src]
Bits 10:11 - Fault B Capture Channel
pub fn capture(&self) -> CAPTURE_R
[src]
Bits 12:14 - Fault B Capture Action
pub fn blankval(&self) -> BLANKVAL_R
[src]
Bits 16:23 - Fault B Blanking Time
pub fn filterval(&self) -> FILTERVAL_R
[src]
Bits 24:27 - Fault B Filter Value
impl R<u32, Reg<u32, _WEXCTRL>>
[src]
pub fn otmx(&self) -> OTMX_R
[src]
Bits 0:1 - Output Matrix
pub fn dtien0(&self) -> DTIEN0_R
[src]
Bit 8 - Dead-time Insertion Generator 0 Enable
pub fn dtien1(&self) -> DTIEN1_R
[src]
Bit 9 - Dead-time Insertion Generator 1 Enable
pub fn dtien2(&self) -> DTIEN2_R
[src]
Bit 10 - Dead-time Insertion Generator 2 Enable
pub fn dtien3(&self) -> DTIEN3_R
[src]
Bit 11 - Dead-time Insertion Generator 3 Enable
pub fn dtls(&self) -> DTLS_R
[src]
Bits 16:23 - Dead-time Low Side Outputs Value
pub fn dths(&self) -> DTHS_R
[src]
Bits 24:31 - Dead-time High Side Outputs Value
impl R<u32, Reg<u32, _DRVCTRL>>
[src]
pub fn nre0(&self) -> NRE0_R
[src]
Bit 0 - Non-Recoverable State 0 Output Enable
pub fn nre1(&self) -> NRE1_R
[src]
Bit 1 - Non-Recoverable State 1 Output Enable
pub fn nre2(&self) -> NRE2_R
[src]
Bit 2 - Non-Recoverable State 2 Output Enable
pub fn nre3(&self) -> NRE3_R
[src]
Bit 3 - Non-Recoverable State 3 Output Enable
pub fn nre4(&self) -> NRE4_R
[src]
Bit 4 - Non-Recoverable State 4 Output Enable
pub fn nre5(&self) -> NRE5_R
[src]
Bit 5 - Non-Recoverable State 5 Output Enable
pub fn nre6(&self) -> NRE6_R
[src]
Bit 6 - Non-Recoverable State 6 Output Enable
pub fn nre7(&self) -> NRE7_R
[src]
Bit 7 - Non-Recoverable State 7 Output Enable
pub fn nrv0(&self) -> NRV0_R
[src]
Bit 8 - Non-Recoverable State 0 Output Value
pub fn nrv1(&self) -> NRV1_R
[src]
Bit 9 - Non-Recoverable State 1 Output Value
pub fn nrv2(&self) -> NRV2_R
[src]
Bit 10 - Non-Recoverable State 2 Output Value
pub fn nrv3(&self) -> NRV3_R
[src]
Bit 11 - Non-Recoverable State 3 Output Value
pub fn nrv4(&self) -> NRV4_R
[src]
Bit 12 - Non-Recoverable State 4 Output Value
pub fn nrv5(&self) -> NRV5_R
[src]
Bit 13 - Non-Recoverable State 5 Output Value
pub fn nrv6(&self) -> NRV6_R
[src]
Bit 14 - Non-Recoverable State 6 Output Value
pub fn nrv7(&self) -> NRV7_R
[src]
Bit 15 - Non-Recoverable State 7 Output Value
pub fn inven0(&self) -> INVEN0_R
[src]
Bit 16 - Output Waveform 0 Inversion
pub fn inven1(&self) -> INVEN1_R
[src]
Bit 17 - Output Waveform 1 Inversion
pub fn inven2(&self) -> INVEN2_R
[src]
Bit 18 - Output Waveform 2 Inversion
pub fn inven3(&self) -> INVEN3_R
[src]
Bit 19 - Output Waveform 3 Inversion
pub fn inven4(&self) -> INVEN4_R
[src]
Bit 20 - Output Waveform 4 Inversion
pub fn inven5(&self) -> INVEN5_R
[src]
Bit 21 - Output Waveform 5 Inversion
pub fn inven6(&self) -> INVEN6_R
[src]
Bit 22 - Output Waveform 6 Inversion
pub fn inven7(&self) -> INVEN7_R
[src]
Bit 23 - Output Waveform 7 Inversion
pub fn filterval0(&self) -> FILTERVAL0_R
[src]
Bits 24:27 - Non-Recoverable Fault Input 0 Filter Value
pub fn filterval1(&self) -> FILTERVAL1_R
[src]
Bits 28:31 - Non-Recoverable Fault Input 1 Filter Value
impl R<u8, Reg<u8, _DBGCTRL>>
[src]
pub fn dbgrun(&self) -> DBGRUN_R
[src]
Bit 0 - Debug Running Mode
pub fn fddbd(&self) -> FDDBD_R
[src]
Bit 2 - Fault Detection on Debug Break Detection
impl R<u8, EVACT0_A>
[src]
pub fn variant(&self) -> Variant<u8, EVACT0_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_countev(&self) -> bool
[src]
Checks if the value of the field is COUNTEV
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
pub fn is_inc(&self) -> bool
[src]
Checks if the value of the field is INC
pub fn is_count(&self) -> bool
[src]
Checks if the value of the field is COUNT
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<u8, EVACT1_A>
[src]
pub fn variant(&self) -> EVACT1_A
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_retrigger(&self) -> bool
[src]
Checks if the value of the field is RETRIGGER
pub fn is_dir(&self) -> bool
[src]
Checks if the value of the field is DIR
pub fn is_stop(&self) -> bool
[src]
Checks if the value of the field is STOP
pub fn is_dec(&self) -> bool
[src]
Checks if the value of the field is DEC
pub fn is_ppw(&self) -> bool
[src]
Checks if the value of the field is PPW
pub fn is_pwp(&self) -> bool
[src]
Checks if the value of the field is PWP
pub fn is_fault(&self) -> bool
[src]
Checks if the value of the field is FAULT
impl R<u8, CNTSEL_A>
[src]
pub fn variant(&self) -> CNTSEL_A
[src]
Get enumerated values variant
pub fn is_start(&self) -> bool
[src]
Checks if the value of the field is START
pub fn is_end(&self) -> bool
[src]
Checks if the value of the field is END
pub fn is_between(&self) -> bool
[src]
Checks if the value of the field is BETWEEN
pub fn is_boundary(&self) -> bool
[src]
Checks if the value of the field is BOUNDARY
impl R<u32, Reg<u32, _EVCTRL>>
[src]
pub fn evact0(&self) -> EVACT0_R
[src]
Bits 0:2 - Timer/counter Input Event0 Action
pub fn evact1(&self) -> EVACT1_R
[src]
Bits 3:5 - Timer/counter Input Event1 Action
pub fn cntsel(&self) -> CNTSEL_R
[src]
Bits 6:7 - Timer/counter Output Event Mode
pub fn ovfeo(&self) -> OVFEO_R
[src]
Bit 8 - Overflow/Underflow Output Event Enable
pub fn trgeo(&self) -> TRGEO_R
[src]
Bit 9 - Retrigger Output Event Enable
pub fn cnteo(&self) -> CNTEO_R
[src]
Bit 10 - Timer/counter Output Event Enable
pub fn tcinv0(&self) -> TCINV0_R
[src]
Bit 12 - Inverted Event 0 Input Enable
pub fn tcinv1(&self) -> TCINV1_R
[src]
Bit 13 - Inverted Event 1 Input Enable
pub fn tcei0(&self) -> TCEI0_R
[src]
Bit 14 - Timer/counter Event 0 Input Enable
pub fn tcei1(&self) -> TCEI1_R
[src]
Bit 15 - Timer/counter Event 1 Input Enable
pub fn mcei0(&self) -> MCEI0_R
[src]
Bit 16 - Match or Capture Channel 0 Event Input Enable
pub fn mcei1(&self) -> MCEI1_R
[src]
Bit 17 - Match or Capture Channel 1 Event Input Enable
pub fn mcei2(&self) -> MCEI2_R
[src]
Bit 18 - Match or Capture Channel 2 Event Input Enable
pub fn mcei3(&self) -> MCEI3_R
[src]
Bit 19 - Match or Capture Channel 3 Event Input Enable
pub fn mceo0(&self) -> MCEO0_R
[src]
Bit 24 - Match or Capture Channel 0 Event Output Enable
pub fn mceo1(&self) -> MCEO1_R
[src]
Bit 25 - Match or Capture Channel 1 Event Output Enable
pub fn mceo2(&self) -> MCEO2_R
[src]
Bit 26 - Match or Capture Channel 2 Event Output Enable
pub fn mceo3(&self) -> MCEO3_R
[src]
Bit 27 - Match or Capture Channel 3 Event Output Enable
impl R<u32, Reg<u32, _INTENCLR>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn trg(&self) -> TRG_R
[src]
Bit 1 - Retrigger Interrupt Enable
pub fn cnt(&self) -> CNT_R
[src]
Bit 2 - Counter Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 3 - Error Interrupt Enable
pub fn dfs(&self) -> DFS_R
[src]
Bit 11 - Non-Recoverable Debug Fault Interrupt Enable
pub fn faulta(&self) -> FAULTA_R
[src]
Bit 12 - Recoverable Fault A Interrupt Enable
pub fn faultb(&self) -> FAULTB_R
[src]
Bit 13 - Recoverable Fault B Interrupt Enable
pub fn fault0(&self) -> FAULT0_R
[src]
Bit 14 - Non-Recoverable Fault 0 Interrupt Enable
pub fn fault1(&self) -> FAULT1_R
[src]
Bit 15 - Non-Recoverable Fault 1 Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 16 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 17 - Match or Capture Channel 1 Interrupt Enable
pub fn mc2(&self) -> MC2_R
[src]
Bit 18 - Match or Capture Channel 2 Interrupt Enable
pub fn mc3(&self) -> MC3_R
[src]
Bit 19 - Match or Capture Channel 3 Interrupt Enable
impl R<u32, Reg<u32, _INTENSET>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow Interrupt Enable
pub fn trg(&self) -> TRG_R
[src]
Bit 1 - Retrigger Interrupt Enable
pub fn cnt(&self) -> CNT_R
[src]
Bit 2 - Counter Interrupt Enable
pub fn err(&self) -> ERR_R
[src]
Bit 3 - Error Interrupt Enable
pub fn dfs(&self) -> DFS_R
[src]
Bit 11 - Non-Recoverable Debug Fault Interrupt Enable
pub fn faulta(&self) -> FAULTA_R
[src]
Bit 12 - Recoverable Fault A Interrupt Enable
pub fn faultb(&self) -> FAULTB_R
[src]
Bit 13 - Recoverable Fault B Interrupt Enable
pub fn fault0(&self) -> FAULT0_R
[src]
Bit 14 - Non-Recoverable Fault 0 Interrupt Enable
pub fn fault1(&self) -> FAULT1_R
[src]
Bit 15 - Non-Recoverable Fault 1 Interrupt Enable
pub fn mc0(&self) -> MC0_R
[src]
Bit 16 - Match or Capture Channel 0 Interrupt Enable
pub fn mc1(&self) -> MC1_R
[src]
Bit 17 - Match or Capture Channel 1 Interrupt Enable
pub fn mc2(&self) -> MC2_R
[src]
Bit 18 - Match or Capture Channel 2 Interrupt Enable
pub fn mc3(&self) -> MC3_R
[src]
Bit 19 - Match or Capture Channel 3 Interrupt Enable
impl R<u32, Reg<u32, _INTFLAG>>
[src]
pub fn ovf(&self) -> OVF_R
[src]
Bit 0 - Overflow
pub fn trg(&self) -> TRG_R
[src]
Bit 1 - Retrigger
pub fn cnt(&self) -> CNT_R
[src]
Bit 2 - Counter
pub fn err(&self) -> ERR_R
[src]
Bit 3 - Error
pub fn dfs(&self) -> DFS_R
[src]
Bit 11 - Non-Recoverable Debug Fault
pub fn faulta(&self) -> FAULTA_R
[src]
Bit 12 - Recoverable Fault A
pub fn faultb(&self) -> FAULTB_R
[src]
Bit 13 - Recoverable Fault B
pub fn fault0(&self) -> FAULT0_R
[src]
Bit 14 - Non-Recoverable Fault 0
pub fn fault1(&self) -> FAULT1_R
[src]
Bit 15 - Non-Recoverable Fault 1
pub fn mc0(&self) -> MC0_R
[src]
Bit 16 - Match or Capture 0
pub fn mc1(&self) -> MC1_R
[src]
Bit 17 - Match or Capture 1
pub fn mc2(&self) -> MC2_R
[src]
Bit 18 - Match or Capture 2
pub fn mc3(&self) -> MC3_R
[src]
Bit 19 - Match or Capture 3
impl R<u32, Reg<u32, _STATUS>>
[src]
pub fn stop(&self) -> STOP_R
[src]
Bit 0 - Stop
pub fn idx(&self) -> IDX_R
[src]
Bit 1 - Ramp
pub fn dfs(&self) -> DFS_R
[src]
Bit 3 - Non-Recoverable Debug Fault State
pub fn slave(&self) -> SLAVE_R
[src]
Bit 4 - Slave
pub fn pattbv(&self) -> PATTBV_R
[src]
Bit 5 - Pattern Buffer Valid
pub fn wavebv(&self) -> WAVEBV_R
[src]
Bit 6 - Wave Buffer Valid
pub fn perbv(&self) -> PERBV_R
[src]
Bit 7 - Period Buffer Valid
pub fn faultain(&self) -> FAULTAIN_R
[src]
Bit 8 - Recoverable Fault A Input
pub fn faultbin(&self) -> FAULTBIN_R
[src]
Bit 9 - Recoverable Fault B Input
pub fn fault0in(&self) -> FAULT0IN_R
[src]
Bit 10 - Non-Recoverable Fault0 Input
pub fn fault1in(&self) -> FAULT1IN_R
[src]
Bit 11 - Non-Recoverable Fault1 Input
pub fn faulta(&self) -> FAULTA_R
[src]
Bit 12 - Recoverable Fault A State
pub fn faultb(&self) -> FAULTB_R
[src]
Bit 13 - Recoverable Fault B State
pub fn fault0(&self) -> FAULT0_R
[src]
Bit 14 - Non-Recoverable Fault 0 State
pub fn fault1(&self) -> FAULT1_R
[src]
Bit 15 - Non-Recoverable Fault 1 State
pub fn ccbv0(&self) -> CCBV0_R
[src]
Bit 16 - Compare Channel 0 Buffer Valid
pub fn ccbv1(&self) -> CCBV1_R
[src]
Bit 17 - Compare Channel 1 Buffer Valid
pub fn ccbv2(&self) -> CCBV2_R
[src]
Bit 18 - Compare Channel 2 Buffer Valid
pub fn ccbv3(&self) -> CCBV3_R
[src]
Bit 19 - Compare Channel 3 Buffer Valid
pub fn cmp0(&self) -> CMP0_R
[src]
Bit 24 - Compare Channel 0 Value
pub fn cmp1(&self) -> CMP1_R
[src]
Bit 25 - Compare Channel 1 Value
pub fn cmp2(&self) -> CMP2_R
[src]
Bit 26 - Compare Channel 2 Value
pub fn cmp3(&self) -> CMP3_R
[src]
Bit 27 - Compare Channel 3 Value
impl R<u32, Reg<u32, _COUNT>>
[src]
impl R<u32, Reg<u32, _COUNT_DITH4>>
[src]
impl R<u32, Reg<u32, _COUNT_DITH5>>
[src]
impl R<u32, Reg<u32, _COUNT_DITH6>>
[src]
impl R<u16, Reg<u16, _PATT>>
[src]
pub fn pge0(&self) -> PGE0_R
[src]
Bit 0 - Pattern Generator 0 Output Enable
pub fn pge1(&self) -> PGE1_R
[src]
Bit 1 - Pattern Generator 1 Output Enable
pub fn pge2(&self) -> PGE2_R
[src]
Bit 2 - Pattern Generator 2 Output Enable
pub fn pge3(&self) -> PGE3_R
[src]
Bit 3 - Pattern Generator 3 Output Enable
pub fn pge4(&self) -> PGE4_R
[src]
Bit 4 - Pattern Generator 4 Output Enable
pub fn pge5(&self) -> PGE5_R
[src]
Bit 5 - Pattern Generator 5 Output Enable
pub fn pge6(&self) -> PGE6_R
[src]
Bit 6 - Pattern Generator 6 Output Enable
pub fn pge7(&self) -> PGE7_R
[src]
Bit 7 - Pattern Generator 7 Output Enable
pub fn pgv0(&self) -> PGV0_R
[src]
Bit 8 - Pattern Generator 0 Output Value
pub fn pgv1(&self) -> PGV1_R
[src]
Bit 9 - Pattern Generator 1 Output Value
pub fn pgv2(&self) -> PGV2_R
[src]
Bit 10 - Pattern Generator 2 Output Value
pub fn pgv3(&self) -> PGV3_R
[src]
Bit 11 - Pattern Generator 3 Output Value
pub fn pgv4(&self) -> PGV4_R
[src]
Bit 12 - Pattern Generator 4 Output Value
pub fn pgv5(&self) -> PGV5_R
[src]
Bit 13 - Pattern Generator 5 Output Value
pub fn pgv6(&self) -> PGV6_R
[src]
Bit 14 - Pattern Generator 6 Output Value
pub fn pgv7(&self) -> PGV7_R
[src]
Bit 15 - Pattern Generator 7 Output Value
impl R<u8, WAVEGEN_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVEGEN_A>
[src]
Get enumerated values variant
pub fn is_nfrq(&self) -> bool
[src]
Checks if the value of the field is NFRQ
pub fn is_mfrq(&self) -> bool
[src]
Checks if the value of the field is MFRQ
pub fn is_npwm(&self) -> bool
[src]
Checks if the value of the field is NPWM
pub fn is_dscritical(&self) -> bool
[src]
Checks if the value of the field is DSCRITICAL
pub fn is_dsbottom(&self) -> bool
[src]
Checks if the value of the field is DSBOTTOM
pub fn is_dsboth(&self) -> bool
[src]
Checks if the value of the field is DSBOTH
pub fn is_dstop(&self) -> bool
[src]
Checks if the value of the field is DSTOP
impl R<u8, RAMP_A>
[src]
pub fn variant(&self) -> Variant<u8, RAMP_A>
[src]
Get enumerated values variant
pub fn is_ramp1(&self) -> bool
[src]
Checks if the value of the field is RAMP1
pub fn is_ramp2a(&self) -> bool
[src]
Checks if the value of the field is RAMP2A
pub fn is_ramp2(&self) -> bool
[src]
Checks if the value of the field is RAMP2
impl R<u32, Reg<u32, _WAVE>>
[src]
pub fn wavegen(&self) -> WAVEGEN_R
[src]
Bits 0:2 - Waveform Generation
pub fn ramp(&self) -> RAMP_R
[src]
Bits 4:5 - Ramp Mode
pub fn ciperen(&self) -> CIPEREN_R
[src]
Bit 7 - Circular period Enable
pub fn ciccen0(&self) -> CICCEN0_R
[src]
Bit 8 - Circular Channel 0 Enable
pub fn ciccen1(&self) -> CICCEN1_R
[src]
Bit 9 - Circular Channel 1 Enable
pub fn ciccen2(&self) -> CICCEN2_R
[src]
Bit 10 - Circular Channel 2 Enable
pub fn ciccen3(&self) -> CICCEN3_R
[src]
Bit 11 - Circular Channel 3 Enable
pub fn pol0(&self) -> POL0_R
[src]
Bit 16 - Channel 0 Polarity
pub fn pol1(&self) -> POL1_R
[src]
Bit 17 - Channel 1 Polarity
pub fn pol2(&self) -> POL2_R
[src]
Bit 18 - Channel 2 Polarity
pub fn pol3(&self) -> POL3_R
[src]
Bit 19 - Channel 3 Polarity
pub fn swap0(&self) -> SWAP0_R
[src]
Bit 24 - Swap DTI Output Pair 0
pub fn swap1(&self) -> SWAP1_R
[src]
Bit 25 - Swap DTI Output Pair 1
pub fn swap2(&self) -> SWAP2_R
[src]
Bit 26 - Swap DTI Output Pair 2
pub fn swap3(&self) -> SWAP3_R
[src]
Bit 27 - Swap DTI Output Pair 3
impl R<u32, Reg<u32, _PER>>
[src]
impl R<u32, Reg<u32, _PER_DITH4>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:3 - Dithering Cycle Number
pub fn per(&self) -> PER_R
[src]
Bits 4:23 - Period Value
impl R<u32, Reg<u32, _PER_DITH5>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:4 - Dithering Cycle Number
pub fn per(&self) -> PER_R
[src]
Bits 5:23 - Period Value
impl R<u32, Reg<u32, _PER_DITH6>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:5 - Dithering Cycle Number
pub fn per(&self) -> PER_R
[src]
Bits 6:23 - Period Value
impl R<u32, Reg<u32, _CC>>
[src]
impl R<u32, Reg<u32, _CC_DITH4>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:3 - Dithering Cycle Number
pub fn cc(&self) -> CC_R
[src]
Bits 4:23 - Channel Compare/Capture Value
impl R<u32, Reg<u32, _CC_DITH5>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:4 - Dithering Cycle Number
pub fn cc(&self) -> CC_R
[src]
Bits 5:23 - Channel Compare/Capture Value
impl R<u32, Reg<u32, _CC_DITH6>>
[src]
pub fn dithercy(&self) -> DITHERCY_R
[src]
Bits 0:5 - Dithering Cycle Number
pub fn cc(&self) -> CC_R
[src]
Bits 6:23 - Channel Compare/Capture Value
impl R<u16, Reg<u16, _PATTB>>
[src]
pub fn pgeb0(&self) -> PGEB0_R
[src]
Bit 0 - Pattern Generator 0 Output Enable Buffer
pub fn pgeb1(&self) -> PGEB1_R
[src]
Bit 1 - Pattern Generator 1 Output Enable Buffer
pub fn pgeb2(&self) -> PGEB2_R
[src]
Bit 2 - Pattern Generator 2 Output Enable Buffer
pub fn pgeb3(&self) -> PGEB3_R
[src]
Bit 3 - Pattern Generator 3 Output Enable Buffer
pub fn pgeb4(&self) -> PGEB4_R
[src]
Bit 4 - Pattern Generator 4 Output Enable Buffer
pub fn pgeb5(&self) -> PGEB5_R
[src]
Bit 5 - Pattern Generator 5 Output Enable Buffer
pub fn pgeb6(&self) -> PGEB6_R
[src]
Bit 6 - Pattern Generator 6 Output Enable Buffer
pub fn pgeb7(&self) -> PGEB7_R
[src]
Bit 7 - Pattern Generator 7 Output Enable Buffer
pub fn pgvb0(&self) -> PGVB0_R
[src]
Bit 8 - Pattern Generator 0 Output Enable
pub fn pgvb1(&self) -> PGVB1_R
[src]
Bit 9 - Pattern Generator 1 Output Enable
pub fn pgvb2(&self) -> PGVB2_R
[src]
Bit 10 - Pattern Generator 2 Output Enable
pub fn pgvb3(&self) -> PGVB3_R
[src]
Bit 11 - Pattern Generator 3 Output Enable
pub fn pgvb4(&self) -> PGVB4_R
[src]
Bit 12 - Pattern Generator 4 Output Enable
pub fn pgvb5(&self) -> PGVB5_R
[src]
Bit 13 - Pattern Generator 5 Output Enable
pub fn pgvb6(&self) -> PGVB6_R
[src]
Bit 14 - Pattern Generator 6 Output Enable
pub fn pgvb7(&self) -> PGVB7_R
[src]
Bit 15 - Pattern Generator 7 Output Enable
impl R<u8, WAVEGENB_A>
[src]
pub fn variant(&self) -> Variant<u8, WAVEGENB_A>
[src]
Get enumerated values variant
pub fn is_nfrq(&self) -> bool
[src]
Checks if the value of the field is NFRQ
pub fn is_mfrq(&self) -> bool
[src]
Checks if the value of the field is MFRQ
pub fn is_npwm(&self) -> bool
[src]
Checks if the value of the field is NPWM
pub fn is_dscritical(&self) -> bool
[src]
Checks if the value of the field is DSCRITICAL
pub fn is_dsbottom(&self) -> bool
[src]
Checks if the value of the field is DSBOTTOM
pub fn is_dsboth(&self) -> bool
[src]
Checks if the value of the field is DSBOTH
pub fn is_dstop(&self) -> bool
[src]
Checks if the value of the field is DSTOP
impl R<u8, RAMPB_A>
[src]
pub fn variant(&self) -> Variant<u8, RAMPB_A>
[src]
Get enumerated values variant
pub fn is_ramp1(&self) -> bool
[src]
Checks if the value of the field is RAMP1
pub fn is_ramp2a(&self) -> bool
[src]
Checks if the value of the field is RAMP2A
pub fn is_ramp2(&self) -> bool
[src]
Checks if the value of the field is RAMP2
impl R<u32, Reg<u32, _WAVEB>>
[src]
pub fn wavegenb(&self) -> WAVEGENB_R
[src]
Bits 0:2 - Waveform Generation Buffer
pub fn rampb(&self) -> RAMPB_R
[src]
Bits 4:5 - Ramp Mode Buffer
pub fn ciperenb(&self) -> CIPERENB_R
[src]
Bit 7 - Circular Period Enable Buffer
pub fn ciccenb0(&self) -> CICCENB0_R
[src]
Bit 8 - Circular Channel 0 Enable Buffer
pub fn ciccenb1(&self) -> CICCENB1_R
[src]
Bit 9 - Circular Channel 1 Enable Buffer
pub fn ciccenb2(&self) -> CICCENB2_R
[src]
Bit 10 - Circular Channel 2 Enable Buffer
pub fn ciccenb3(&self) -> CICCENB3_R
[src]
Bit 11 - Circular Channel 3 Enable Buffer
pub fn polb0(&self) -> POLB0_R
[src]
Bit 16 - Channel 0 Polarity Buffer
pub fn polb1(&self) -> POLB1_R
[src]
Bit 17 - Channel 1 Polarity Buffer
pub fn polb2(&self) -> POLB2_R
[src]
Bit 18 - Channel 2 Polarity Buffer
pub fn polb3(&self) -> POLB3_R
[src]
Bit 19 - Channel 3 Polarity Buffer
pub fn swapb0(&self) -> SWAPB0_R
[src]
Bit 24 - Swap DTI Output Pair 0 Buffer
pub fn swapb1(&self) -> SWAPB1_R
[src]
Bit 25 - Swap DTI Output Pair 1 Buffer
pub fn swapb2(&self) -> SWAPB2_R
[src]
Bit 26 - Swap DTI Output Pair 2 Buffer
pub fn swapb3(&self) -> SWAPB3_R
[src]
Bit 27 - Swap DTI Output Pair 3 Buffer
impl R<u32, Reg<u32, _PERB>>
[src]
impl R<u32, Reg<u32, _PERB_DITH4>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:3 - Dithering Buffer Cycle Number
pub fn perb(&self) -> PERB_R
[src]
Bits 4:23 - Period Buffer Value
impl R<u32, Reg<u32, _PERB_DITH5>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:4 - Dithering Buffer Cycle Number
pub fn perb(&self) -> PERB_R
[src]
Bits 5:23 - Period Buffer Value
impl R<u32, Reg<u32, _PERB_DITH6>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:5 - Dithering Buffer Cycle Number
pub fn perb(&self) -> PERB_R
[src]
Bits 6:23 - Period Buffer Value
impl R<u32, Reg<u32, _CCB>>
[src]
impl R<u32, Reg<u32, _CCB_DITH4>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:3 - Dithering Buffer Cycle Number
pub fn ccb(&self) -> CCB_R
[src]
Bits 4:23 - Channel Compare/Capture Buffer Value
impl R<u32, Reg<u32, _CCB_DITH5>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:4 - Dithering Buffer Cycle Number
pub fn ccb(&self) -> CCB_R
[src]
Bits 5:23 - Channel Compare/Capture Buffer Value
impl R<u32, Reg<u32, _CCB_DITH6>>
[src]
pub fn dithercyb(&self) -> DITHERCYB_R
[src]
Bits 0:5 - Dithering Buffer Cycle Number
pub fn ccb(&self) -> CCB_R
[src]
Bits 6:23 - Channel Compare/Capture Buffer Value
impl R<bool, MODE_A>
[src]
pub fn variant(&self) -> MODE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<u8, Reg<u8, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 2 - Run in Standby Mode
pub fn mode(&self) -> MODE_R
[src]
Bit 7 - Operating Mode
impl R<u8, Reg<u8, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable Synchronization Busy
impl R<u8, CQOS_A>
[src]
pub fn variant(&self) -> CQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, DQOS_A>
[src]
pub fn variant(&self) -> DQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, Reg<u8, _QOSCTRL>>
[src]
pub fn cqos(&self) -> CQOS_R
[src]
Bits 0:1 - Configuration Quality of Service
pub fn dqos(&self) -> DQOS_R
[src]
Bits 2:3 - Data Quality of Service
impl R<u8, SPDCONF_A>
[src]
pub fn variant(&self) -> SPDCONF_A
[src]
Get enumerated values variant
pub fn is_fs(&self) -> bool
[src]
Checks if the value of the field is FS
pub fn is_ls(&self) -> bool
[src]
Checks if the value of the field is LS
pub fn is_hs(&self) -> bool
[src]
Checks if the value of the field is HS
pub fn is_hstm(&self) -> bool
[src]
Checks if the value of the field is HSTM
impl R<u8, LPMHDSK_A>
[src]
pub fn variant(&self) -> LPMHDSK_A
[src]
Get enumerated values variant
pub fn is_no(&self) -> bool
[src]
Checks if the value of the field is NO
pub fn is_ack(&self) -> bool
[src]
Checks if the value of the field is ACK
pub fn is_nyet(&self) -> bool
[src]
Checks if the value of the field is NYET
pub fn is_stall(&self) -> bool
[src]
Checks if the value of the field is STALL
impl R<u16, Reg<u16, _CTRLB>>
[src]
pub fn detach(&self) -> DETACH_R
[src]
Bit 0 - Detach
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 1 - Upstream Resume
pub fn spdconf(&self) -> SPDCONF_R
[src]
Bits 2:3 - Speed Configuration
pub fn nreply(&self) -> NREPLY_R
[src]
Bit 4 - No Reply
pub fn tstj(&self) -> TSTJ_R
[src]
Bit 5 - Test mode J
pub fn tstk(&self) -> TSTK_R
[src]
Bit 6 - Test mode K
pub fn tstpckt(&self) -> TSTPCKT_R
[src]
Bit 7 - Test packet mode
pub fn opmode2(&self) -> OPMODE2_R
[src]
Bit 8 - Specific Operational Mode
pub fn gnak(&self) -> GNAK_R
[src]
Bit 9 - Global NAK
pub fn lpmhdsk(&self) -> LPMHDSK_R
[src]
Bits 10:11 - Link Power Management Handshake
impl R<u8, Reg<u8, _DADD>>
[src]
pub fn dadd(&self) -> DADD_R
[src]
Bits 0:6 - Device Address
pub fn adden(&self) -> ADDEN_R
[src]
Bit 7 - Device Address Enable
impl R<u8, SPEED_A>
[src]
pub fn variant(&self) -> Variant<u8, SPEED_A>
[src]
Get enumerated values variant
pub fn is_fs(&self) -> bool
[src]
Checks if the value of the field is FS
pub fn is_hs(&self) -> bool
[src]
Checks if the value of the field is HS
pub fn is_ls(&self) -> bool
[src]
Checks if the value of the field is LS
impl R<u8, LINESTATE_A>
[src]
pub fn variant(&self) -> Variant<u8, LINESTATE_A>
[src]
Get enumerated values variant
pub fn is_0(&self) -> bool
[src]
Checks if the value of the field is _0
pub fn is_1(&self) -> bool
[src]
Checks if the value of the field is _1
pub fn is_2(&self) -> bool
[src]
Checks if the value of the field is _2
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn speed(&self) -> SPEED_R
[src]
Bits 2:3 - Speed Status
pub fn linestate(&self) -> LINESTATE_R
[src]
Bits 6:7 - USB Line State Status
impl R<u8, FSMSTATE_A>
[src]
pub fn variant(&self) -> Variant<u8, FSMSTATE_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
pub fn is_sleep(&self) -> bool
[src]
Checks if the value of the field is SLEEP
pub fn is_dnresume(&self) -> bool
[src]
Checks if the value of the field is DNRESUME
pub fn is_upresume(&self) -> bool
[src]
Checks if the value of the field is UPRESUME
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u8, Reg<u8, _FSMSTATUS>>
[src]
pub fn fsmstate(&self) -> FSMSTATE_R
[src]
Bits 0:6 - Fine State Machine Status
impl R<u16, Reg<u16, _FNUM>>
[src]
pub fn mfnum(&self) -> MFNUM_R
[src]
Bits 0:2 - Micro Frame Number
pub fn fnum(&self) -> FNUM_R
[src]
Bits 3:13 - Frame Number
pub fn fncerr(&self) -> FNCERR_R
[src]
Bit 15 - Frame Number CRC Error
impl R<u16, Reg<u16, _INTENCLR>>
[src]
pub fn suspend(&self) -> SUSPEND_R
[src]
Bit 0 - Suspend Interrupt Enable
pub fn msof(&self) -> MSOF_R
[src]
Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode
pub fn sof(&self) -> SOF_R
[src]
Bit 2 - Start Of Frame Interrupt Enable
pub fn eorst(&self) -> EORST_R
[src]
Bit 3 - End of Reset Interrupt Enable
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up Interrupt Enable
pub fn eorsm(&self) -> EORSM_R
[src]
Bit 5 - End Of Resume Interrupt Enable
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume Interrupt Enable
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access Interrupt Enable
pub fn lpmnyet(&self) -> LPMNYET_R
[src]
Bit 8 - Link Power Management Not Yet Interrupt Enable
pub fn lpmsusp(&self) -> LPMSUSP_R
[src]
Bit 9 - Link Power Management Suspend Interrupt Enable
impl R<u16, Reg<u16, _INTENSET>>
[src]
pub fn suspend(&self) -> SUSPEND_R
[src]
Bit 0 - Suspend Interrupt Enable
pub fn msof(&self) -> MSOF_R
[src]
Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode
pub fn sof(&self) -> SOF_R
[src]
Bit 2 - Start Of Frame Interrupt Enable
pub fn eorst(&self) -> EORST_R
[src]
Bit 3 - End of Reset Interrupt Enable
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up Interrupt Enable
pub fn eorsm(&self) -> EORSM_R
[src]
Bit 5 - End Of Resume Interrupt Enable
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume Interrupt Enable
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access Interrupt Enable
pub fn lpmnyet(&self) -> LPMNYET_R
[src]
Bit 8 - Link Power Management Not Yet Interrupt Enable
pub fn lpmsusp(&self) -> LPMSUSP_R
[src]
Bit 9 - Link Power Management Suspend Interrupt Enable
impl R<u16, Reg<u16, _INTFLAG>>
[src]
pub fn suspend(&self) -> SUSPEND_R
[src]
Bit 0 - Suspend
pub fn msof(&self) -> MSOF_R
[src]
Bit 1 - Micro Start of Frame in High Speed Mode
pub fn sof(&self) -> SOF_R
[src]
Bit 2 - Start Of Frame
pub fn eorst(&self) -> EORST_R
[src]
Bit 3 - End of Reset
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up
pub fn eorsm(&self) -> EORSM_R
[src]
Bit 5 - End Of Resume
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access
pub fn lpmnyet(&self) -> LPMNYET_R
[src]
Bit 8 - Link Power Management Not Yet
pub fn lpmsusp(&self) -> LPMSUSP_R
[src]
Bit 9 - Link Power Management Suspend
impl R<u16, Reg<u16, _EPINTSMRY>>
[src]
pub fn epint0(&self) -> EPINT0_R
[src]
Bit 0 - End Point 0 Interrupt
pub fn epint1(&self) -> EPINT1_R
[src]
Bit 1 - End Point 1 Interrupt
pub fn epint2(&self) -> EPINT2_R
[src]
Bit 2 - End Point 2 Interrupt
pub fn epint3(&self) -> EPINT3_R
[src]
Bit 3 - End Point 3 Interrupt
pub fn epint4(&self) -> EPINT4_R
[src]
Bit 4 - End Point 4 Interrupt
pub fn epint5(&self) -> EPINT5_R
[src]
Bit 5 - End Point 5 Interrupt
pub fn epint6(&self) -> EPINT6_R
[src]
Bit 6 - End Point 6 Interrupt
pub fn epint7(&self) -> EPINT7_R
[src]
Bit 7 - End Point 7 Interrupt
impl R<u32, Reg<u32, _DESCADD>>
[src]
impl R<u16, Reg<u16, _PADCAL>>
[src]
pub fn transp(&self) -> TRANSP_R
[src]
Bits 0:4 - USB Pad Transp calibration
pub fn transn(&self) -> TRANSN_R
[src]
Bits 6:10 - USB Pad Transn calibration
pub fn trim(&self) -> TRIM_R
[src]
Bits 12:14 - USB Pad Trim calibration
impl R<u8, Reg<u8, _EPCFG>>
[src]
pub fn eptype0(&self) -> EPTYPE0_R
[src]
Bits 0:2 - End Point Type0
pub fn eptype1(&self) -> EPTYPE1_R
[src]
Bits 4:6 - End Point Type1
pub fn nyetdis(&self) -> NYETDIS_R
[src]
Bit 7 - NYET Token Disable
impl R<u8, Reg<u8, _EPSTATUS>>
[src]
pub fn dtglout(&self) -> DTGLOUT_R
[src]
Bit 0 - Data Toggle Out
pub fn dtglin(&self) -> DTGLIN_R
[src]
Bit 1 - Data Toggle In
pub fn curbk(&self) -> CURBK_R
[src]
Bit 2 - Current Bank
pub fn stallrq0(&self) -> STALLRQ0_R
[src]
Bit 4 - Stall 0 Request
pub fn stallrq1(&self) -> STALLRQ1_R
[src]
Bit 5 - Stall 1 Request
pub fn bk0rdy(&self) -> BK0RDY_R
[src]
Bit 6 - Bank 0 ready
pub fn bk1rdy(&self) -> BK1RDY_R
[src]
Bit 7 - Bank 1 ready
impl R<u8, Reg<u8, _EPINTFLAG>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1
pub fn trfail0(&self) -> TRFAIL0_R
[src]
Bit 2 - Error Flow 0
pub fn trfail1(&self) -> TRFAIL1_R
[src]
Bit 3 - Error Flow 1
pub fn rxstp(&self) -> RXSTP_R
[src]
Bit 4 - Received Setup
pub fn stall0(&self) -> STALL0_R
[src]
Bit 5 - Stall 0 In/out
pub fn stall1(&self) -> STALL1_R
[src]
Bit 6 - Stall 1 In/out
impl R<u8, Reg<u8, _EPINTENCLR>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0 Interrupt Disable
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1 Interrupt Disable
pub fn trfail0(&self) -> TRFAIL0_R
[src]
Bit 2 - Error Flow 0 Interrupt Disable
pub fn trfail1(&self) -> TRFAIL1_R
[src]
Bit 3 - Error Flow 1 Interrupt Disable
pub fn rxstp(&self) -> RXSTP_R
[src]
Bit 4 - Received Setup Interrupt Disable
pub fn stall0(&self) -> STALL0_R
[src]
Bit 5 - Stall 0 In/Out Interrupt Disable
pub fn stall1(&self) -> STALL1_R
[src]
Bit 6 - Stall 1 In/Out Interrupt Disable
impl R<u8, Reg<u8, _EPINTENSET>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0 Interrupt Enable
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1 Interrupt Enable
pub fn trfail0(&self) -> TRFAIL0_R
[src]
Bit 2 - Error Flow 0 Interrupt Enable
pub fn trfail1(&self) -> TRFAIL1_R
[src]
Bit 3 - Error Flow 1 Interrupt Enable
pub fn rxstp(&self) -> RXSTP_R
[src]
Bit 4 - Received Setup Interrupt Enable
pub fn stall0(&self) -> STALL0_R
[src]
Bit 5 - Stall 0 In/out Interrupt enable
pub fn stall1(&self) -> STALL1_R
[src]
Bit 6 - Stall 1 In/out Interrupt enable
impl R<bool, MODE_A>
[src]
pub fn variant(&self) -> MODE_A
[src]
Get enumerated values variant
pub fn is_device(&self) -> bool
[src]
Checks if the value of the field is DEVICE
pub fn is_host(&self) -> bool
[src]
Checks if the value of the field is HOST
impl R<u8, Reg<u8, _CTRLA>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn runstdby(&self) -> RUNSTDBY_R
[src]
Bit 2 - Run in Standby Mode
pub fn mode(&self) -> MODE_R
[src]
Bit 7 - Operating Mode
impl R<u8, Reg<u8, _SYNCBUSY>>
[src]
pub fn swrst(&self) -> SWRST_R
[src]
Bit 0 - Software Reset Synchronization Busy
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable Synchronization Busy
impl R<u8, CQOS_A>
[src]
pub fn variant(&self) -> CQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, DQOS_A>
[src]
pub fn variant(&self) -> DQOS_A
[src]
Get enumerated values variant
pub fn is_disable(&self) -> bool
[src]
Checks if the value of the field is DISABLE
pub fn is_low(&self) -> bool
[src]
Checks if the value of the field is LOW
pub fn is_medium(&self) -> bool
[src]
Checks if the value of the field is MEDIUM
pub fn is_high(&self) -> bool
[src]
Checks if the value of the field is HIGH
impl R<u8, Reg<u8, _QOSCTRL>>
[src]
pub fn cqos(&self) -> CQOS_R
[src]
Bits 0:1 - Configuration Quality of Service
pub fn dqos(&self) -> DQOS_R
[src]
Bits 2:3 - Data Quality of Service
impl R<u8, SPDCONF_A>
[src]
pub fn variant(&self) -> Variant<u8, SPDCONF_A>
[src]
Get enumerated values variant
pub fn is_normal(&self) -> bool
[src]
Checks if the value of the field is NORMAL
pub fn is_fs(&self) -> bool
[src]
Checks if the value of the field is FS
impl R<u16, Reg<u16, _CTRLB>>
[src]
pub fn resume(&self) -> RESUME_R
[src]
Bit 1 - Send USB Resume
pub fn spdconf(&self) -> SPDCONF_R
[src]
Bits 2:3 - Speed Configuration for Host
pub fn tstj(&self) -> TSTJ_R
[src]
Bit 5 - Test mode J
pub fn tstk(&self) -> TSTK_R
[src]
Bit 6 - Test mode K
pub fn sofe(&self) -> SOFE_R
[src]
Bit 8 - Start of Frame Generation Enable
pub fn busreset(&self) -> BUSRESET_R
[src]
Bit 9 - Send USB Reset
pub fn vbusok(&self) -> VBUSOK_R
[src]
Bit 10 - VBUS is OK
pub fn l1resume(&self) -> L1RESUME_R
[src]
Bit 11 - Send L1 Resume
impl R<u8, Reg<u8, _HSOFC>>
[src]
pub fn flenc(&self) -> FLENC_R
[src]
Bits 0:3 - Frame Length Control
pub fn flence(&self) -> FLENCE_R
[src]
Bit 7 - Frame Length Control Enable
impl R<u8, Reg<u8, _STATUS>>
[src]
pub fn speed(&self) -> SPEED_R
[src]
Bits 2:3 - Speed Status
pub fn linestate(&self) -> LINESTATE_R
[src]
Bits 6:7 - USB Line State Status
impl R<u8, FSMSTATE_A>
[src]
pub fn variant(&self) -> Variant<u8, FSMSTATE_A>
[src]
Get enumerated values variant
pub fn is_off(&self) -> bool
[src]
Checks if the value of the field is OFF
pub fn is_on(&self) -> bool
[src]
Checks if the value of the field is ON
pub fn is_suspend(&self) -> bool
[src]
Checks if the value of the field is SUSPEND
pub fn is_sleep(&self) -> bool
[src]
Checks if the value of the field is SLEEP
pub fn is_dnresume(&self) -> bool
[src]
Checks if the value of the field is DNRESUME
pub fn is_upresume(&self) -> bool
[src]
Checks if the value of the field is UPRESUME
pub fn is_reset(&self) -> bool
[src]
Checks if the value of the field is RESET
impl R<u8, Reg<u8, _FSMSTATUS>>
[src]
pub fn fsmstate(&self) -> FSMSTATE_R
[src]
Bits 0:6 - Fine State Machine Status
impl R<u16, Reg<u16, _FNUM>>
[src]
pub fn mfnum(&self) -> MFNUM_R
[src]
Bits 0:2 - Micro Frame Number
pub fn fnum(&self) -> FNUM_R
[src]
Bits 3:13 - Frame Number
impl R<u8, Reg<u8, _FLENHIGH>>
[src]
pub fn flenhigh(&self) -> FLENHIGH_R
[src]
Bits 0:7 - Frame Length
impl R<u16, Reg<u16, _INTENCLR>>
[src]
pub fn hsof(&self) -> HSOF_R
[src]
Bit 2 - Host Start Of Frame Interrupt Disable
pub fn rst(&self) -> RST_R
[src]
Bit 3 - BUS Reset Interrupt Disable
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up Interrupt Disable
pub fn dnrsm(&self) -> DNRSM_R
[src]
Bit 5 - DownStream to Device Interrupt Disable
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume from Device Interrupt Disable
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access Interrupt Disable
pub fn dconn(&self) -> DCONN_R
[src]
Bit 8 - Device Connection Interrupt Disable
pub fn ddisc(&self) -> DDISC_R
[src]
Bit 9 - Device Disconnection Interrupt Disable
impl R<u16, Reg<u16, _INTENSET>>
[src]
pub fn hsof(&self) -> HSOF_R
[src]
Bit 2 - Host Start Of Frame Interrupt Enable
pub fn rst(&self) -> RST_R
[src]
Bit 3 - Bus Reset Interrupt Enable
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up Interrupt Enable
pub fn dnrsm(&self) -> DNRSM_R
[src]
Bit 5 - DownStream to the Device Interrupt Enable
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume fromthe device Interrupt Enable
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access Interrupt Enable
pub fn dconn(&self) -> DCONN_R
[src]
Bit 8 - Link Power Management Interrupt Enable
pub fn ddisc(&self) -> DDISC_R
[src]
Bit 9 - Device Disconnection Interrupt Enable
impl R<u16, Reg<u16, _INTFLAG>>
[src]
pub fn hsof(&self) -> HSOF_R
[src]
Bit 2 - Host Start Of Frame
pub fn rst(&self) -> RST_R
[src]
Bit 3 - Bus Reset
pub fn wakeup(&self) -> WAKEUP_R
[src]
Bit 4 - Wake Up
pub fn dnrsm(&self) -> DNRSM_R
[src]
Bit 5 - Downstream
pub fn uprsm(&self) -> UPRSM_R
[src]
Bit 6 - Upstream Resume from the Device
pub fn ramacer(&self) -> RAMACER_R
[src]
Bit 7 - Ram Access
pub fn dconn(&self) -> DCONN_R
[src]
Bit 8 - Device Connection
pub fn ddisc(&self) -> DDISC_R
[src]
Bit 9 - Device Disconnection
impl R<u16, Reg<u16, _PINTSMRY>>
[src]
pub fn epint0(&self) -> EPINT0_R
[src]
Bit 0 - Pipe 0 Interrupt
pub fn epint1(&self) -> EPINT1_R
[src]
Bit 1 - Pipe 1 Interrupt
pub fn epint2(&self) -> EPINT2_R
[src]
Bit 2 - Pipe 2 Interrupt
pub fn epint3(&self) -> EPINT3_R
[src]
Bit 3 - Pipe 3 Interrupt
pub fn epint4(&self) -> EPINT4_R
[src]
Bit 4 - Pipe 4 Interrupt
pub fn epint5(&self) -> EPINT5_R
[src]
Bit 5 - Pipe 5 Interrupt
pub fn epint6(&self) -> EPINT6_R
[src]
Bit 6 - Pipe 6 Interrupt
pub fn epint7(&self) -> EPINT7_R
[src]
Bit 7 - Pipe 7 Interrupt
impl R<u32, Reg<u32, _DESCADD>>
[src]
impl R<u16, Reg<u16, _PADCAL>>
[src]
pub fn transp(&self) -> TRANSP_R
[src]
Bits 0:4 - USB Pad Transp calibration
pub fn transn(&self) -> TRANSN_R
[src]
Bits 6:10 - USB Pad Transn calibration
pub fn trim(&self) -> TRIM_R
[src]
Bits 12:14 - USB Pad Trim calibration
impl R<u8, Reg<u8, _PCFG>>
[src]
pub fn ptoken(&self) -> PTOKEN_R
[src]
Bits 0:1 - Pipe Token
pub fn bk(&self) -> BK_R
[src]
Bit 2 - Pipe Bank
pub fn ptype(&self) -> PTYPE_R
[src]
Bits 3:5 - Pipe Type
impl R<u8, Reg<u8, _BINTERVAL>>
[src]
pub fn bitinterval(&self) -> BITINTERVAL_R
[src]
Bits 0:7 - Bit Interval
impl R<u8, Reg<u8, _PSTATUS>>
[src]
pub fn dtgl(&self) -> DTGL_R
[src]
Bit 0 - Data Toggle
pub fn curbk(&self) -> CURBK_R
[src]
Bit 2 - Current Bank
pub fn pfreeze(&self) -> PFREEZE_R
[src]
Bit 4 - Pipe Freeze
pub fn bk0rdy(&self) -> BK0RDY_R
[src]
Bit 6 - Bank 0 ready
pub fn bk1rdy(&self) -> BK1RDY_R
[src]
Bit 7 - Bank 1 ready
impl R<u8, Reg<u8, _PINTFLAG>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0 Interrupt Flag
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1 Interrupt Flag
pub fn trfail(&self) -> TRFAIL_R
[src]
Bit 2 - Error Flow Interrupt Flag
pub fn perr(&self) -> PERR_R
[src]
Bit 3 - Pipe Error Interrupt Flag
pub fn txstp(&self) -> TXSTP_R
[src]
Bit 4 - Transmit Setup Interrupt Flag
pub fn stall(&self) -> STALL_R
[src]
Bit 5 - Stall Interrupt Flag
impl R<u8, Reg<u8, _PINTENCLR>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0 Disable
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1 Disable
pub fn trfail(&self) -> TRFAIL_R
[src]
Bit 2 - Error Flow Interrupt Disable
pub fn perr(&self) -> PERR_R
[src]
Bit 3 - Pipe Error Interrupt Disable
pub fn txstp(&self) -> TXSTP_R
[src]
Bit 4 - Transmit Setup Interrupt Disable
pub fn stall(&self) -> STALL_R
[src]
Bit 5 - Stall Inetrrupt Disable
impl R<u8, Reg<u8, _PINTENSET>>
[src]
pub fn trcpt0(&self) -> TRCPT0_R
[src]
Bit 0 - Transfer Complete 0 Interrupt Enable
pub fn trcpt1(&self) -> TRCPT1_R
[src]
Bit 1 - Transfer Complete 1 Interrupt Enable
pub fn trfail(&self) -> TRFAIL_R
[src]
Bit 2 - Error Flow Interrupt Enable
pub fn perr(&self) -> PERR_R
[src]
Bit 3 - Pipe Error Interrupt Enable
pub fn txstp(&self) -> TXSTP_R
[src]
Bit 4 - Transmit Setup Interrupt Enable
pub fn stall(&self) -> STALL_R
[src]
Bit 5 - Stall Interrupt Enable
impl R<u8, Reg<u8, _CTRL>>
[src]
pub fn enable(&self) -> ENABLE_R
[src]
Bit 1 - Enable
pub fn wen(&self) -> WEN_R
[src]
Bit 2 - Watchdog Timer Window Mode Enable
pub fn alwayson(&self) -> ALWAYSON_R
[src]
Bit 7 - Always-On
impl R<u8, PER_A>
[src]
pub fn variant(&self) -> Variant<u8, PER_A>
[src]
Get enumerated values variant
pub fn is_8(&self) -> bool
[src]
Checks if the value of the field is _8
pub fn is_16(&self) -> bool
[src]
Checks if the value of the field is _16
pub fn is_32(&self) -> bool
[src]
Checks if the value of the field is _32
pub fn is_64(&self) -> bool
[src]
Checks if the value of the field is _64
pub fn is_128(&self) -> bool
[src]
Checks if the value of the field is _128
pub fn is_256(&self) -> bool
[src]
Checks if the value of the field is _256
pub fn is_512(&self) -> bool
[src]
Checks if the value of the field is _512
pub fn is_1k(&self) -> bool
[src]
Checks if the value of the field is _1K
pub fn is_2k(&self) -> bool
[src]
Checks if the value of the field is _2K
pub fn is_4k(&self) -> bool
[src]
Checks if the value of the field is _4K
pub fn is_8k(&self) -> bool
[src]
Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool
[src]
Checks if the value of the field is _16K
impl R<u8, WINDOW_A>
[src]
pub fn variant(&self) -> Variant<u8, WINDOW_A>
[src]
Get enumerated values variant
pub fn is_8(&self) -> bool
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Checks if the value of the field is _8
pub fn is_16(&self) -> bool
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Checks if the value of the field is _16
pub fn is_32(&self) -> bool
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Checks if the value of the field is _32
pub fn is_64(&self) -> bool
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Checks if the value of the field is _64
pub fn is_128(&self) -> bool
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Checks if the value of the field is _128
pub fn is_256(&self) -> bool
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Checks if the value of the field is _256
pub fn is_512(&self) -> bool
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Checks if the value of the field is _512
pub fn is_1k(&self) -> bool
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Checks if the value of the field is _1K
pub fn is_2k(&self) -> bool
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Checks if the value of the field is _2K
pub fn is_4k(&self) -> bool
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Checks if the value of the field is _4K
pub fn is_8k(&self) -> bool
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Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool
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Checks if the value of the field is _16K
impl R<u8, Reg<u8, _CONFIG>>
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pub fn per(&self) -> PER_R
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Bits 0:3 - Time-Out Period
pub fn window(&self) -> WINDOW_R
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Bits 4:7 - Window Mode Time-Out Period
impl R<u8, EWOFFSET_A>
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pub fn variant(&self) -> Variant<u8, EWOFFSET_A>
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Get enumerated values variant
pub fn is_8(&self) -> bool
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Checks if the value of the field is _8
pub fn is_16(&self) -> bool
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Checks if the value of the field is _16
pub fn is_32(&self) -> bool
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Checks if the value of the field is _32
pub fn is_64(&self) -> bool
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Checks if the value of the field is _64
pub fn is_128(&self) -> bool
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Checks if the value of the field is _128
pub fn is_256(&self) -> bool
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Checks if the value of the field is _256
pub fn is_512(&self) -> bool
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Checks if the value of the field is _512
pub fn is_1k(&self) -> bool
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Checks if the value of the field is _1K
pub fn is_2k(&self) -> bool
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Checks if the value of the field is _2K
pub fn is_4k(&self) -> bool
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Checks if the value of the field is _4K
pub fn is_8k(&self) -> bool
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Checks if the value of the field is _8K
pub fn is_16k(&self) -> bool
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Checks if the value of the field is _16K
impl R<u8, Reg<u8, _EWCTRL>>
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pub fn ewoffset(&self) -> EWOFFSET_R
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Bits 0:3 - Early Warning Interrupt Time Offset
impl R<u8, Reg<u8, _INTENCLR>>
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impl R<u8, Reg<u8, _INTENSET>>
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impl R<u8, Reg<u8, _INTFLAG>>
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impl R<u8, Reg<u8, _STATUS>>
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pub fn syncbusy(&self) -> SYNCBUSY_R
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Bit 7 - Synchronization Busy
Trait Implementations
Auto Trait Implementations
impl<U, T> Send for R<U, T> where
T: Send,
U: Send,
T: Send,
U: Send,
impl<U, T> Sync for R<U, T> where
T: Sync,
U: Sync,
T: Sync,
U: Sync,
impl<U, T> Unpin for R<U, T> where
T: Unpin,
U: Unpin,
T: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> Same<T> for T
type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,