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use crate::ehal::timer::{CountDown, Periodic};
#[cfg(feature = "samd11")]
use crate::pac::tc1::COUNT16;
#[cfg(feature = "samd21")]
use crate::pac::tc3::COUNT16;
#[allow(unused)]
#[cfg(feature = "samd11")]
use crate::pac::{PM, TC1};
#[allow(unused)]
#[cfg(feature = "samd21")]
use crate::pac::{PM, TC3, TC4, TC5};
use crate::timer_params::TimerParams;
use crate::clock;
use crate::time::{Hertz, Nanoseconds};
use crate::timer_traits::InterruptDrivenTimer;
use void::Void;
use cortex_m::asm::delay as cycle_delay;
pub struct TimerCounter<TC> {
freq: Hertz,
tc: TC,
}
pub trait Count16 {
fn count_16(&self) -> &COUNT16;
}
impl<TC> Periodic for TimerCounter<TC> {}
impl<TC> CountDown for TimerCounter<TC>
where
TC: Count16,
{
type Time = Nanoseconds;
fn start<T>(&mut self, timeout: T)
where
T: Into<Self::Time>,
{
let params = TimerParams::new_us(timeout, self.freq.0);
let divider = params.divider;
let cycles = params.cycles;
let count = self.tc.count_16();
count.ctrla.modify(|_, w| w.enable().clear_bit());
while count.status.read().syncbusy().bit_is_set() {}
count.ctrla.write(|w| w.swrst().set_bit());
while count.status.read().syncbusy().bit_is_set() {}
while count.ctrla.read().bits() & 1 != 0 {}
count.ctrlbset.write(|w| {
w.dir().clear_bit();
w.oneshot().clear_bit()
});
count.cc[0].write(|w| unsafe { w.cc().bits(cycles as u16) });
count.ctrla.modify(|_, w| {
match divider {
1 => w.prescaler().div1(),
2 => w.prescaler().div2(),
4 => w.prescaler().div4(),
8 => w.prescaler().div8(),
16 => w.prescaler().div16(),
64 => w.prescaler().div64(),
256 => w.prescaler().div256(),
1024 => w.prescaler().div1024(),
_ => unreachable!(),
};
w.wavegen().mfrq();
w.enable().set_bit();
w.runstdby().set_bit()
});
}
fn wait(&mut self) -> nb::Result<(), Void> {
let count = self.tc.count_16();
if count.intflag.read().ovf().bit_is_set() {
count.intflag.modify(|_, w| w.ovf().set_bit());
Ok(())
} else {
Err(nb::Error::WouldBlock)
}
}
}
impl<TC> InterruptDrivenTimer for TimerCounter<TC>
where
TC: Count16,
{
fn enable_interrupt(&mut self) {
self.tc.count_16().intenset.write(|w| w.ovf().set_bit());
}
fn disable_interrupt(&mut self) {
self.tc.count_16().intenclr.write(|w| w.ovf().set_bit());
}
}
macro_rules! tc {
($($TYPE:ident: ($TC:ident, $pm:ident, $clock:ident),)+) => {
$(
pub type $TYPE = TimerCounter<$TC>;
impl Count16 for $TC {
fn count_16(&self) -> &COUNT16 {
self.count16()
}
}
impl TimerCounter<$TC>
{
pub fn $pm(clock: &clock::$clock, tc: $TC, pm: &mut PM) -> Self {
pm.apbcmask.modify(|_, w| w.$pm().set_bit());
{
let count = tc.count_16();
count.ctrla.modify(|_, w| w.enable().clear_bit());
while count.status.read().syncbusy().bit_is_set() {}
}
Self {
freq: clock.freq(),
tc,
}
}
}
)+
}
}
#[cfg(feature = "samd11")]
tc! {
TimerCounter1: (TC1, tc1_, Tc1Tc2Clock),
}
#[cfg(feature = "samd21")]
tc! {
TimerCounter3: (TC3, tc3_, Tcc2Tc3Clock),
TimerCounter4: (TC4, tc4_, Tc4Tc5Clock),
TimerCounter5: (TC5, tc5_, Tc4Tc5Clock),
}
#[deprecated(
since = "0.13.0",
note = "`SpinTimer` is deprecated, and will be removed in a subsequent release."
)]
#[derive(Clone, Copy)]
pub struct SpinTimer {
cycles: u32,
}
#[allow(deprecated)]
impl SpinTimer {
pub fn new(cycles: u32) -> SpinTimer {
SpinTimer { cycles }
}
}
#[allow(deprecated)]
impl Periodic for SpinTimer {}
#[allow(deprecated)]
impl CountDown for SpinTimer {
type Time = u32;
fn start<T>(&mut self, cycles: T)
where
T: Into<Self::Time>,
{
self.cycles = cycles.into();
}
fn wait(&mut self) -> nb::Result<(), void::Void> {
cycle_delay(self.cycles);
Ok(())
}
}