atsam4sd32c_pac/uart1/
ptsr.rs

1#[doc = "Register `PTSR` reader"]
2pub struct R(crate::R<PTSR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PTSR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PTSR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PTSR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RXTEN` reader - Receiver Transfer Enable"]
17pub type RXTEN_R = crate::BitReader<bool>;
18#[doc = "Field `TXTEN` reader - Transmitter Transfer Enable"]
19pub type TXTEN_R = crate::BitReader<bool>;
20impl R {
21    #[doc = "Bit 0 - Receiver Transfer Enable"]
22    #[inline(always)]
23    pub fn rxten(&self) -> RXTEN_R {
24        RXTEN_R::new((self.bits & 1) != 0)
25    }
26    #[doc = "Bit 8 - Transmitter Transfer Enable"]
27    #[inline(always)]
28    pub fn txten(&self) -> TXTEN_R {
29        TXTEN_R::new(((self.bits >> 8) & 1) != 0)
30    }
31}
32#[doc = "Transfer Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptsr](index.html) module"]
33pub struct PTSR_SPEC;
34impl crate::RegisterSpec for PTSR_SPEC {
35    type Ux = u32;
36}
37#[doc = "`read()` method returns [ptsr::R](R) reader structure"]
38impl crate::Readable for PTSR_SPEC {
39    type Reader = R;
40}
41#[doc = "`reset()` method sets PTSR to value 0"]
42impl crate::Resettable for PTSR_SPEC {
43    const RESET_VALUE: Self::Ux = 0;
44}
atsam4sd32c_pac/uart1/ptsr.rs

atsam4sd32c_pac/uart1/
ptsr.rs
