atsam4sd32c_pac/rtc/
timr.rs

1#[doc = "Register `TIMR` reader"]
2pub struct R(crate::R<TIMR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TIMR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TIMR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TIMR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TIMR` writer"]
17pub struct W(crate::W<TIMR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TIMR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TIMR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TIMR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SEC` reader - Current Second"]
38pub type SEC_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SEC` writer - Current Second"]
40pub type SEC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMR_SPEC, u8, u8, 7, O>;
41#[doc = "Field `MIN` reader - Current Minute"]
42pub type MIN_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `MIN` writer - Current Minute"]
44pub type MIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMR_SPEC, u8, u8, 7, O>;
45#[doc = "Field `HOUR` reader - Current Hour"]
46pub type HOUR_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `HOUR` writer - Current Hour"]
48pub type HOUR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TIMR_SPEC, u8, u8, 6, O>;
49#[doc = "Field `AMPM` reader - Ante Meridiem Post Meridiem Indicator"]
50pub type AMPM_R = crate::BitReader<bool>;
51#[doc = "Field `AMPM` writer - Ante Meridiem Post Meridiem Indicator"]
52pub type AMPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, TIMR_SPEC, bool, O>;
53impl R {
54    #[doc = "Bits 0:6 - Current Second"]
55    #[inline(always)]
56    pub fn sec(&self) -> SEC_R {
57        SEC_R::new((self.bits & 0x7f) as u8)
58    }
59    #[doc = "Bits 8:14 - Current Minute"]
60    #[inline(always)]
61    pub fn min(&self) -> MIN_R {
62        MIN_R::new(((self.bits >> 8) & 0x7f) as u8)
63    }
64    #[doc = "Bits 16:21 - Current Hour"]
65    #[inline(always)]
66    pub fn hour(&self) -> HOUR_R {
67        HOUR_R::new(((self.bits >> 16) & 0x3f) as u8)
68    }
69    #[doc = "Bit 22 - Ante Meridiem Post Meridiem Indicator"]
70    #[inline(always)]
71    pub fn ampm(&self) -> AMPM_R {
72        AMPM_R::new(((self.bits >> 22) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bits 0:6 - Current Second"]
77    #[inline(always)]
78    #[must_use]
79    pub fn sec(&mut self) -> SEC_W<0> {
80        SEC_W::new(self)
81    }
82    #[doc = "Bits 8:14 - Current Minute"]
83    #[inline(always)]
84    #[must_use]
85    pub fn min(&mut self) -> MIN_W<8> {
86        MIN_W::new(self)
87    }
88    #[doc = "Bits 16:21 - Current Hour"]
89    #[inline(always)]
90    #[must_use]
91    pub fn hour(&mut self) -> HOUR_W<16> {
92        HOUR_W::new(self)
93    }
94    #[doc = "Bit 22 - Ante Meridiem Post Meridiem Indicator"]
95    #[inline(always)]
96    #[must_use]
97    pub fn ampm(&mut self) -> AMPM_W<22> {
98        AMPM_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timr](index.html) module"]
108pub struct TIMR_SPEC;
109impl crate::RegisterSpec for TIMR_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [timr::R](R) reader structure"]
113impl crate::Readable for TIMR_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [timr::W](W) writer structure"]
117impl crate::Writable for TIMR_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets TIMR to value 0"]
123impl crate::Resettable for TIMR_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
atsam4sd32c_pac/rtc/timr.rs

atsam4sd32c_pac/rtc/
timr.rs
