atsam4sd32c_pac/usart0/
spi_mode_ier_spi_mode.rs

1#[doc = "Register `IER_SPI_MODE` writer"]
2pub struct W(crate::W<SPI_MODE_IER_SPI_MODE_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<SPI_MODE_IER_SPI_MODE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<SPI_MODE_IER_SPI_MODE_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<SPI_MODE_IER_SPI_MODE_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXRDY` writer - RXRDY Interrupt Enable"]
23pub type RXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
24#[doc = "Field `TXRDY` writer - TXRDY Interrupt Enable"]
25pub type TXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
26#[doc = "Field `ENDRX` writer - "]
27pub type ENDRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
28#[doc = "Field `ENDTX` writer - "]
29pub type ENDTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
30#[doc = "Field `OVRE` writer - Overrun Error Interrupt Enable"]
31pub type OVRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
32#[doc = "Field `TXEMPTY` writer - TXEMPTY Interrupt Enable"]
33pub type TXEMPTY_W<'a, const O: u8> =
34    crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
35#[doc = "Field `UNRE` writer - SPI Underrun Error Interrupt Enable"]
36pub type UNRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
37#[doc = "Field `TXBUFE` writer - "]
38pub type TXBUFE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
39#[doc = "Field `RXBUFF` writer - "]
40pub type RXBUFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_MODE_IER_SPI_MODE_SPEC, bool, O>;
41impl W {
42    #[doc = "Bit 0 - RXRDY Interrupt Enable"]
43    #[inline(always)]
44    #[must_use]
45    pub fn rxrdy(&mut self) -> RXRDY_W<0> {
46        RXRDY_W::new(self)
47    }
48    #[doc = "Bit 1 - TXRDY Interrupt Enable"]
49    #[inline(always)]
50    #[must_use]
51    pub fn txrdy(&mut self) -> TXRDY_W<1> {
52        TXRDY_W::new(self)
53    }
54    #[doc = "Bit 3"]
55    #[inline(always)]
56    #[must_use]
57    pub fn endrx(&mut self) -> ENDRX_W<3> {
58        ENDRX_W::new(self)
59    }
60    #[doc = "Bit 4"]
61    #[inline(always)]
62    #[must_use]
63    pub fn endtx(&mut self) -> ENDTX_W<4> {
64        ENDTX_W::new(self)
65    }
66    #[doc = "Bit 5 - Overrun Error Interrupt Enable"]
67    #[inline(always)]
68    #[must_use]
69    pub fn ovre(&mut self) -> OVRE_W<5> {
70        OVRE_W::new(self)
71    }
72    #[doc = "Bit 9 - TXEMPTY Interrupt Enable"]
73    #[inline(always)]
74    #[must_use]
75    pub fn txempty(&mut self) -> TXEMPTY_W<9> {
76        TXEMPTY_W::new(self)
77    }
78    #[doc = "Bit 10 - SPI Underrun Error Interrupt Enable"]
79    #[inline(always)]
80    #[must_use]
81    pub fn unre(&mut self) -> UNRE_W<10> {
82        UNRE_W::new(self)
83    }
84    #[doc = "Bit 11"]
85    #[inline(always)]
86    #[must_use]
87    pub fn txbufe(&mut self) -> TXBUFE_W<11> {
88        TXBUFE_W::new(self)
89    }
90    #[doc = "Bit 12"]
91    #[inline(always)]
92    #[must_use]
93    pub fn rxbuff(&mut self) -> RXBUFF_W<12> {
94        RXBUFF_W::new(self)
95    }
96    #[doc = "Writes raw bits to the register."]
97    #[inline(always)]
98    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99        self.0.bits(bits);
100        self
101    }
102}
103#[doc = "Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_mode_ier_spi_mode](index.html) module"]
104pub struct SPI_MODE_IER_SPI_MODE_SPEC;
105impl crate::RegisterSpec for SPI_MODE_IER_SPI_MODE_SPEC {
106    type Ux = u32;
107}
108#[doc = "`write(|w| ..)` method takes [spi_mode_ier_spi_mode::W](W) writer structure"]
109impl crate::Writable for SPI_MODE_IER_SPI_MODE_SPEC {
110    type Writer = W;
111    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
112    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
113}
atsam4sd32c_pac/usart0/spi_mode_ier_spi_mode.rs

atsam4sd32c_pac/usart0/
spi_mode_ier_spi_mode.rs
