atsam4sd32c_pac/tc1/
imr2.rs

1#[doc = "Register `IMR2` reader"]
2pub struct R(crate::R<IMR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IMR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IMR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IMR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `COVFS` reader - Counter Overflow"]
17pub type COVFS_R = crate::BitReader<bool>;
18#[doc = "Field `LOVRS` reader - Load Overrun"]
19pub type LOVRS_R = crate::BitReader<bool>;
20#[doc = "Field `CPAS` reader - RA Compare"]
21pub type CPAS_R = crate::BitReader<bool>;
22#[doc = "Field `CPBS` reader - RB Compare"]
23pub type CPBS_R = crate::BitReader<bool>;
24#[doc = "Field `CPCS` reader - RC Compare"]
25pub type CPCS_R = crate::BitReader<bool>;
26#[doc = "Field `LDRAS` reader - RA Loading"]
27pub type LDRAS_R = crate::BitReader<bool>;
28#[doc = "Field `LDRBS` reader - RB Loading"]
29pub type LDRBS_R = crate::BitReader<bool>;
30#[doc = "Field `ETRGS` reader - External Trigger"]
31pub type ETRGS_R = crate::BitReader<bool>;
32impl R {
33    #[doc = "Bit 0 - Counter Overflow"]
34    #[inline(always)]
35    pub fn covfs(&self) -> COVFS_R {
36        COVFS_R::new((self.bits & 1) != 0)
37    }
38    #[doc = "Bit 1 - Load Overrun"]
39    #[inline(always)]
40    pub fn lovrs(&self) -> LOVRS_R {
41        LOVRS_R::new(((self.bits >> 1) & 1) != 0)
42    }
43    #[doc = "Bit 2 - RA Compare"]
44    #[inline(always)]
45    pub fn cpas(&self) -> CPAS_R {
46        CPAS_R::new(((self.bits >> 2) & 1) != 0)
47    }
48    #[doc = "Bit 3 - RB Compare"]
49    #[inline(always)]
50    pub fn cpbs(&self) -> CPBS_R {
51        CPBS_R::new(((self.bits >> 3) & 1) != 0)
52    }
53    #[doc = "Bit 4 - RC Compare"]
54    #[inline(always)]
55    pub fn cpcs(&self) -> CPCS_R {
56        CPCS_R::new(((self.bits >> 4) & 1) != 0)
57    }
58    #[doc = "Bit 5 - RA Loading"]
59    #[inline(always)]
60    pub fn ldras(&self) -> LDRAS_R {
61        LDRAS_R::new(((self.bits >> 5) & 1) != 0)
62    }
63    #[doc = "Bit 6 - RB Loading"]
64    #[inline(always)]
65    pub fn ldrbs(&self) -> LDRBS_R {
66        LDRBS_R::new(((self.bits >> 6) & 1) != 0)
67    }
68    #[doc = "Bit 7 - External Trigger"]
69    #[inline(always)]
70    pub fn etrgs(&self) -> ETRGS_R {
71        ETRGS_R::new(((self.bits >> 7) & 1) != 0)
72    }
73}
74#[doc = "Interrupt Mask Register (channel = 2)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr2](index.html) module"]
75pub struct IMR2_SPEC;
76impl crate::RegisterSpec for IMR2_SPEC {
77    type Ux = u32;
78}
79#[doc = "`read()` method returns [imr2::R](R) reader structure"]
80impl crate::Readable for IMR2_SPEC {
81    type Reader = R;
82}
83#[doc = "`reset()` method sets IMR2 to value 0"]
84impl crate::Resettable for IMR2_SPEC {
85    const RESET_VALUE: Self::Ux = 0;
86}
atsam4sd32c_pac/tc1/imr2.rs

atsam4sd32c_pac/tc1/
imr2.rs
