Struct atsam4sd32c_pac::hsmci::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 29 fields pub cr: Reg<CR_SPEC>, pub mr: Reg<MR_SPEC>, pub dtor: Reg<DTOR_SPEC>, pub sdcr: Reg<SDCR_SPEC>, pub argr: Reg<ARGR_SPEC>, pub cmdr: Reg<CMDR_SPEC>, pub blkr: Reg<BLKR_SPEC>, pub cstor: Reg<CSTOR_SPEC>, pub rspr: [Reg<RSPR_SPEC>; 4], pub rdr: Reg<RDR_SPEC>, pub tdr: Reg<TDR_SPEC>, pub sr: Reg<SR_SPEC>, pub ier: Reg<IER_SPEC>, pub idr: Reg<IDR_SPEC>, pub imr: Reg<IMR_SPEC>, pub cfg: Reg<CFG_SPEC>, pub wpmr: Reg<WPMR_SPEC>, pub wpsr: Reg<WPSR_SPEC>, pub rpr: Reg<RPR_SPEC>, pub rcr: Reg<RCR_SPEC>, pub tpr: Reg<TPR_SPEC>, pub tcr: Reg<TCR_SPEC>, pub rnpr: Reg<RNPR_SPEC>, pub rncr: Reg<RNCR_SPEC>, pub tnpr: Reg<TNPR_SPEC>, pub tncr: Reg<TNCR_SPEC>, pub ptcr: Reg<PTCR_SPEC>, pub ptsr: Reg<PTSR_SPEC>, pub fifo: [Reg<FIFO_SPEC>; 256], // some fields omitted
}
Expand description

Register block

Fields

cr: Reg<CR_SPEC>

0x00 - Control Register

mr: Reg<MR_SPEC>

0x04 - Mode Register

dtor: Reg<DTOR_SPEC>

0x08 - Data Timeout Register

sdcr: Reg<SDCR_SPEC>

0x0c - SD/SDIO Card Register

argr: Reg<ARGR_SPEC>

0x10 - Argument Register

cmdr: Reg<CMDR_SPEC>

0x14 - Command Register

blkr: Reg<BLKR_SPEC>

0x18 - Block Register

cstor: Reg<CSTOR_SPEC>

0x1c - Completion Signal Timeout Register

rspr: [Reg<RSPR_SPEC>; 4]

0x20..0x30 - Response Register

rdr: Reg<RDR_SPEC>

0x30 - Receive Data Register

tdr: Reg<TDR_SPEC>

0x34 - Transmit Data Register

sr: Reg<SR_SPEC>

0x40 - Status Register

ier: Reg<IER_SPEC>

0x44 - Interrupt Enable Register

idr: Reg<IDR_SPEC>

0x48 - Interrupt Disable Register

imr: Reg<IMR_SPEC>

0x4c - Interrupt Mask Register

cfg: Reg<CFG_SPEC>

0x54 - Configuration Register

wpmr: Reg<WPMR_SPEC>

0xe4 - Write Protection Mode Register

wpsr: Reg<WPSR_SPEC>

0xe8 - Write Protection Status Register

rpr: Reg<RPR_SPEC>

0x100 - Receive Pointer Register

rcr: Reg<RCR_SPEC>

0x104 - Receive Counter Register

tpr: Reg<TPR_SPEC>

0x108 - Transmit Pointer Register

tcr: Reg<TCR_SPEC>

0x10c - Transmit Counter Register

rnpr: Reg<RNPR_SPEC>

0x110 - Receive Next Pointer Register

rncr: Reg<RNCR_SPEC>

0x114 - Receive Next Counter Register

tnpr: Reg<TNPR_SPEC>

0x118 - Transmit Next Pointer Register

tncr: Reg<TNCR_SPEC>

0x11c - Transmit Next Counter Register

ptcr: Reg<PTCR_SPEC>

0x120 - Transfer Control Register

ptsr: Reg<PTSR_SPEC>

0x124 - Transfer Status Register

fifo: [Reg<FIFO_SPEC>; 256]

0x200..0x600 - FIFO Memory Aperture0

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