atsam4sd32b_pac/pwm/
cdtyupd3.rs

1#[doc = "Register `CDTYUPD3` writer"]
2pub struct W(crate::W<CDTYUPD3_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CDTYUPD3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CDTYUPD3_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CDTYUPD3_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CDTYUPD` writer - Channel Duty-Cycle Update"]
23pub type CDTYUPD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CDTYUPD3_SPEC, u32, u32, 24, O>;
24impl W {
25    #[doc = "Bits 0:23 - Channel Duty-Cycle Update"]
26    #[inline(always)]
27    #[must_use]
28    pub fn cdtyupd(&mut self) -> CDTYUPD_W<0> {
29        CDTYUPD_W::new(self)
30    }
31    #[doc = "Writes raw bits to the register."]
32    #[inline(always)]
33    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
34        self.0.bits(bits);
35        self
36    }
37}
38#[doc = "PWM Channel Duty Cycle Update Register (ch_num = 3)\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cdtyupd3](index.html) module"]
39pub struct CDTYUPD3_SPEC;
40impl crate::RegisterSpec for CDTYUPD3_SPEC {
41    type Ux = u32;
42}
43#[doc = "`write(|w| ..)` method takes [cdtyupd3::W](W) writer structure"]
44impl crate::Writable for CDTYUPD3_SPEC {
45    type Writer = W;
46    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
47    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
48}