atsam4sa16b_pac/uart0/
cr.rs

1#[doc = "Register `CR` writer"]
2pub struct W(crate::W<CR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RSTRX` writer - Reset Receiver"]
23pub type RSTRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
24#[doc = "Field `RSTTX` writer - Reset Transmitter"]
25pub type RSTTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
26#[doc = "Field `RXEN` writer - Receiver Enable"]
27pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
28#[doc = "Field `RXDIS` writer - Receiver Disable"]
29pub type RXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
30#[doc = "Field `TXEN` writer - Transmitter Enable"]
31pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
32#[doc = "Field `TXDIS` writer - Transmitter Disable"]
33pub type TXDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
34#[doc = "Field `RSTSTA` writer - Reset Status Bits"]
35pub type RSTSTA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
36impl W {
37    #[doc = "Bit 2 - Reset Receiver"]
38    #[inline(always)]
39    #[must_use]
40    pub fn rstrx(&mut self) -> RSTRX_W<2> {
41        RSTRX_W::new(self)
42    }
43    #[doc = "Bit 3 - Reset Transmitter"]
44    #[inline(always)]
45    #[must_use]
46    pub fn rsttx(&mut self) -> RSTTX_W<3> {
47        RSTTX_W::new(self)
48    }
49    #[doc = "Bit 4 - Receiver Enable"]
50    #[inline(always)]
51    #[must_use]
52    pub fn rxen(&mut self) -> RXEN_W<4> {
53        RXEN_W::new(self)
54    }
55    #[doc = "Bit 5 - Receiver Disable"]
56    #[inline(always)]
57    #[must_use]
58    pub fn rxdis(&mut self) -> RXDIS_W<5> {
59        RXDIS_W::new(self)
60    }
61    #[doc = "Bit 6 - Transmitter Enable"]
62    #[inline(always)]
63    #[must_use]
64    pub fn txen(&mut self) -> TXEN_W<6> {
65        TXEN_W::new(self)
66    }
67    #[doc = "Bit 7 - Transmitter Disable"]
68    #[inline(always)]
69    #[must_use]
70    pub fn txdis(&mut self) -> TXDIS_W<7> {
71        TXDIS_W::new(self)
72    }
73    #[doc = "Bit 8 - Reset Status Bits"]
74    #[inline(always)]
75    #[must_use]
76    pub fn rststa(&mut self) -> RSTSTA_W<8> {
77        RSTSTA_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Control Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
87pub struct CR_SPEC;
88impl crate::RegisterSpec for CR_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
92impl crate::Writable for CR_SPEC {
93    type Writer = W;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
atsam4sa16b_pac/uart0/cr.rs

atsam4sa16b_pac/uart0/
cr.rs
