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#[doc = "Writer for register PCIDR"] pub type W = crate::W<u32, super::PCIDR>; #[doc = "Write proxy for field `DRDY`"] pub struct DRDY_W<'a> { w: &'a mut W, } impl<'a> DRDY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Write proxy for field `OVRE`"] pub struct OVRE_W<'a> { w: &'a mut W, } impl<'a> OVRE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Write proxy for field `ENDRX`"] pub struct ENDRX_W<'a> { w: &'a mut W, } impl<'a> ENDRX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Write proxy for field `RXBUFF`"] pub struct RXBUFF_W<'a> { w: &'a mut W, } impl<'a> RXBUFF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } impl W { #[doc = "Bit 0 - Parallel Capture Mode Data Ready Interrupt Disable"] #[inline(always)] pub fn drdy(&mut self) -> DRDY_W { DRDY_W { w: self } } #[doc = "Bit 1 - Parallel Capture Mode Overrun Error Interrupt Disable"] #[inline(always)] pub fn ovre(&mut self) -> OVRE_W { OVRE_W { w: self } } #[doc = "Bit 2 - End of Reception Transfer Interrupt Disable"] #[inline(always)] pub fn endrx(&mut self) -> ENDRX_W { ENDRX_W { w: self } } #[doc = "Bit 3 - Reception Buffer Full Interrupt Disable"] #[inline(always)] pub fn rxbuff(&mut self) -> RXBUFF_W { RXBUFF_W { w: self } } }