#[doc = "Register `IER` writer"]
pub struct W(crate::W<IER_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IER_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IER_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IER_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RXRDY` writer - Enable RXRDY Interrupt"]
pub type RXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `TXRDY` writer - Enable TXRDY Interrupt"]
pub type TXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `ENDRX` writer - Enable End of Receive Transfer Interrupt"]
pub type ENDRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `ENDTX` writer - Enable End of Transmit Interrupt"]
pub type ENDTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `OVRE` writer - Enable Overrun Error Interrupt"]
pub type OVRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `FRAME` writer - Enable Framing Error Interrupt"]
pub type FRAME_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `PARE` writer - Enable Parity Error Interrupt"]
pub type PARE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `TXEMPTY` writer - Enable TXEMPTY Interrupt"]
pub type TXEMPTY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `TXBUFE` writer - Enable Buffer Empty Interrupt"]
pub type TXBUFE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
#[doc = "Field `RXBUFF` writer - Enable Buffer Full Interrupt"]
pub type RXBUFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
impl W {
#[doc = "Bit 0 - Enable RXRDY Interrupt"]
#[inline(always)]
#[must_use]
pub fn rxrdy(&mut self) -> RXRDY_W<0> {
RXRDY_W::new(self)
}
#[doc = "Bit 1 - Enable TXRDY Interrupt"]
#[inline(always)]
#[must_use]
pub fn txrdy(&mut self) -> TXRDY_W<1> {
TXRDY_W::new(self)
}
#[doc = "Bit 3 - Enable End of Receive Transfer Interrupt"]
#[inline(always)]
#[must_use]
pub fn endrx(&mut self) -> ENDRX_W<3> {
ENDRX_W::new(self)
}
#[doc = "Bit 4 - Enable End of Transmit Interrupt"]
#[inline(always)]
#[must_use]
pub fn endtx(&mut self) -> ENDTX_W<4> {
ENDTX_W::new(self)
}
#[doc = "Bit 5 - Enable Overrun Error Interrupt"]
#[inline(always)]
#[must_use]
pub fn ovre(&mut self) -> OVRE_W<5> {
OVRE_W::new(self)
}
#[doc = "Bit 6 - Enable Framing Error Interrupt"]
#[inline(always)]
#[must_use]
pub fn frame(&mut self) -> FRAME_W<6> {
FRAME_W::new(self)
}
#[doc = "Bit 7 - Enable Parity Error Interrupt"]
#[inline(always)]
#[must_use]
pub fn pare(&mut self) -> PARE_W<7> {
PARE_W::new(self)
}
#[doc = "Bit 9 - Enable TXEMPTY Interrupt"]
#[inline(always)]
#[must_use]
pub fn txempty(&mut self) -> TXEMPTY_W<9> {
TXEMPTY_W::new(self)
}
#[doc = "Bit 11 - Enable Buffer Empty Interrupt"]
#[inline(always)]
#[must_use]
pub fn txbufe(&mut self) -> TXBUFE_W<11> {
TXBUFE_W::new(self)
}
#[doc = "Bit 12 - Enable Buffer Full Interrupt"]
#[inline(always)]
#[must_use]
pub fn rxbuff(&mut self) -> RXBUFF_W<12> {
RXBUFF_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](index.html) module"]
pub struct IER_SPEC;
impl crate::RegisterSpec for IER_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [ier::W](W) writer structure"]
impl crate::Writable for IER_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}