atsam4n8a_pac/matrix/
ccfg_sysio.rs

1#[doc = "Register `CCFG_SYSIO` reader"]
2pub struct R(crate::R<CCFG_SYSIO_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CCFG_SYSIO_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CCFG_SYSIO_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CCFG_SYSIO_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CCFG_SYSIO` writer"]
17pub struct W(crate::W<CCFG_SYSIO_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CCFG_SYSIO_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CCFG_SYSIO_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CCFG_SYSIO_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SYSIO4` reader - PB4 or TDI Assignment"]
38pub type SYSIO4_R = crate::BitReader<bool>;
39#[doc = "Field `SYSIO4` writer - PB4 or TDI Assignment"]
40pub type SYSIO4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCFG_SYSIO_SPEC, bool, O>;
41#[doc = "Field `SYSIO5` reader - PB5 or TDO/TRACESWO Assignment"]
42pub type SYSIO5_R = crate::BitReader<bool>;
43#[doc = "Field `SYSIO5` writer - PB5 or TDO/TRACESWO Assignment"]
44pub type SYSIO5_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCFG_SYSIO_SPEC, bool, O>;
45#[doc = "Field `SYSIO6` reader - PB6 or TMS/SWDIO Assignment"]
46pub type SYSIO6_R = crate::BitReader<bool>;
47#[doc = "Field `SYSIO6` writer - PB6 or TMS/SWDIO Assignment"]
48pub type SYSIO6_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCFG_SYSIO_SPEC, bool, O>;
49#[doc = "Field `SYSIO7` reader - PB7 or TCK/SWCLK Assignment"]
50pub type SYSIO7_R = crate::BitReader<bool>;
51#[doc = "Field `SYSIO7` writer - PB7 or TCK/SWCLK Assignment"]
52pub type SYSIO7_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCFG_SYSIO_SPEC, bool, O>;
53#[doc = "Field `SYSIO12` reader - PB12 or ERASE Assignment"]
54pub type SYSIO12_R = crate::BitReader<bool>;
55#[doc = "Field `SYSIO12` writer - PB12 or ERASE Assignment"]
56pub type SYSIO12_W<'a, const O: u8> = crate::BitWriter<'a, u32, CCFG_SYSIO_SPEC, bool, O>;
57impl R {
58    #[doc = "Bit 4 - PB4 or TDI Assignment"]
59    #[inline(always)]
60    pub fn sysio4(&self) -> SYSIO4_R {
61        SYSIO4_R::new(((self.bits >> 4) & 1) != 0)
62    }
63    #[doc = "Bit 5 - PB5 or TDO/TRACESWO Assignment"]
64    #[inline(always)]
65    pub fn sysio5(&self) -> SYSIO5_R {
66        SYSIO5_R::new(((self.bits >> 5) & 1) != 0)
67    }
68    #[doc = "Bit 6 - PB6 or TMS/SWDIO Assignment"]
69    #[inline(always)]
70    pub fn sysio6(&self) -> SYSIO6_R {
71        SYSIO6_R::new(((self.bits >> 6) & 1) != 0)
72    }
73    #[doc = "Bit 7 - PB7 or TCK/SWCLK Assignment"]
74    #[inline(always)]
75    pub fn sysio7(&self) -> SYSIO7_R {
76        SYSIO7_R::new(((self.bits >> 7) & 1) != 0)
77    }
78    #[doc = "Bit 12 - PB12 or ERASE Assignment"]
79    #[inline(always)]
80    pub fn sysio12(&self) -> SYSIO12_R {
81        SYSIO12_R::new(((self.bits >> 12) & 1) != 0)
82    }
83}
84impl W {
85    #[doc = "Bit 4 - PB4 or TDI Assignment"]
86    #[inline(always)]
87    #[must_use]
88    pub fn sysio4(&mut self) -> SYSIO4_W<4> {
89        SYSIO4_W::new(self)
90    }
91    #[doc = "Bit 5 - PB5 or TDO/TRACESWO Assignment"]
92    #[inline(always)]
93    #[must_use]
94    pub fn sysio5(&mut self) -> SYSIO5_W<5> {
95        SYSIO5_W::new(self)
96    }
97    #[doc = "Bit 6 - PB6 or TMS/SWDIO Assignment"]
98    #[inline(always)]
99    #[must_use]
100    pub fn sysio6(&mut self) -> SYSIO6_W<6> {
101        SYSIO6_W::new(self)
102    }
103    #[doc = "Bit 7 - PB7 or TCK/SWCLK Assignment"]
104    #[inline(always)]
105    #[must_use]
106    pub fn sysio7(&mut self) -> SYSIO7_W<7> {
107        SYSIO7_W::new(self)
108    }
109    #[doc = "Bit 12 - PB12 or ERASE Assignment"]
110    #[inline(always)]
111    #[must_use]
112    pub fn sysio12(&mut self) -> SYSIO12_W<12> {
113        SYSIO12_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "System I/O Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccfg_sysio](index.html) module"]
123pub struct CCFG_SYSIO_SPEC;
124impl crate::RegisterSpec for CCFG_SYSIO_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [ccfg_sysio::R](R) reader structure"]
128impl crate::Readable for CCFG_SYSIO_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [ccfg_sysio::W](W) writer structure"]
132impl crate::Writable for CCFG_SYSIO_SPEC {
133    type Writer = W;
134    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
135    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136}
137#[doc = "`reset()` method sets CCFG_SYSIO to value 0"]
138impl crate::Resettable for CCFG_SYSIO_SPEC {
139    const RESET_VALUE: Self::Ux = 0;
140}
atsam4n8a_pac/matrix/ccfg_sysio.rs

atsam4n8a_pac/matrix/
ccfg_sysio.rs
