Struct atsam4n16c_pac::usart0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {

    pub rhr: Reg<RHR_SPEC>,
    pub thr: Reg<THR_SPEC>,
    pub brgr: Reg<BRGR_SPEC>,
    pub rtor: Reg<RTOR_SPEC>,
    pub ttgr: Reg<TTGR_SPEC>,
    pub fidi: Reg<FIDI_SPEC>,
    pub ner: Reg<NER_SPEC>,
    pub if_: Reg<IF_SPEC>,
    pub wpmr: Reg<WPMR_SPEC>,
    pub wpsr: Reg<WPSR_SPEC>,
    pub rpr: Reg<RPR_SPEC>,
    pub rcr: Reg<RCR_SPEC>,
    pub tpr: Reg<TPR_SPEC>,
    pub tcr: Reg<TCR_SPEC>,
    pub rnpr: Reg<RNPR_SPEC>,
    pub rncr: Reg<RNCR_SPEC>,
    pub tnpr: Reg<TNPR_SPEC>,
    pub tncr: Reg<TNCR_SPEC>,
    pub ptcr: Reg<PTCR_SPEC>,
    pub ptsr: Reg<PTSR_SPEC>,
    // some fields omitted
}

Register block

Fields

rhr: Reg<RHR_SPEC>

0x18 - Receiver Holding Register

thr: Reg<THR_SPEC>

0x1c - Transmitter Holding Register

brgr: Reg<BRGR_SPEC>

0x20 - Baud Rate Generator Register

rtor: Reg<RTOR_SPEC>

0x24 - Receiver Time-out Register

ttgr: Reg<TTGR_SPEC>

0x28 - Transmitter Timeguard Register

fidi: Reg<FIDI_SPEC>

0x40 - FI DI Ratio Register

ner: Reg<NER_SPEC>

0x44 - Number of Errors Register

if_: Reg<IF_SPEC>

0x4c - IrDA Filter Register

wpmr: Reg<WPMR_SPEC>

0xe4 - Write Protect Mode Register

wpsr: Reg<WPSR_SPEC>

0xe8 - Write Protect Status Register

rpr: Reg<RPR_SPEC>

0x100 - Receive Pointer Register

rcr: Reg<RCR_SPEC>

0x104 - Receive Counter Register

tpr: Reg<TPR_SPEC>

0x108 - Transmit Pointer Register

tcr: Reg<TCR_SPEC>

0x10c - Transmit Counter Register

rnpr: Reg<RNPR_SPEC>

0x110 - Receive Next Pointer Register

rncr: Reg<RNCR_SPEC>

0x114 - Receive Next Counter Register

tnpr: Reg<TNPR_SPEC>

0x118 - Transmit Next Pointer Register

tncr: Reg<TNCR_SPEC>

0x11c - Transmit Next Counter Register

ptcr: Reg<PTCR_SPEC>

0x120 - Transfer Control Register

ptsr: Reg<PTSR_SPEC>

0x124 - Transfer Status Register

Implementations

impl RegisterBlock

pub fn spi_mode_cr_spi_mode(&self) -> &Reg<SPI_MODE_CR_SPI_MODE_SPEC>

0x00 - Control Register

pub fn cr(&self) -> &Reg<CR_SPEC>

0x00 - Control Register

pub fn spi_mode_mr_spi_mode(&self) -> &Reg<SPI_MODE_MR_SPI_MODE_SPEC>

0x04 - Mode Register

pub fn mr(&self) -> &Reg<MR_SPEC>

0x04 - Mode Register

pub fn spi_mode_ier_spi_mode(&self) -> &Reg<SPI_MODE_IER_SPI_MODE_SPEC>

0x08 - Interrupt Enable Register

pub fn ier(&self) -> &Reg<IER_SPEC>

0x08 - Interrupt Enable Register

pub fn spi_mode_idr_spi_mode(&self) -> &Reg<SPI_MODE_IDR_SPI_MODE_SPEC>

0x0c - Interrupt Disable Register

pub fn idr(&self) -> &Reg<IDR_SPEC>

0x0c - Interrupt Disable Register

pub fn spi_mode_imr_spi_mode(&self) -> &Reg<SPI_MODE_IMR_SPI_MODE_SPEC>

0x10 - Interrupt Mask Register

pub fn imr(&self) -> &Reg<IMR_SPEC>

0x10 - Interrupt Mask Register

pub fn spi_mode_csr_spi_mode(&self) -> &Reg<SPI_MODE_CSR_SPI_MODE_SPEC>

0x14 - Channel Status Register

pub fn csr(&self) -> &Reg<CSR_SPEC>

0x14 - Channel Status Register