Struct atsam4n16c_pac::usart0::idr::W [−][src]
pub struct W(_);
Expand description
Register IDR
writer
Implementations
Bit 3 - End of Receive Transfer Interrupt Disable (available in all USART modes of operation)
Bit 4 - End of Transmit Interrupt Disable (available in all USART modes of operation)
Bit 10 - Max Number of Repetitions Reached Interrupt Disable
Bit 11 - Buffer Empty Interrupt Disable (available in all USART modes of operation)
Bit 12 - Buffer Full Interrupt Disable (available in all USART modes of operation)