1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Channel Control Register (channel = 0)"]
5 pub ccr0: CCR0,
6 _reserved_1_cmr0: [u8; 0x04],
7 #[doc = "0x08 - Stepper Motor Mode Register (channel = 0)"]
8 pub smmr0: SMMR0,
9 _reserved3: [u8; 0x04],
10 #[doc = "0x10 - Counter Value (channel = 0)"]
11 pub cv0: CV0,
12 #[doc = "0x14 - Register A (channel = 0)"]
13 pub ra0: RA0,
14 #[doc = "0x18 - Register B (channel = 0)"]
15 pub rb0: RB0,
16 #[doc = "0x1c - Register C (channel = 0)"]
17 pub rc0: RC0,
18 #[doc = "0x20 - Status Register (channel = 0)"]
19 pub sr0: SR0,
20 #[doc = "0x24 - Interrupt Enable Register (channel = 0)"]
21 pub ier0: IER0,
22 #[doc = "0x28 - Interrupt Disable Register (channel = 0)"]
23 pub idr0: IDR0,
24 #[doc = "0x2c - Interrupt Mask Register (channel = 0)"]
25 pub imr0: IMR0,
26 _reserved11: [u8; 0x10],
27 #[doc = "0x40 - Channel Control Register (channel = 1)"]
28 pub ccr1: CCR1,
29 _reserved_12_cmr1: [u8; 0x04],
30 #[doc = "0x48 - Stepper Motor Mode Register (channel = 1)"]
31 pub smmr1: SMMR1,
32 _reserved14: [u8; 0x04],
33 #[doc = "0x50 - Counter Value (channel = 1)"]
34 pub cv1: CV1,
35 #[doc = "0x54 - Register A (channel = 1)"]
36 pub ra1: RA1,
37 #[doc = "0x58 - Register B (channel = 1)"]
38 pub rb1: RB1,
39 #[doc = "0x5c - Register C (channel = 1)"]
40 pub rc1: RC1,
41 #[doc = "0x60 - Status Register (channel = 1)"]
42 pub sr1: SR1,
43 #[doc = "0x64 - Interrupt Enable Register (channel = 1)"]
44 pub ier1: IER1,
45 #[doc = "0x68 - Interrupt Disable Register (channel = 1)"]
46 pub idr1: IDR1,
47 #[doc = "0x6c - Interrupt Mask Register (channel = 1)"]
48 pub imr1: IMR1,
49 _reserved22: [u8; 0x10],
50 #[doc = "0x80 - Channel Control Register (channel = 2)"]
51 pub ccr2: CCR2,
52 _reserved_23_cmr2: [u8; 0x04],
53 #[doc = "0x88 - Stepper Motor Mode Register (channel = 2)"]
54 pub smmr2: SMMR2,
55 _reserved25: [u8; 0x04],
56 #[doc = "0x90 - Counter Value (channel = 2)"]
57 pub cv2: CV2,
58 #[doc = "0x94 - Register A (channel = 2)"]
59 pub ra2: RA2,
60 #[doc = "0x98 - Register B (channel = 2)"]
61 pub rb2: RB2,
62 #[doc = "0x9c - Register C (channel = 2)"]
63 pub rc2: RC2,
64 #[doc = "0xa0 - Status Register (channel = 2)"]
65 pub sr2: SR2,
66 #[doc = "0xa4 - Interrupt Enable Register (channel = 2)"]
67 pub ier2: IER2,
68 #[doc = "0xa8 - Interrupt Disable Register (channel = 2)"]
69 pub idr2: IDR2,
70 #[doc = "0xac - Interrupt Mask Register (channel = 2)"]
71 pub imr2: IMR2,
72 _reserved33: [u8; 0x10],
73 #[doc = "0xc0 - Block Control Register"]
74 pub bcr: BCR,
75 #[doc = "0xc4 - Block Mode Register"]
76 pub bmr: BMR,
77 #[doc = "0xc8 - QDEC Interrupt Enable Register"]
78 pub qier: QIER,
79 #[doc = "0xcc - QDEC Interrupt Disable Register"]
80 pub qidr: QIDR,
81 #[doc = "0xd0 - QDEC Interrupt Mask Register"]
82 pub qimr: QIMR,
83 #[doc = "0xd4 - QDEC Interrupt Status Register"]
84 pub qisr: QISR,
85 #[doc = "0xd8 - Fault Mode Register"]
86 pub fmr: FMR,
87 _reserved40: [u8; 0x08],
88 #[doc = "0xe4 - Write Protect Mode Register"]
89 pub wpmr: WPMR,
90 _reserved41: [u8; 0x98],
91 #[doc = "0x180 - Receive Pointer Register (pdc = 2)"]
92 pub rpr2: RPR2,
93 #[doc = "0x184 - Receive Counter Register (pdc = 2)"]
94 pub rcr2: RCR2,
95 _reserved43: [u8; 0x08],
96 #[doc = "0x190 - Receive Next Pointer Register (pdc = 2)"]
97 pub rnpr2: RNPR2,
98 #[doc = "0x194 - Receive Next Counter Register (pdc = 2)"]
99 pub rncr2: RNCR2,
100 _reserved45: [u8; 0x08],
101 #[doc = "0x1a0 - Transfer Control Register (pdc = 2)"]
102 pub ptcr2: PTCR2,
103 #[doc = "0x1a4 - Transfer Status Register (pdc = 2)"]
104 pub ptsr2: PTSR2,
105}
106impl RegisterBlock {
107 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
108 #[inline(always)]
109 pub const fn wave_eq_1_cmr0_wave_eq_1(&self) -> &WAVE_EQ_1_CMR0_WAVE_EQ_1 {
110 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
111 }
112 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
113 #[inline(always)]
114 pub const fn cmr0(&self) -> &CMR0 {
115 unsafe { &*(self as *const Self).cast::<u8>().add(4usize).cast() }
116 }
117 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
118 #[inline(always)]
119 pub const fn wave_eq_1_cmr1_wave_eq_1(&self) -> &WAVE_EQ_1_CMR1_WAVE_EQ_1 {
120 unsafe { &*(self as *const Self).cast::<u8>().add(68usize).cast() }
121 }
122 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
123 #[inline(always)]
124 pub const fn cmr1(&self) -> &CMR1 {
125 unsafe { &*(self as *const Self).cast::<u8>().add(68usize).cast() }
126 }
127 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
128 #[inline(always)]
129 pub const fn wave_eq_1_cmr2_wave_eq_1(&self) -> &WAVE_EQ_1_CMR2_WAVE_EQ_1 {
130 unsafe { &*(self as *const Self).cast::<u8>().add(132usize).cast() }
131 }
132 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
133 #[inline(always)]
134 pub const fn cmr2(&self) -> &CMR2 {
135 unsafe { &*(self as *const Self).cast::<u8>().add(132usize).cast() }
136 }
137}
138#[doc = "CCR0 (w) register accessor: an alias for `Reg<CCR0_SPEC>`"]
139pub type CCR0 = crate::Reg<ccr0::CCR0_SPEC>;
140#[doc = "Channel Control Register (channel = 0)"]
141pub mod ccr0;
142#[doc = "CMR0 (rw) register accessor: an alias for `Reg<CMR0_SPEC>`"]
143pub type CMR0 = crate::Reg<cmr0::CMR0_SPEC>;
144#[doc = "Channel Mode Register (channel = 0)"]
145pub mod cmr0;
146#[doc = "WAVE_EQ_1_CMR0_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR0_WAVE_EQ_1_SPEC>`"]
147pub type WAVE_EQ_1_CMR0_WAVE_EQ_1 =
148 crate::Reg<wave_eq_1_cmr0_wave_eq_1::WAVE_EQ_1_CMR0_WAVE_EQ_1_SPEC>;
149#[doc = "Channel Mode Register (channel = 0)"]
150pub mod wave_eq_1_cmr0_wave_eq_1;
151#[doc = "SMMR0 (rw) register accessor: an alias for `Reg<SMMR0_SPEC>`"]
152pub type SMMR0 = crate::Reg<smmr0::SMMR0_SPEC>;
153#[doc = "Stepper Motor Mode Register (channel = 0)"]
154pub mod smmr0;
155#[doc = "CV0 (r) register accessor: an alias for `Reg<CV0_SPEC>`"]
156pub type CV0 = crate::Reg<cv0::CV0_SPEC>;
157#[doc = "Counter Value (channel = 0)"]
158pub mod cv0;
159#[doc = "RA0 (rw) register accessor: an alias for `Reg<RA0_SPEC>`"]
160pub type RA0 = crate::Reg<ra0::RA0_SPEC>;
161#[doc = "Register A (channel = 0)"]
162pub mod ra0;
163#[doc = "RB0 (rw) register accessor: an alias for `Reg<RB0_SPEC>`"]
164pub type RB0 = crate::Reg<rb0::RB0_SPEC>;
165#[doc = "Register B (channel = 0)"]
166pub mod rb0;
167#[doc = "RC0 (rw) register accessor: an alias for `Reg<RC0_SPEC>`"]
168pub type RC0 = crate::Reg<rc0::RC0_SPEC>;
169#[doc = "Register C (channel = 0)"]
170pub mod rc0;
171#[doc = "SR0 (r) register accessor: an alias for `Reg<SR0_SPEC>`"]
172pub type SR0 = crate::Reg<sr0::SR0_SPEC>;
173#[doc = "Status Register (channel = 0)"]
174pub mod sr0;
175#[doc = "IER0 (w) register accessor: an alias for `Reg<IER0_SPEC>`"]
176pub type IER0 = crate::Reg<ier0::IER0_SPEC>;
177#[doc = "Interrupt Enable Register (channel = 0)"]
178pub mod ier0;
179#[doc = "IDR0 (w) register accessor: an alias for `Reg<IDR0_SPEC>`"]
180pub type IDR0 = crate::Reg<idr0::IDR0_SPEC>;
181#[doc = "Interrupt Disable Register (channel = 0)"]
182pub mod idr0;
183#[doc = "IMR0 (r) register accessor: an alias for `Reg<IMR0_SPEC>`"]
184pub type IMR0 = crate::Reg<imr0::IMR0_SPEC>;
185#[doc = "Interrupt Mask Register (channel = 0)"]
186pub mod imr0;
187#[doc = "CCR1 (w) register accessor: an alias for `Reg<CCR1_SPEC>`"]
188pub type CCR1 = crate::Reg<ccr1::CCR1_SPEC>;
189#[doc = "Channel Control Register (channel = 1)"]
190pub mod ccr1;
191#[doc = "CMR1 (rw) register accessor: an alias for `Reg<CMR1_SPEC>`"]
192pub type CMR1 = crate::Reg<cmr1::CMR1_SPEC>;
193#[doc = "Channel Mode Register (channel = 1)"]
194pub mod cmr1;
195#[doc = "WAVE_EQ_1_CMR1_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR1_WAVE_EQ_1_SPEC>`"]
196pub type WAVE_EQ_1_CMR1_WAVE_EQ_1 =
197 crate::Reg<wave_eq_1_cmr1_wave_eq_1::WAVE_EQ_1_CMR1_WAVE_EQ_1_SPEC>;
198#[doc = "Channel Mode Register (channel = 1)"]
199pub mod wave_eq_1_cmr1_wave_eq_1;
200#[doc = "SMMR1 (rw) register accessor: an alias for `Reg<SMMR1_SPEC>`"]
201pub type SMMR1 = crate::Reg<smmr1::SMMR1_SPEC>;
202#[doc = "Stepper Motor Mode Register (channel = 1)"]
203pub mod smmr1;
204#[doc = "CV1 (r) register accessor: an alias for `Reg<CV1_SPEC>`"]
205pub type CV1 = crate::Reg<cv1::CV1_SPEC>;
206#[doc = "Counter Value (channel = 1)"]
207pub mod cv1;
208#[doc = "RA1 (rw) register accessor: an alias for `Reg<RA1_SPEC>`"]
209pub type RA1 = crate::Reg<ra1::RA1_SPEC>;
210#[doc = "Register A (channel = 1)"]
211pub mod ra1;
212#[doc = "RB1 (rw) register accessor: an alias for `Reg<RB1_SPEC>`"]
213pub type RB1 = crate::Reg<rb1::RB1_SPEC>;
214#[doc = "Register B (channel = 1)"]
215pub mod rb1;
216#[doc = "RC1 (rw) register accessor: an alias for `Reg<RC1_SPEC>`"]
217pub type RC1 = crate::Reg<rc1::RC1_SPEC>;
218#[doc = "Register C (channel = 1)"]
219pub mod rc1;
220#[doc = "SR1 (r) register accessor: an alias for `Reg<SR1_SPEC>`"]
221pub type SR1 = crate::Reg<sr1::SR1_SPEC>;
222#[doc = "Status Register (channel = 1)"]
223pub mod sr1;
224#[doc = "IER1 (w) register accessor: an alias for `Reg<IER1_SPEC>`"]
225pub type IER1 = crate::Reg<ier1::IER1_SPEC>;
226#[doc = "Interrupt Enable Register (channel = 1)"]
227pub mod ier1;
228#[doc = "IDR1 (w) register accessor: an alias for `Reg<IDR1_SPEC>`"]
229pub type IDR1 = crate::Reg<idr1::IDR1_SPEC>;
230#[doc = "Interrupt Disable Register (channel = 1)"]
231pub mod idr1;
232#[doc = "IMR1 (r) register accessor: an alias for `Reg<IMR1_SPEC>`"]
233pub type IMR1 = crate::Reg<imr1::IMR1_SPEC>;
234#[doc = "Interrupt Mask Register (channel = 1)"]
235pub mod imr1;
236#[doc = "CCR2 (w) register accessor: an alias for `Reg<CCR2_SPEC>`"]
237pub type CCR2 = crate::Reg<ccr2::CCR2_SPEC>;
238#[doc = "Channel Control Register (channel = 2)"]
239pub mod ccr2;
240#[doc = "CMR2 (rw) register accessor: an alias for `Reg<CMR2_SPEC>`"]
241pub type CMR2 = crate::Reg<cmr2::CMR2_SPEC>;
242#[doc = "Channel Mode Register (channel = 2)"]
243pub mod cmr2;
244#[doc = "WAVE_EQ_1_CMR2_WAVE_EQ_1 (rw) register accessor: an alias for `Reg<WAVE_EQ_1_CMR2_WAVE_EQ_1_SPEC>`"]
245pub type WAVE_EQ_1_CMR2_WAVE_EQ_1 =
246 crate::Reg<wave_eq_1_cmr2_wave_eq_1::WAVE_EQ_1_CMR2_WAVE_EQ_1_SPEC>;
247#[doc = "Channel Mode Register (channel = 2)"]
248pub mod wave_eq_1_cmr2_wave_eq_1;
249#[doc = "SMMR2 (rw) register accessor: an alias for `Reg<SMMR2_SPEC>`"]
250pub type SMMR2 = crate::Reg<smmr2::SMMR2_SPEC>;
251#[doc = "Stepper Motor Mode Register (channel = 2)"]
252pub mod smmr2;
253#[doc = "CV2 (r) register accessor: an alias for `Reg<CV2_SPEC>`"]
254pub type CV2 = crate::Reg<cv2::CV2_SPEC>;
255#[doc = "Counter Value (channel = 2)"]
256pub mod cv2;
257#[doc = "RA2 (rw) register accessor: an alias for `Reg<RA2_SPEC>`"]
258pub type RA2 = crate::Reg<ra2::RA2_SPEC>;
259#[doc = "Register A (channel = 2)"]
260pub mod ra2;
261#[doc = "RB2 (rw) register accessor: an alias for `Reg<RB2_SPEC>`"]
262pub type RB2 = crate::Reg<rb2::RB2_SPEC>;
263#[doc = "Register B (channel = 2)"]
264pub mod rb2;
265#[doc = "RC2 (rw) register accessor: an alias for `Reg<RC2_SPEC>`"]
266pub type RC2 = crate::Reg<rc2::RC2_SPEC>;
267#[doc = "Register C (channel = 2)"]
268pub mod rc2;
269#[doc = "SR2 (r) register accessor: an alias for `Reg<SR2_SPEC>`"]
270pub type SR2 = crate::Reg<sr2::SR2_SPEC>;
271#[doc = "Status Register (channel = 2)"]
272pub mod sr2;
273#[doc = "IER2 (w) register accessor: an alias for `Reg<IER2_SPEC>`"]
274pub type IER2 = crate::Reg<ier2::IER2_SPEC>;
275#[doc = "Interrupt Enable Register (channel = 2)"]
276pub mod ier2;
277#[doc = "IDR2 (w) register accessor: an alias for `Reg<IDR2_SPEC>`"]
278pub type IDR2 = crate::Reg<idr2::IDR2_SPEC>;
279#[doc = "Interrupt Disable Register (channel = 2)"]
280pub mod idr2;
281#[doc = "IMR2 (r) register accessor: an alias for `Reg<IMR2_SPEC>`"]
282pub type IMR2 = crate::Reg<imr2::IMR2_SPEC>;
283#[doc = "Interrupt Mask Register (channel = 2)"]
284pub mod imr2;
285#[doc = "BCR (w) register accessor: an alias for `Reg<BCR_SPEC>`"]
286pub type BCR = crate::Reg<bcr::BCR_SPEC>;
287#[doc = "Block Control Register"]
288pub mod bcr;
289#[doc = "BMR (rw) register accessor: an alias for `Reg<BMR_SPEC>`"]
290pub type BMR = crate::Reg<bmr::BMR_SPEC>;
291#[doc = "Block Mode Register"]
292pub mod bmr;
293#[doc = "QIER (w) register accessor: an alias for `Reg<QIER_SPEC>`"]
294pub type QIER = crate::Reg<qier::QIER_SPEC>;
295#[doc = "QDEC Interrupt Enable Register"]
296pub mod qier;
297#[doc = "QIDR (w) register accessor: an alias for `Reg<QIDR_SPEC>`"]
298pub type QIDR = crate::Reg<qidr::QIDR_SPEC>;
299#[doc = "QDEC Interrupt Disable Register"]
300pub mod qidr;
301#[doc = "QIMR (r) register accessor: an alias for `Reg<QIMR_SPEC>`"]
302pub type QIMR = crate::Reg<qimr::QIMR_SPEC>;
303#[doc = "QDEC Interrupt Mask Register"]
304pub mod qimr;
305#[doc = "QISR (r) register accessor: an alias for `Reg<QISR_SPEC>`"]
306pub type QISR = crate::Reg<qisr::QISR_SPEC>;
307#[doc = "QDEC Interrupt Status Register"]
308pub mod qisr;
309#[doc = "FMR (rw) register accessor: an alias for `Reg<FMR_SPEC>`"]
310pub type FMR = crate::Reg<fmr::FMR_SPEC>;
311#[doc = "Fault Mode Register"]
312pub mod fmr;
313#[doc = "WPMR (rw) register accessor: an alias for `Reg<WPMR_SPEC>`"]
314pub type WPMR = crate::Reg<wpmr::WPMR_SPEC>;
315#[doc = "Write Protect Mode Register"]
316pub mod wpmr;
317#[doc = "RPR2 (rw) register accessor: an alias for `Reg<RPR2_SPEC>`"]
318pub type RPR2 = crate::Reg<rpr2::RPR2_SPEC>;
319#[doc = "Receive Pointer Register (pdc = 2)"]
320pub mod rpr2;
321#[doc = "RCR2 (rw) register accessor: an alias for `Reg<RCR2_SPEC>`"]
322pub type RCR2 = crate::Reg<rcr2::RCR2_SPEC>;
323#[doc = "Receive Counter Register (pdc = 2)"]
324pub mod rcr2;
325#[doc = "RNPR2 (rw) register accessor: an alias for `Reg<RNPR2_SPEC>`"]
326pub type RNPR2 = crate::Reg<rnpr2::RNPR2_SPEC>;
327#[doc = "Receive Next Pointer Register (pdc = 2)"]
328pub mod rnpr2;
329#[doc = "RNCR2 (rw) register accessor: an alias for `Reg<RNCR2_SPEC>`"]
330pub type RNCR2 = crate::Reg<rncr2::RNCR2_SPEC>;
331#[doc = "Receive Next Counter Register (pdc = 2)"]
332pub mod rncr2;
333#[doc = "PTCR2 (w) register accessor: an alias for `Reg<PTCR2_SPEC>`"]
334pub type PTCR2 = crate::Reg<ptcr2::PTCR2_SPEC>;
335#[doc = "Transfer Control Register (pdc = 2)"]
336pub mod ptcr2;
337#[doc = "PTSR2 (r) register accessor: an alias for `Reg<PTSR2_SPEC>`"]
338pub type PTSR2 = crate::Reg<ptsr2::PTSR2_SPEC>;
339#[doc = "Transfer Status Register (pdc = 2)"]
340pub mod ptsr2;