atsam4n16b_pac/dacc/
isr.rs

1#[doc = "Register `ISR` reader"]
2pub struct R(crate::R<ISR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ISR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ISR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ISR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `TXRDY` reader - Transmission Ready Interrupt Flag"]
17pub type TXRDY_R = crate::BitReader<bool>;
18#[doc = "Field `ENDTX` reader - End of PDC Interrupt Flag"]
19pub type ENDTX_R = crate::BitReader<bool>;
20#[doc = "Field `TXBUFE` reader - Buffer Empty Interrupt Flag"]
21pub type TXBUFE_R = crate::BitReader<bool>;
22impl R {
23    #[doc = "Bit 0 - Transmission Ready Interrupt Flag"]
24    #[inline(always)]
25    pub fn txrdy(&self) -> TXRDY_R {
26        TXRDY_R::new((self.bits & 1) != 0)
27    }
28    #[doc = "Bit 1 - End of PDC Interrupt Flag"]
29    #[inline(always)]
30    pub fn endtx(&self) -> ENDTX_R {
31        ENDTX_R::new(((self.bits >> 1) & 1) != 0)
32    }
33    #[doc = "Bit 2 - Buffer Empty Interrupt Flag"]
34    #[inline(always)]
35    pub fn txbufe(&self) -> TXBUFE_R {
36        TXBUFE_R::new(((self.bits >> 2) & 1) != 0)
37    }
38}
39#[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](index.html) module"]
40pub struct ISR_SPEC;
41impl crate::RegisterSpec for ISR_SPEC {
42    type Ux = u32;
43}
44#[doc = "`read()` method returns [isr::R](R) reader structure"]
45impl crate::Readable for ISR_SPEC {
46    type Reader = R;
47}
48#[doc = "`reset()` method sets ISR to value 0"]
49impl crate::Resettable for ISR_SPEC {
50    const RESET_VALUE: Self::Ux = 0;
51}
atsam4n16b_pac/dacc/isr.rs

atsam4n16b_pac/dacc/
isr.rs
