atsam4ls8b_pac/usbc/
uhinte.rs1#[doc = "Register `UHINTE` reader"]
2pub struct R(crate::R<UHINTE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<UHINTE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<UHINTE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<UHINTE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `DCONNIE` reader - DCONNI Enable"]
17pub type DCONNIE_R = crate::BitReader<bool>;
18#[doc = "Field `DDISCIE` reader - DDISCI Enable"]
19pub type DDISCIE_R = crate::BitReader<bool>;
20#[doc = "Field `RSTIE` reader - RSTI Enable"]
21pub type RSTIE_R = crate::BitReader<bool>;
22#[doc = "Field `RSMEDIE` reader - RSMEDI Enable"]
23pub type RSMEDIE_R = crate::BitReader<bool>;
24#[doc = "Field `RXRSMIE` reader - RXRSMI Enable"]
25pub type RXRSMIE_R = crate::BitReader<bool>;
26#[doc = "Field `HSOFIE` reader - HSOFI Enable"]
27pub type HSOFIE_R = crate::BitReader<bool>;
28#[doc = "Field `HWUPIE` reader - HWUPI Enable"]
29pub type HWUPIE_R = crate::BitReader<bool>;
30#[doc = "Field `P0INTE` reader - P0INT Enable"]
31pub type P0INTE_R = crate::BitReader<bool>;
32#[doc = "Field `P1INTE` reader - P1INT Enable"]
33pub type P1INTE_R = crate::BitReader<bool>;
34#[doc = "Field `P2INTE` reader - P2INT Enable"]
35pub type P2INTE_R = crate::BitReader<bool>;
36#[doc = "Field `P3INTE` reader - P3INT Enable"]
37pub type P3INTE_R = crate::BitReader<bool>;
38#[doc = "Field `P4INTE` reader - P4INT Enable"]
39pub type P4INTE_R = crate::BitReader<bool>;
40#[doc = "Field `P5INTE` reader - P5INT Enable"]
41pub type P5INTE_R = crate::BitReader<bool>;
42#[doc = "Field `P6INTE` reader - P6INT Enable"]
43pub type P6INTE_R = crate::BitReader<bool>;
44#[doc = "Field `P7INTE` reader - P7INT Enable"]
45pub type P7INTE_R = crate::BitReader<bool>;
46impl R {
47 #[doc = "Bit 0 - DCONNI Enable"]
48 #[inline(always)]
49 pub fn dconnie(&self) -> DCONNIE_R {
50 DCONNIE_R::new((self.bits & 1) != 0)
51 }
52 #[doc = "Bit 1 - DDISCI Enable"]
53 #[inline(always)]
54 pub fn ddiscie(&self) -> DDISCIE_R {
55 DDISCIE_R::new(((self.bits >> 1) & 1) != 0)
56 }
57 #[doc = "Bit 2 - RSTI Enable"]
58 #[inline(always)]
59 pub fn rstie(&self) -> RSTIE_R {
60 RSTIE_R::new(((self.bits >> 2) & 1) != 0)
61 }
62 #[doc = "Bit 3 - RSMEDI Enable"]
63 #[inline(always)]
64 pub fn rsmedie(&self) -> RSMEDIE_R {
65 RSMEDIE_R::new(((self.bits >> 3) & 1) != 0)
66 }
67 #[doc = "Bit 4 - RXRSMI Enable"]
68 #[inline(always)]
69 pub fn rxrsmie(&self) -> RXRSMIE_R {
70 RXRSMIE_R::new(((self.bits >> 4) & 1) != 0)
71 }
72 #[doc = "Bit 5 - HSOFI Enable"]
73 #[inline(always)]
74 pub fn hsofie(&self) -> HSOFIE_R {
75 HSOFIE_R::new(((self.bits >> 5) & 1) != 0)
76 }
77 #[doc = "Bit 6 - HWUPI Enable"]
78 #[inline(always)]
79 pub fn hwupie(&self) -> HWUPIE_R {
80 HWUPIE_R::new(((self.bits >> 6) & 1) != 0)
81 }
82 #[doc = "Bit 8 - P0INT Enable"]
83 #[inline(always)]
84 pub fn p0inte(&self) -> P0INTE_R {
85 P0INTE_R::new(((self.bits >> 8) & 1) != 0)
86 }
87 #[doc = "Bit 9 - P1INT Enable"]
88 #[inline(always)]
89 pub fn p1inte(&self) -> P1INTE_R {
90 P1INTE_R::new(((self.bits >> 9) & 1) != 0)
91 }
92 #[doc = "Bit 10 - P2INT Enable"]
93 #[inline(always)]
94 pub fn p2inte(&self) -> P2INTE_R {
95 P2INTE_R::new(((self.bits >> 10) & 1) != 0)
96 }
97 #[doc = "Bit 11 - P3INT Enable"]
98 #[inline(always)]
99 pub fn p3inte(&self) -> P3INTE_R {
100 P3INTE_R::new(((self.bits >> 11) & 1) != 0)
101 }
102 #[doc = "Bit 12 - P4INT Enable"]
103 #[inline(always)]
104 pub fn p4inte(&self) -> P4INTE_R {
105 P4INTE_R::new(((self.bits >> 12) & 1) != 0)
106 }
107 #[doc = "Bit 13 - P5INT Enable"]
108 #[inline(always)]
109 pub fn p5inte(&self) -> P5INTE_R {
110 P5INTE_R::new(((self.bits >> 13) & 1) != 0)
111 }
112 #[doc = "Bit 14 - P6INT Enable"]
113 #[inline(always)]
114 pub fn p6inte(&self) -> P6INTE_R {
115 P6INTE_R::new(((self.bits >> 14) & 1) != 0)
116 }
117 #[doc = "Bit 15 - P7INT Enable"]
118 #[inline(always)]
119 pub fn p7inte(&self) -> P7INTE_R {
120 P7INTE_R::new(((self.bits >> 15) & 1) != 0)
121 }
122}
123#[doc = "Host Global Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uhinte](index.html) module"]
124pub struct UHINTE_SPEC;
125impl crate::RegisterSpec for UHINTE_SPEC {
126 type Ux = u32;
127}
128#[doc = "`read()` method returns [uhinte::R](R) reader structure"]
129impl crate::Readable for UHINTE_SPEC {
130 type Reader = R;
131}
132#[doc = "`reset()` method sets UHINTE to value 0"]
133impl crate::Resettable for UHINTE_SPEC {
134 const RESET_VALUE: Self::Ux = 0;
135}