Type Definition atsam4ls8a_pac::twim0::idr::W

type W = W<u32, IDR>;

Writer for register IDR

Implementations

impl W

pub fn rxrdy(&mut self) -> RXRDY_W<'_>

Bit 0 - RHR Data Ready

pub fn txrdy(&mut self) -> TXRDY_W<'_>

Bit 1 - THR Data Ready

pub fn crdy(&mut self) -> CRDY_W<'_>

Bit 2 - Ready for More Commands

pub fn ccomp(&mut self) -> CCOMP_W<'_>

Bit 3 - Command Complete

pub fn idle(&mut self) -> IDLE_W<'_>

Bit 4 - Master Interface is Idle

pub fn busfree(&mut self) -> BUSFREE_W<'_>

Bit 5 - Two-wire Bus is Free

pub fn anak(&mut self) -> ANAK_W<'_>

Bit 8 - NAK in Address Phase Received

pub fn dnak(&mut self) -> DNAK_W<'_>

Bit 9 - NAK in Data Phase Received

pub fn arblst(&mut self) -> ARBLST_W<'_>

Bit 10 - Arbitration Lost

pub fn smbalert(&mut self) -> SMBALERT_W<'_>

Bit 11 - SMBus Alert

pub fn tout(&mut self) -> TOUT_W<'_>

Bit 12 - Timeout

pub fn pecerr(&mut self) -> PECERR_W<'_>

Bit 13 - PEC Error

pub fn stop(&mut self) -> STOP_W<'_>

Bit 14 - Stop Request Accepted

pub fn hsmcack(&mut self) -> HSMCACK_W<'_>

Bit 17 - ACK in HS-mode Master Code Phase Received