atsam4ls4c_pac/pm/
isr.rs

1#[doc = "Register `ISR` reader"]
2pub struct R(crate::R<ISR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ISR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ISR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ISR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `CFD` reader - Clock Failure Detected Interrupt Status"]
17pub type CFD_R = crate::BitReader<bool>;
18#[doc = "Field `CKRDY` reader - Clock Ready Interrupt Status"]
19pub type CKRDY_R = crate::BitReader<bool>;
20#[doc = "Field `WAKE` reader - Wake up Interrupt Status"]
21pub type WAKE_R = crate::BitReader<WAKESELECT_A>;
22#[doc = "Wake up Interrupt Status\n\nValue on reset: 0"]
23#[derive(Clone, Copy, Debug, PartialEq, Eq)]
24pub enum WAKESELECT_A {
25    #[doc = "0: No effect"]
26    _0 = 0,
27    #[doc = "1: Disable Interrupt."]
28    _1 = 1,
29}
30impl From<WAKESELECT_A> for bool {
31    #[inline(always)]
32    fn from(variant: WAKESELECT_A) -> Self {
33        variant as u8 != 0
34    }
35}
36impl WAKE_R {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub fn variant(&self) -> WAKESELECT_A {
40        match self.bits {
41            false => WAKESELECT_A::_0,
42            true => WAKESELECT_A::_1,
43        }
44    }
45    #[doc = "Checks if the value of the field is `_0`"]
46    #[inline(always)]
47    pub fn is_0(&self) -> bool {
48        *self == WAKESELECT_A::_0
49    }
50    #[doc = "Checks if the value of the field is `_1`"]
51    #[inline(always)]
52    pub fn is_1(&self) -> bool {
53        *self == WAKESELECT_A::_1
54    }
55}
56#[doc = "Field `AE` reader - Access Error Interrupt Status"]
57pub type AE_R = crate::BitReader<bool>;
58impl R {
59    #[doc = "Bit 0 - Clock Failure Detected Interrupt Status"]
60    #[inline(always)]
61    pub fn cfd(&self) -> CFD_R {
62        CFD_R::new((self.bits & 1) != 0)
63    }
64    #[doc = "Bit 5 - Clock Ready Interrupt Status"]
65    #[inline(always)]
66    pub fn ckrdy(&self) -> CKRDY_R {
67        CKRDY_R::new(((self.bits >> 5) & 1) != 0)
68    }
69    #[doc = "Bit 8 - Wake up Interrupt Status"]
70    #[inline(always)]
71    pub fn wake(&self) -> WAKE_R {
72        WAKE_R::new(((self.bits >> 8) & 1) != 0)
73    }
74    #[doc = "Bit 31 - Access Error Interrupt Status"]
75    #[inline(always)]
76    pub fn ae(&self) -> AE_R {
77        AE_R::new(((self.bits >> 31) & 1) != 0)
78    }
79}
80#[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](index.html) module"]
81pub struct ISR_SPEC;
82impl crate::RegisterSpec for ISR_SPEC {
83    type Ux = u32;
84}
85#[doc = "`read()` method returns [isr::R](R) reader structure"]
86impl crate::Readable for ISR_SPEC {
87    type Reader = R;
88}
89#[doc = "`reset()` method sets ISR to value 0"]
90impl crate::Resettable for ISR_SPEC {
91    const RESET_VALUE: Self::Ux = 0;
92}
atsam4ls4c_pac/pm/isr.rs

atsam4ls4c_pac/pm/
isr.rs
