atsam4ls2c_pac/usbc/
udcon.rs1#[doc = "Register `UDCON` reader"]
2pub struct R(crate::R<UDCON_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<UDCON_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<UDCON_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<UDCON_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `UDCON` writer"]
17pub struct W(crate::W<UDCON_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<UDCON_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<UDCON_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<UDCON_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `UADD` reader - USB Address"]
38pub type UADD_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `UADD` writer - USB Address"]
40pub type UADD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, UDCON_SPEC, u8, u8, 7, O>;
41#[doc = "Field `ADDEN` reader - Address Enable"]
42pub type ADDEN_R = crate::BitReader<bool>;
43#[doc = "Field `ADDEN` writer - Address Enable"]
44pub type ADDEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
45#[doc = "Field `DETACH` reader - Detach"]
46pub type DETACH_R = crate::BitReader<bool>;
47#[doc = "Field `DETACH` writer - Detach"]
48pub type DETACH_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
49#[doc = "Field `RMWKUP` reader - Remote Wake-Up"]
50pub type RMWKUP_R = crate::BitReader<bool>;
51#[doc = "Field `RMWKUP` writer - Remote Wake-Up"]
52pub type RMWKUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
53#[doc = "Field `SPDCONF` reader - Speed configuration"]
54pub type SPDCONF_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `SPDCONF` writer - Speed configuration"]
56pub type SPDCONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, UDCON_SPEC, u8, u8, 2, O>;
57#[doc = "Field `LS` reader - Low Speed Mode Force"]
58pub type LS_R = crate::BitReader<bool>;
59#[doc = "Field `LS` writer - Low Speed Mode Force"]
60pub type LS_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
61#[doc = "Field `TSTJ` reader - Test mode J"]
62pub type TSTJ_R = crate::BitReader<bool>;
63#[doc = "Field `TSTJ` writer - Test mode J"]
64pub type TSTJ_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
65#[doc = "Field `TSTK` reader - Test mode K"]
66pub type TSTK_R = crate::BitReader<bool>;
67#[doc = "Field `TSTK` writer - Test mode K"]
68pub type TSTK_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
69#[doc = "Field `TSTPCKT` reader - Test Packet mode"]
70pub type TSTPCKT_R = crate::BitReader<bool>;
71#[doc = "Field `TSTPCKT` writer - Test Packet mode"]
72pub type TSTPCKT_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
73#[doc = "Field `OPMODE2` reader - Specific Operational mode"]
74pub type OPMODE2_R = crate::BitReader<bool>;
75#[doc = "Field `OPMODE2` writer - Specific Operational mode"]
76pub type OPMODE2_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
77#[doc = "Field `GNAK` reader - Global NAK"]
78pub type GNAK_R = crate::BitReader<bool>;
79#[doc = "Field `GNAK` writer - Global NAK"]
80pub type GNAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, UDCON_SPEC, bool, O>;
81impl R {
82 #[doc = "Bits 0:6 - USB Address"]
83 #[inline(always)]
84 pub fn uadd(&self) -> UADD_R {
85 UADD_R::new((self.bits & 0x7f) as u8)
86 }
87 #[doc = "Bit 7 - Address Enable"]
88 #[inline(always)]
89 pub fn adden(&self) -> ADDEN_R {
90 ADDEN_R::new(((self.bits >> 7) & 1) != 0)
91 }
92 #[doc = "Bit 8 - Detach"]
93 #[inline(always)]
94 pub fn detach(&self) -> DETACH_R {
95 DETACH_R::new(((self.bits >> 8) & 1) != 0)
96 }
97 #[doc = "Bit 9 - Remote Wake-Up"]
98 #[inline(always)]
99 pub fn rmwkup(&self) -> RMWKUP_R {
100 RMWKUP_R::new(((self.bits >> 9) & 1) != 0)
101 }
102 #[doc = "Bits 10:11 - Speed configuration"]
103 #[inline(always)]
104 pub fn spdconf(&self) -> SPDCONF_R {
105 SPDCONF_R::new(((self.bits >> 10) & 3) as u8)
106 }
107 #[doc = "Bit 12 - Low Speed Mode Force"]
108 #[inline(always)]
109 pub fn ls(&self) -> LS_R {
110 LS_R::new(((self.bits >> 12) & 1) != 0)
111 }
112 #[doc = "Bit 13 - Test mode J"]
113 #[inline(always)]
114 pub fn tstj(&self) -> TSTJ_R {
115 TSTJ_R::new(((self.bits >> 13) & 1) != 0)
116 }
117 #[doc = "Bit 14 - Test mode K"]
118 #[inline(always)]
119 pub fn tstk(&self) -> TSTK_R {
120 TSTK_R::new(((self.bits >> 14) & 1) != 0)
121 }
122 #[doc = "Bit 15 - Test Packet mode"]
123 #[inline(always)]
124 pub fn tstpckt(&self) -> TSTPCKT_R {
125 TSTPCKT_R::new(((self.bits >> 15) & 1) != 0)
126 }
127 #[doc = "Bit 16 - Specific Operational mode"]
128 #[inline(always)]
129 pub fn opmode2(&self) -> OPMODE2_R {
130 OPMODE2_R::new(((self.bits >> 16) & 1) != 0)
131 }
132 #[doc = "Bit 17 - Global NAK"]
133 #[inline(always)]
134 pub fn gnak(&self) -> GNAK_R {
135 GNAK_R::new(((self.bits >> 17) & 1) != 0)
136 }
137}
138impl W {
139 #[doc = "Bits 0:6 - USB Address"]
140 #[inline(always)]
141 #[must_use]
142 pub fn uadd(&mut self) -> UADD_W<0> {
143 UADD_W::new(self)
144 }
145 #[doc = "Bit 7 - Address Enable"]
146 #[inline(always)]
147 #[must_use]
148 pub fn adden(&mut self) -> ADDEN_W<7> {
149 ADDEN_W::new(self)
150 }
151 #[doc = "Bit 8 - Detach"]
152 #[inline(always)]
153 #[must_use]
154 pub fn detach(&mut self) -> DETACH_W<8> {
155 DETACH_W::new(self)
156 }
157 #[doc = "Bit 9 - Remote Wake-Up"]
158 #[inline(always)]
159 #[must_use]
160 pub fn rmwkup(&mut self) -> RMWKUP_W<9> {
161 RMWKUP_W::new(self)
162 }
163 #[doc = "Bits 10:11 - Speed configuration"]
164 #[inline(always)]
165 #[must_use]
166 pub fn spdconf(&mut self) -> SPDCONF_W<10> {
167 SPDCONF_W::new(self)
168 }
169 #[doc = "Bit 12 - Low Speed Mode Force"]
170 #[inline(always)]
171 #[must_use]
172 pub fn ls(&mut self) -> LS_W<12> {
173 LS_W::new(self)
174 }
175 #[doc = "Bit 13 - Test mode J"]
176 #[inline(always)]
177 #[must_use]
178 pub fn tstj(&mut self) -> TSTJ_W<13> {
179 TSTJ_W::new(self)
180 }
181 #[doc = "Bit 14 - Test mode K"]
182 #[inline(always)]
183 #[must_use]
184 pub fn tstk(&mut self) -> TSTK_W<14> {
185 TSTK_W::new(self)
186 }
187 #[doc = "Bit 15 - Test Packet mode"]
188 #[inline(always)]
189 #[must_use]
190 pub fn tstpckt(&mut self) -> TSTPCKT_W<15> {
191 TSTPCKT_W::new(self)
192 }
193 #[doc = "Bit 16 - Specific Operational mode"]
194 #[inline(always)]
195 #[must_use]
196 pub fn opmode2(&mut self) -> OPMODE2_W<16> {
197 OPMODE2_W::new(self)
198 }
199 #[doc = "Bit 17 - Global NAK"]
200 #[inline(always)]
201 #[must_use]
202 pub fn gnak(&mut self) -> GNAK_W<17> {
203 GNAK_W::new(self)
204 }
205 #[doc = "Writes raw bits to the register."]
206 #[inline(always)]
207 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
208 self.0.bits(bits);
209 self
210 }
211}
212#[doc = "Device General Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [udcon](index.html) module"]
213pub struct UDCON_SPEC;
214impl crate::RegisterSpec for UDCON_SPEC {
215 type Ux = u32;
216}
217#[doc = "`read()` method returns [udcon::R](R) reader structure"]
218impl crate::Readable for UDCON_SPEC {
219 type Reader = R;
220}
221#[doc = "`write(|w| ..)` method takes [udcon::W](W) writer structure"]
222impl crate::Writable for UDCON_SPEC {
223 type Writer = W;
224 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
225 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
226}
227#[doc = "`reset()` method sets UDCON to value 0x0100"]
228impl crate::Resettable for UDCON_SPEC {
229 const RESET_VALUE: Self::Ux = 0x0100;
230}