1#[doc = "Register `MODE` reader"]
2pub struct R(crate::R<MODE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MODE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MODE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MODE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MODE` writer"]
17pub struct W(crate::W<MODE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MODE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MODE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MODE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `NMI` reader - External Non Maskable CPU interrupt"]
38pub type NMI_R = crate::BitReader<bool>;
39#[doc = "Field `NMI` writer - External Non Maskable CPU interrupt"]
40pub type NMI_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
41#[doc = "Field `INT1` reader - External Interrupt 1"]
42pub type INT1_R = crate::BitReader<INT1SELECT_A>;
43#[doc = "External Interrupt 1\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum INT1SELECT_A {
46 #[doc = "0: Edge triggered interrupt"]
47 _0 = 0,
48 #[doc = "1: Level triggered interrupt"]
49 _1 = 1,
50}
51impl From<INT1SELECT_A> for bool {
52 #[inline(always)]
53 fn from(variant: INT1SELECT_A) -> Self {
54 variant as u8 != 0
55 }
56}
57impl INT1_R {
58 #[doc = "Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> INT1SELECT_A {
61 match self.bits {
62 false => INT1SELECT_A::_0,
63 true => INT1SELECT_A::_1,
64 }
65 }
66 #[doc = "Checks if the value of the field is `_0`"]
67 #[inline(always)]
68 pub fn is_0(&self) -> bool {
69 *self == INT1SELECT_A::_0
70 }
71 #[doc = "Checks if the value of the field is `_1`"]
72 #[inline(always)]
73 pub fn is_1(&self) -> bool {
74 *self == INT1SELECT_A::_1
75 }
76}
77#[doc = "Field `INT1` writer - External Interrupt 1"]
78pub type INT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, INT1SELECT_A, O>;
79impl<'a, const O: u8> INT1_W<'a, O> {
80 #[doc = "Edge triggered interrupt"]
81 #[inline(always)]
82 pub fn _0(self) -> &'a mut W {
83 self.variant(INT1SELECT_A::_0)
84 }
85 #[doc = "Level triggered interrupt"]
86 #[inline(always)]
87 pub fn _1(self) -> &'a mut W {
88 self.variant(INT1SELECT_A::_1)
89 }
90}
91#[doc = "Field `INT2` reader - External Interrupt 2"]
92pub type INT2_R = crate::BitReader<INT2SELECT_A>;
93#[doc = "External Interrupt 2\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum INT2SELECT_A {
96 #[doc = "0: Edge triggered interrupt"]
97 _0 = 0,
98 #[doc = "1: Level triggered interrupt"]
99 _1 = 1,
100}
101impl From<INT2SELECT_A> for bool {
102 #[inline(always)]
103 fn from(variant: INT2SELECT_A) -> Self {
104 variant as u8 != 0
105 }
106}
107impl INT2_R {
108 #[doc = "Get enumerated values variant"]
109 #[inline(always)]
110 pub fn variant(&self) -> INT2SELECT_A {
111 match self.bits {
112 false => INT2SELECT_A::_0,
113 true => INT2SELECT_A::_1,
114 }
115 }
116 #[doc = "Checks if the value of the field is `_0`"]
117 #[inline(always)]
118 pub fn is_0(&self) -> bool {
119 *self == INT2SELECT_A::_0
120 }
121 #[doc = "Checks if the value of the field is `_1`"]
122 #[inline(always)]
123 pub fn is_1(&self) -> bool {
124 *self == INT2SELECT_A::_1
125 }
126}
127#[doc = "Field `INT2` writer - External Interrupt 2"]
128pub type INT2_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, INT2SELECT_A, O>;
129impl<'a, const O: u8> INT2_W<'a, O> {
130 #[doc = "Edge triggered interrupt"]
131 #[inline(always)]
132 pub fn _0(self) -> &'a mut W {
133 self.variant(INT2SELECT_A::_0)
134 }
135 #[doc = "Level triggered interrupt"]
136 #[inline(always)]
137 pub fn _1(self) -> &'a mut W {
138 self.variant(INT2SELECT_A::_1)
139 }
140}
141#[doc = "Field `INT3` reader - External Interrupt 3"]
142pub type INT3_R = crate::BitReader<INT3SELECT_A>;
143#[doc = "External Interrupt 3\n\nValue on reset: 0"]
144#[derive(Clone, Copy, Debug, PartialEq, Eq)]
145pub enum INT3SELECT_A {
146 #[doc = "0: Edge triggered interrupt"]
147 _0 = 0,
148 #[doc = "1: Level triggered interrupt"]
149 _1 = 1,
150}
151impl From<INT3SELECT_A> for bool {
152 #[inline(always)]
153 fn from(variant: INT3SELECT_A) -> Self {
154 variant as u8 != 0
155 }
156}
157impl INT3_R {
158 #[doc = "Get enumerated values variant"]
159 #[inline(always)]
160 pub fn variant(&self) -> INT3SELECT_A {
161 match self.bits {
162 false => INT3SELECT_A::_0,
163 true => INT3SELECT_A::_1,
164 }
165 }
166 #[doc = "Checks if the value of the field is `_0`"]
167 #[inline(always)]
168 pub fn is_0(&self) -> bool {
169 *self == INT3SELECT_A::_0
170 }
171 #[doc = "Checks if the value of the field is `_1`"]
172 #[inline(always)]
173 pub fn is_1(&self) -> bool {
174 *self == INT3SELECT_A::_1
175 }
176}
177#[doc = "Field `INT3` writer - External Interrupt 3"]
178pub type INT3_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, INT3SELECT_A, O>;
179impl<'a, const O: u8> INT3_W<'a, O> {
180 #[doc = "Edge triggered interrupt"]
181 #[inline(always)]
182 pub fn _0(self) -> &'a mut W {
183 self.variant(INT3SELECT_A::_0)
184 }
185 #[doc = "Level triggered interrupt"]
186 #[inline(always)]
187 pub fn _1(self) -> &'a mut W {
188 self.variant(INT3SELECT_A::_1)
189 }
190}
191#[doc = "Field `INT4` reader - External Interrupt 4"]
192pub type INT4_R = crate::BitReader<INT4SELECT_A>;
193#[doc = "External Interrupt 4\n\nValue on reset: 0"]
194#[derive(Clone, Copy, Debug, PartialEq, Eq)]
195pub enum INT4SELECT_A {
196 #[doc = "0: Edge triggered interrupt"]
197 _0 = 0,
198 #[doc = "1: Level triggered interrupt"]
199 _1 = 1,
200}
201impl From<INT4SELECT_A> for bool {
202 #[inline(always)]
203 fn from(variant: INT4SELECT_A) -> Self {
204 variant as u8 != 0
205 }
206}
207impl INT4_R {
208 #[doc = "Get enumerated values variant"]
209 #[inline(always)]
210 pub fn variant(&self) -> INT4SELECT_A {
211 match self.bits {
212 false => INT4SELECT_A::_0,
213 true => INT4SELECT_A::_1,
214 }
215 }
216 #[doc = "Checks if the value of the field is `_0`"]
217 #[inline(always)]
218 pub fn is_0(&self) -> bool {
219 *self == INT4SELECT_A::_0
220 }
221 #[doc = "Checks if the value of the field is `_1`"]
222 #[inline(always)]
223 pub fn is_1(&self) -> bool {
224 *self == INT4SELECT_A::_1
225 }
226}
227#[doc = "Field `INT4` writer - External Interrupt 4"]
228pub type INT4_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, INT4SELECT_A, O>;
229impl<'a, const O: u8> INT4_W<'a, O> {
230 #[doc = "Edge triggered interrupt"]
231 #[inline(always)]
232 pub fn _0(self) -> &'a mut W {
233 self.variant(INT4SELECT_A::_0)
234 }
235 #[doc = "Level triggered interrupt"]
236 #[inline(always)]
237 pub fn _1(self) -> &'a mut W {
238 self.variant(INT4SELECT_A::_1)
239 }
240}
241#[doc = "Field `INT5` reader - External Interrupt 5"]
242pub type INT5_R = crate::BitReader<bool>;
243#[doc = "Field `INT5` writer - External Interrupt 5"]
244pub type INT5_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
245#[doc = "Field `INT6` reader - External Interrupt 6"]
246pub type INT6_R = crate::BitReader<bool>;
247#[doc = "Field `INT6` writer - External Interrupt 6"]
248pub type INT6_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
249#[doc = "Field `INT7` reader - External Interrupt 7"]
250pub type INT7_R = crate::BitReader<bool>;
251#[doc = "Field `INT7` writer - External Interrupt 7"]
252pub type INT7_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
253#[doc = "Field `INT8` reader - External Interrupt 8"]
254pub type INT8_R = crate::BitReader<bool>;
255#[doc = "Field `INT8` writer - External Interrupt 8"]
256pub type INT8_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
257#[doc = "Field `INT9` reader - External Interrupt 9"]
258pub type INT9_R = crate::BitReader<bool>;
259#[doc = "Field `INT9` writer - External Interrupt 9"]
260pub type INT9_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
261#[doc = "Field `INT10` reader - External Interrupt 10"]
262pub type INT10_R = crate::BitReader<bool>;
263#[doc = "Field `INT10` writer - External Interrupt 10"]
264pub type INT10_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
265#[doc = "Field `INT11` reader - External Interrupt 11"]
266pub type INT11_R = crate::BitReader<bool>;
267#[doc = "Field `INT11` writer - External Interrupt 11"]
268pub type INT11_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
269#[doc = "Field `INT12` reader - External Interrupt 12"]
270pub type INT12_R = crate::BitReader<bool>;
271#[doc = "Field `INT12` writer - External Interrupt 12"]
272pub type INT12_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
273#[doc = "Field `INT13` reader - External Interrupt 13"]
274pub type INT13_R = crate::BitReader<bool>;
275#[doc = "Field `INT13` writer - External Interrupt 13"]
276pub type INT13_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
277#[doc = "Field `INT14` reader - External Interrupt 14"]
278pub type INT14_R = crate::BitReader<bool>;
279#[doc = "Field `INT14` writer - External Interrupt 14"]
280pub type INT14_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
281#[doc = "Field `INT15` reader - External Interrupt 15"]
282pub type INT15_R = crate::BitReader<bool>;
283#[doc = "Field `INT15` writer - External Interrupt 15"]
284pub type INT15_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, bool, O>;
285impl R {
286 #[doc = "Bit 0 - External Non Maskable CPU interrupt"]
287 #[inline(always)]
288 pub fn nmi(&self) -> NMI_R {
289 NMI_R::new((self.bits & 1) != 0)
290 }
291 #[doc = "Bit 1 - External Interrupt 1"]
292 #[inline(always)]
293 pub fn int1(&self) -> INT1_R {
294 INT1_R::new(((self.bits >> 1) & 1) != 0)
295 }
296 #[doc = "Bit 2 - External Interrupt 2"]
297 #[inline(always)]
298 pub fn int2(&self) -> INT2_R {
299 INT2_R::new(((self.bits >> 2) & 1) != 0)
300 }
301 #[doc = "Bit 3 - External Interrupt 3"]
302 #[inline(always)]
303 pub fn int3(&self) -> INT3_R {
304 INT3_R::new(((self.bits >> 3) & 1) != 0)
305 }
306 #[doc = "Bit 4 - External Interrupt 4"]
307 #[inline(always)]
308 pub fn int4(&self) -> INT4_R {
309 INT4_R::new(((self.bits >> 4) & 1) != 0)
310 }
311 #[doc = "Bit 5 - External Interrupt 5"]
312 #[inline(always)]
313 pub fn int5(&self) -> INT5_R {
314 INT5_R::new(((self.bits >> 5) & 1) != 0)
315 }
316 #[doc = "Bit 6 - External Interrupt 6"]
317 #[inline(always)]
318 pub fn int6(&self) -> INT6_R {
319 INT6_R::new(((self.bits >> 6) & 1) != 0)
320 }
321 #[doc = "Bit 7 - External Interrupt 7"]
322 #[inline(always)]
323 pub fn int7(&self) -> INT7_R {
324 INT7_R::new(((self.bits >> 7) & 1) != 0)
325 }
326 #[doc = "Bit 8 - External Interrupt 8"]
327 #[inline(always)]
328 pub fn int8(&self) -> INT8_R {
329 INT8_R::new(((self.bits >> 8) & 1) != 0)
330 }
331 #[doc = "Bit 9 - External Interrupt 9"]
332 #[inline(always)]
333 pub fn int9(&self) -> INT9_R {
334 INT9_R::new(((self.bits >> 9) & 1) != 0)
335 }
336 #[doc = "Bit 10 - External Interrupt 10"]
337 #[inline(always)]
338 pub fn int10(&self) -> INT10_R {
339 INT10_R::new(((self.bits >> 10) & 1) != 0)
340 }
341 #[doc = "Bit 11 - External Interrupt 11"]
342 #[inline(always)]
343 pub fn int11(&self) -> INT11_R {
344 INT11_R::new(((self.bits >> 11) & 1) != 0)
345 }
346 #[doc = "Bit 12 - External Interrupt 12"]
347 #[inline(always)]
348 pub fn int12(&self) -> INT12_R {
349 INT12_R::new(((self.bits >> 12) & 1) != 0)
350 }
351 #[doc = "Bit 13 - External Interrupt 13"]
352 #[inline(always)]
353 pub fn int13(&self) -> INT13_R {
354 INT13_R::new(((self.bits >> 13) & 1) != 0)
355 }
356 #[doc = "Bit 14 - External Interrupt 14"]
357 #[inline(always)]
358 pub fn int14(&self) -> INT14_R {
359 INT14_R::new(((self.bits >> 14) & 1) != 0)
360 }
361 #[doc = "Bit 15 - External Interrupt 15"]
362 #[inline(always)]
363 pub fn int15(&self) -> INT15_R {
364 INT15_R::new(((self.bits >> 15) & 1) != 0)
365 }
366}
367impl W {
368 #[doc = "Bit 0 - External Non Maskable CPU interrupt"]
369 #[inline(always)]
370 #[must_use]
371 pub fn nmi(&mut self) -> NMI_W<0> {
372 NMI_W::new(self)
373 }
374 #[doc = "Bit 1 - External Interrupt 1"]
375 #[inline(always)]
376 #[must_use]
377 pub fn int1(&mut self) -> INT1_W<1> {
378 INT1_W::new(self)
379 }
380 #[doc = "Bit 2 - External Interrupt 2"]
381 #[inline(always)]
382 #[must_use]
383 pub fn int2(&mut self) -> INT2_W<2> {
384 INT2_W::new(self)
385 }
386 #[doc = "Bit 3 - External Interrupt 3"]
387 #[inline(always)]
388 #[must_use]
389 pub fn int3(&mut self) -> INT3_W<3> {
390 INT3_W::new(self)
391 }
392 #[doc = "Bit 4 - External Interrupt 4"]
393 #[inline(always)]
394 #[must_use]
395 pub fn int4(&mut self) -> INT4_W<4> {
396 INT4_W::new(self)
397 }
398 #[doc = "Bit 5 - External Interrupt 5"]
399 #[inline(always)]
400 #[must_use]
401 pub fn int5(&mut self) -> INT5_W<5> {
402 INT5_W::new(self)
403 }
404 #[doc = "Bit 6 - External Interrupt 6"]
405 #[inline(always)]
406 #[must_use]
407 pub fn int6(&mut self) -> INT6_W<6> {
408 INT6_W::new(self)
409 }
410 #[doc = "Bit 7 - External Interrupt 7"]
411 #[inline(always)]
412 #[must_use]
413 pub fn int7(&mut self) -> INT7_W<7> {
414 INT7_W::new(self)
415 }
416 #[doc = "Bit 8 - External Interrupt 8"]
417 #[inline(always)]
418 #[must_use]
419 pub fn int8(&mut self) -> INT8_W<8> {
420 INT8_W::new(self)
421 }
422 #[doc = "Bit 9 - External Interrupt 9"]
423 #[inline(always)]
424 #[must_use]
425 pub fn int9(&mut self) -> INT9_W<9> {
426 INT9_W::new(self)
427 }
428 #[doc = "Bit 10 - External Interrupt 10"]
429 #[inline(always)]
430 #[must_use]
431 pub fn int10(&mut self) -> INT10_W<10> {
432 INT10_W::new(self)
433 }
434 #[doc = "Bit 11 - External Interrupt 11"]
435 #[inline(always)]
436 #[must_use]
437 pub fn int11(&mut self) -> INT11_W<11> {
438 INT11_W::new(self)
439 }
440 #[doc = "Bit 12 - External Interrupt 12"]
441 #[inline(always)]
442 #[must_use]
443 pub fn int12(&mut self) -> INT12_W<12> {
444 INT12_W::new(self)
445 }
446 #[doc = "Bit 13 - External Interrupt 13"]
447 #[inline(always)]
448 #[must_use]
449 pub fn int13(&mut self) -> INT13_W<13> {
450 INT13_W::new(self)
451 }
452 #[doc = "Bit 14 - External Interrupt 14"]
453 #[inline(always)]
454 #[must_use]
455 pub fn int14(&mut self) -> INT14_W<14> {
456 INT14_W::new(self)
457 }
458 #[doc = "Bit 15 - External Interrupt 15"]
459 #[inline(always)]
460 #[must_use]
461 pub fn int15(&mut self) -> INT15_W<15> {
462 INT15_W::new(self)
463 }
464 #[doc = "Writes raw bits to the register."]
465 #[inline(always)]
466 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
467 self.0.bits(bits);
468 self
469 }
470}
471#[doc = "Mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
472pub struct MODE_SPEC;
473impl crate::RegisterSpec for MODE_SPEC {
474 type Ux = u32;
475}
476#[doc = "`read()` method returns [mode::R](R) reader structure"]
477impl crate::Readable for MODE_SPEC {
478 type Reader = R;
479}
480#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
481impl crate::Writable for MODE_SPEC {
482 type Writer = W;
483 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
484 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
485}
486#[doc = "`reset()` method sets MODE to value 0"]
487impl crate::Resettable for MODE_SPEC {
488 const RESET_VALUE: Self::Ux = 0;
489}