atsam4ls2b_pac/twim0/
hscwgr.rs

1#[doc = "Register `HSCWGR` reader"]
2pub struct R(crate::R<HSCWGR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HSCWGR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HSCWGR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HSCWGR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HSCWGR` writer"]
17pub struct W(crate::W<HSCWGR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HSCWGR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HSCWGR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HSCWGR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LOW` reader - Clock Low Cycles"]
38pub type LOW_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `LOW` writer - Clock Low Cycles"]
40pub type LOW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HSCWGR_SPEC, u8, u8, 8, O>;
41#[doc = "Field `HIGH` reader - Clock High Cycles"]
42pub type HIGH_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `HIGH` writer - Clock High Cycles"]
44pub type HIGH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HSCWGR_SPEC, u8, u8, 8, O>;
45#[doc = "Field `STASTO` reader - START and STOP Cycles"]
46pub type STASTO_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `STASTO` writer - START and STOP Cycles"]
48pub type STASTO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HSCWGR_SPEC, u8, u8, 8, O>;
49#[doc = "Field `DATA` reader - Data Setup and Hold Cycles"]
50pub type DATA_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `DATA` writer - Data Setup and Hold Cycles"]
52pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HSCWGR_SPEC, u8, u8, 4, O>;
53#[doc = "Field `EXP` reader - Clock Prescaler"]
54pub type EXP_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `EXP` writer - Clock Prescaler"]
56pub type EXP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HSCWGR_SPEC, u8, u8, 3, O>;
57impl R {
58    #[doc = "Bits 0:7 - Clock Low Cycles"]
59    #[inline(always)]
60    pub fn low(&self) -> LOW_R {
61        LOW_R::new((self.bits & 0xff) as u8)
62    }
63    #[doc = "Bits 8:15 - Clock High Cycles"]
64    #[inline(always)]
65    pub fn high(&self) -> HIGH_R {
66        HIGH_R::new(((self.bits >> 8) & 0xff) as u8)
67    }
68    #[doc = "Bits 16:23 - START and STOP Cycles"]
69    #[inline(always)]
70    pub fn stasto(&self) -> STASTO_R {
71        STASTO_R::new(((self.bits >> 16) & 0xff) as u8)
72    }
73    #[doc = "Bits 24:27 - Data Setup and Hold Cycles"]
74    #[inline(always)]
75    pub fn data(&self) -> DATA_R {
76        DATA_R::new(((self.bits >> 24) & 0x0f) as u8)
77    }
78    #[doc = "Bits 28:30 - Clock Prescaler"]
79    #[inline(always)]
80    pub fn exp(&self) -> EXP_R {
81        EXP_R::new(((self.bits >> 28) & 7) as u8)
82    }
83}
84impl W {
85    #[doc = "Bits 0:7 - Clock Low Cycles"]
86    #[inline(always)]
87    #[must_use]
88    pub fn low(&mut self) -> LOW_W<0> {
89        LOW_W::new(self)
90    }
91    #[doc = "Bits 8:15 - Clock High Cycles"]
92    #[inline(always)]
93    #[must_use]
94    pub fn high(&mut self) -> HIGH_W<8> {
95        HIGH_W::new(self)
96    }
97    #[doc = "Bits 16:23 - START and STOP Cycles"]
98    #[inline(always)]
99    #[must_use]
100    pub fn stasto(&mut self) -> STASTO_W<16> {
101        STASTO_W::new(self)
102    }
103    #[doc = "Bits 24:27 - Data Setup and Hold Cycles"]
104    #[inline(always)]
105    #[must_use]
106    pub fn data(&mut self) -> DATA_W<24> {
107        DATA_W::new(self)
108    }
109    #[doc = "Bits 28:30 - Clock Prescaler"]
110    #[inline(always)]
111    #[must_use]
112    pub fn exp(&mut self) -> EXP_W<28> {
113        EXP_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "HS-mode Clock Waveform Generator\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hscwgr](index.html) module"]
123pub struct HSCWGR_SPEC;
124impl crate::RegisterSpec for HSCWGR_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [hscwgr::R](R) reader structure"]
128impl crate::Readable for HSCWGR_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [hscwgr::W](W) writer structure"]
132impl crate::Writable for HSCWGR_SPEC {
133    type Writer = W;
134    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
135    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136}
137#[doc = "`reset()` method sets HSCWGR to value 0"]
138impl crate::Resettable for HSCWGR_SPEC {
139    const RESET_VALUE: Self::Ux = 0;
140}
atsam4ls2b_pac/twim0/hscwgr.rs

atsam4ls2b_pac/twim0/
hscwgr.rs
