atsam4ls2b_pac/adcife/
cr.rs

1#[doc = "Register `CR` writer"]
2pub struct W(crate::W<CR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `SWRST` writer - Software reset"]
23pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
24#[doc = "Field `TSTOP` writer - Internal timer stop bit"]
25pub type TSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
26#[doc = "Field `TSTART` writer - Internal timer start bit"]
27pub type TSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
28#[doc = "Field `STRIG` writer - Sequencer trigger"]
29pub type STRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
30#[doc = "Field `REFBUFEN` writer - Reference buffer enable"]
31pub type REFBUFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
32#[doc = "Field `REFBUFDIS` writer - Reference buffer disable"]
33pub type REFBUFDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
34#[doc = "Field `EN` writer - ADCIFD enable"]
35pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
36#[doc = "Field `DIS` writer - ADCIFD disable"]
37pub type DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
38#[doc = "Field `BGREQEN` writer - Bandgap buffer request enable"]
39pub type BGREQEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
40#[doc = "Field `BGREQDIS` writer - Bandgap buffer request disable"]
41pub type BGREQDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
42impl W {
43    #[doc = "Bit 0 - Software reset"]
44    #[inline(always)]
45    #[must_use]
46    pub fn swrst(&mut self) -> SWRST_W<0> {
47        SWRST_W::new(self)
48    }
49    #[doc = "Bit 1 - Internal timer stop bit"]
50    #[inline(always)]
51    #[must_use]
52    pub fn tstop(&mut self) -> TSTOP_W<1> {
53        TSTOP_W::new(self)
54    }
55    #[doc = "Bit 2 - Internal timer start bit"]
56    #[inline(always)]
57    #[must_use]
58    pub fn tstart(&mut self) -> TSTART_W<2> {
59        TSTART_W::new(self)
60    }
61    #[doc = "Bit 3 - Sequencer trigger"]
62    #[inline(always)]
63    #[must_use]
64    pub fn strig(&mut self) -> STRIG_W<3> {
65        STRIG_W::new(self)
66    }
67    #[doc = "Bit 4 - Reference buffer enable"]
68    #[inline(always)]
69    #[must_use]
70    pub fn refbufen(&mut self) -> REFBUFEN_W<4> {
71        REFBUFEN_W::new(self)
72    }
73    #[doc = "Bit 5 - Reference buffer disable"]
74    #[inline(always)]
75    #[must_use]
76    pub fn refbufdis(&mut self) -> REFBUFDIS_W<5> {
77        REFBUFDIS_W::new(self)
78    }
79    #[doc = "Bit 8 - ADCIFD enable"]
80    #[inline(always)]
81    #[must_use]
82    pub fn en(&mut self) -> EN_W<8> {
83        EN_W::new(self)
84    }
85    #[doc = "Bit 9 - ADCIFD disable"]
86    #[inline(always)]
87    #[must_use]
88    pub fn dis(&mut self) -> DIS_W<9> {
89        DIS_W::new(self)
90    }
91    #[doc = "Bit 10 - Bandgap buffer request enable"]
92    #[inline(always)]
93    #[must_use]
94    pub fn bgreqen(&mut self) -> BGREQEN_W<10> {
95        BGREQEN_W::new(self)
96    }
97    #[doc = "Bit 11 - Bandgap buffer request disable"]
98    #[inline(always)]
99    #[must_use]
100    pub fn bgreqdis(&mut self) -> BGREQDIS_W<11> {
101        BGREQDIS_W::new(self)
102    }
103    #[doc = "Writes raw bits to the register."]
104    #[inline(always)]
105    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
106        self.0.bits(bits);
107        self
108    }
109}
110#[doc = "Control Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
111pub struct CR_SPEC;
112impl crate::RegisterSpec for CR_SPEC {
113    type Ux = u32;
114}
115#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
116impl crate::Writable for CR_SPEC {
117    type Writer = W;
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}
121#[doc = "`reset()` method sets CR to value 0"]
122impl crate::Resettable for CR_SPEC {
123    const RESET_VALUE: Self::Ux = 0;
124}
atsam4ls2b_pac/adcife/cr.rs

atsam4ls2b_pac/adcife/
cr.rs
