atsam4lc8c_pac/wdt/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - WDT Enable"]
38pub type EN_R = crate::BitReader<ENSELECT_A>;
39#[doc = "WDT Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum ENSELECT_A {
42    #[doc = "0: WDT is disabled."]
43    _0 = 0,
44    #[doc = "1: WDT is enabled"]
45    _1 = 1,
46}
47impl From<ENSELECT_A> for bool {
48    #[inline(always)]
49    fn from(variant: ENSELECT_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl EN_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> ENSELECT_A {
57        match self.bits {
58            false => ENSELECT_A::_0,
59            true => ENSELECT_A::_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `_0`"]
63    #[inline(always)]
64    pub fn is_0(&self) -> bool {
65        *self == ENSELECT_A::_0
66    }
67    #[doc = "Checks if the value of the field is `_1`"]
68    #[inline(always)]
69    pub fn is_1(&self) -> bool {
70        *self == ENSELECT_A::_1
71    }
72}
73#[doc = "Field `EN` writer - WDT Enable"]
74pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ENSELECT_A, O>;
75impl<'a, const O: u8> EN_W<'a, O> {
76    #[doc = "WDT is disabled."]
77    #[inline(always)]
78    pub fn _0(self) -> &'a mut W {
79        self.variant(ENSELECT_A::_0)
80    }
81    #[doc = "WDT is enabled"]
82    #[inline(always)]
83    pub fn _1(self) -> &'a mut W {
84        self.variant(ENSELECT_A::_1)
85    }
86}
87#[doc = "Field `DAR` reader - WDT Disable After Reset"]
88pub type DAR_R = crate::BitReader<bool>;
89#[doc = "Field `DAR` writer - WDT Disable After Reset"]
90pub type DAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
91#[doc = "Field `MODE` reader - WDT Mode"]
92pub type MODE_R = crate::BitReader<bool>;
93#[doc = "Field `MODE` writer - WDT Mode"]
94pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
95#[doc = "Field `SFV` reader - WDT Store Final Value"]
96pub type SFV_R = crate::BitReader<bool>;
97#[doc = "Field `SFV` writer - WDT Store Final Value"]
98pub type SFV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
99#[doc = "Field `IM` reader - WDT Interruput Mode"]
100pub type IM_R = crate::BitReader<bool>;
101#[doc = "Field `IM` writer - WDT Interruput Mode"]
102pub type IM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
103#[doc = "Field `FCD` reader - WDT Fuse Calibration Done"]
104pub type FCD_R = crate::BitReader<bool>;
105#[doc = "Field `FCD` writer - WDT Fuse Calibration Done"]
106pub type FCD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
107#[doc = "Field `PSEL` reader - Timeout Prescale Select"]
108pub type PSEL_R = crate::FieldReader<u8, u8>;
109#[doc = "Field `PSEL` writer - Timeout Prescale Select"]
110pub type PSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>;
111#[doc = "Field `CSSEL1` reader - Clock Source Selection1"]
112pub type CSSEL1_R = crate::BitReader<bool>;
113#[doc = "Field `CSSEL1` writer - Clock Source Selection1"]
114pub type CSSEL1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
115#[doc = "Field `CEN` reader - Clock Enable"]
116pub type CEN_R = crate::BitReader<bool>;
117#[doc = "Field `CEN` writer - Clock Enable"]
118pub type CEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
119#[doc = "Field `CSSEL` reader - Clock Source Selection0"]
120pub type CSSEL_R = crate::BitReader<bool>;
121#[doc = "Field `CSSEL` writer - Clock Source Selection0"]
122pub type CSSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
123#[doc = "Field `TBAN` reader - TBAN Prescale Select"]
124pub type TBAN_R = crate::FieldReader<u8, u8>;
125#[doc = "Field `TBAN` writer - TBAN Prescale Select"]
126pub type TBAN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 5, O>;
127#[doc = "Field `KEY` reader - Key"]
128pub type KEY_R = crate::FieldReader<u8, u8>;
129#[doc = "Field `KEY` writer - Key"]
130pub type KEY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 8, O>;
131impl R {
132    #[doc = "Bit 0 - WDT Enable"]
133    #[inline(always)]
134    pub fn en(&self) -> EN_R {
135        EN_R::new((self.bits & 1) != 0)
136    }
137    #[doc = "Bit 1 - WDT Disable After Reset"]
138    #[inline(always)]
139    pub fn dar(&self) -> DAR_R {
140        DAR_R::new(((self.bits >> 1) & 1) != 0)
141    }
142    #[doc = "Bit 2 - WDT Mode"]
143    #[inline(always)]
144    pub fn mode(&self) -> MODE_R {
145        MODE_R::new(((self.bits >> 2) & 1) != 0)
146    }
147    #[doc = "Bit 3 - WDT Store Final Value"]
148    #[inline(always)]
149    pub fn sfv(&self) -> SFV_R {
150        SFV_R::new(((self.bits >> 3) & 1) != 0)
151    }
152    #[doc = "Bit 4 - WDT Interruput Mode"]
153    #[inline(always)]
154    pub fn im(&self) -> IM_R {
155        IM_R::new(((self.bits >> 4) & 1) != 0)
156    }
157    #[doc = "Bit 7 - WDT Fuse Calibration Done"]
158    #[inline(always)]
159    pub fn fcd(&self) -> FCD_R {
160        FCD_R::new(((self.bits >> 7) & 1) != 0)
161    }
162    #[doc = "Bits 8:12 - Timeout Prescale Select"]
163    #[inline(always)]
164    pub fn psel(&self) -> PSEL_R {
165        PSEL_R::new(((self.bits >> 8) & 0x1f) as u8)
166    }
167    #[doc = "Bit 14 - Clock Source Selection1"]
168    #[inline(always)]
169    pub fn cssel1(&self) -> CSSEL1_R {
170        CSSEL1_R::new(((self.bits >> 14) & 1) != 0)
171    }
172    #[doc = "Bit 16 - Clock Enable"]
173    #[inline(always)]
174    pub fn cen(&self) -> CEN_R {
175        CEN_R::new(((self.bits >> 16) & 1) != 0)
176    }
177    #[doc = "Bit 17 - Clock Source Selection0"]
178    #[inline(always)]
179    pub fn cssel(&self) -> CSSEL_R {
180        CSSEL_R::new(((self.bits >> 17) & 1) != 0)
181    }
182    #[doc = "Bits 18:22 - TBAN Prescale Select"]
183    #[inline(always)]
184    pub fn tban(&self) -> TBAN_R {
185        TBAN_R::new(((self.bits >> 18) & 0x1f) as u8)
186    }
187    #[doc = "Bits 24:31 - Key"]
188    #[inline(always)]
189    pub fn key(&self) -> KEY_R {
190        KEY_R::new(((self.bits >> 24) & 0xff) as u8)
191    }
192}
193impl W {
194    #[doc = "Bit 0 - WDT Enable"]
195    #[inline(always)]
196    #[must_use]
197    pub fn en(&mut self) -> EN_W<0> {
198        EN_W::new(self)
199    }
200    #[doc = "Bit 1 - WDT Disable After Reset"]
201    #[inline(always)]
202    #[must_use]
203    pub fn dar(&mut self) -> DAR_W<1> {
204        DAR_W::new(self)
205    }
206    #[doc = "Bit 2 - WDT Mode"]
207    #[inline(always)]
208    #[must_use]
209    pub fn mode(&mut self) -> MODE_W<2> {
210        MODE_W::new(self)
211    }
212    #[doc = "Bit 3 - WDT Store Final Value"]
213    #[inline(always)]
214    #[must_use]
215    pub fn sfv(&mut self) -> SFV_W<3> {
216        SFV_W::new(self)
217    }
218    #[doc = "Bit 4 - WDT Interruput Mode"]
219    #[inline(always)]
220    #[must_use]
221    pub fn im(&mut self) -> IM_W<4> {
222        IM_W::new(self)
223    }
224    #[doc = "Bit 7 - WDT Fuse Calibration Done"]
225    #[inline(always)]
226    #[must_use]
227    pub fn fcd(&mut self) -> FCD_W<7> {
228        FCD_W::new(self)
229    }
230    #[doc = "Bits 8:12 - Timeout Prescale Select"]
231    #[inline(always)]
232    #[must_use]
233    pub fn psel(&mut self) -> PSEL_W<8> {
234        PSEL_W::new(self)
235    }
236    #[doc = "Bit 14 - Clock Source Selection1"]
237    #[inline(always)]
238    #[must_use]
239    pub fn cssel1(&mut self) -> CSSEL1_W<14> {
240        CSSEL1_W::new(self)
241    }
242    #[doc = "Bit 16 - Clock Enable"]
243    #[inline(always)]
244    #[must_use]
245    pub fn cen(&mut self) -> CEN_W<16> {
246        CEN_W::new(self)
247    }
248    #[doc = "Bit 17 - Clock Source Selection0"]
249    #[inline(always)]
250    #[must_use]
251    pub fn cssel(&mut self) -> CSSEL_W<17> {
252        CSSEL_W::new(self)
253    }
254    #[doc = "Bits 18:22 - TBAN Prescale Select"]
255    #[inline(always)]
256    #[must_use]
257    pub fn tban(&mut self) -> TBAN_W<18> {
258        TBAN_W::new(self)
259    }
260    #[doc = "Bits 24:31 - Key"]
261    #[inline(always)]
262    #[must_use]
263    pub fn key(&mut self) -> KEY_W<24> {
264        KEY_W::new(self)
265    }
266    #[doc = "Writes raw bits to the register."]
267    #[inline(always)]
268    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
269        self.0.bits(bits);
270        self
271    }
272}
273#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
274pub struct CTRL_SPEC;
275impl crate::RegisterSpec for CTRL_SPEC {
276    type Ux = u32;
277}
278#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
279impl crate::Readable for CTRL_SPEC {
280    type Reader = R;
281}
282#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
283impl crate::Writable for CTRL_SPEC {
284    type Writer = W;
285    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
286    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
287}
288#[doc = "`reset()` method sets CTRL to value 0x0001_0080"]
289impl crate::Resettable for CTRL_SPEC {
290    const RESET_VALUE: Self::Ux = 0x0001_0080;
291}
atsam4lc8c_pac/wdt/ctrl.rs

atsam4lc8c_pac/wdt/
ctrl.rs
