Struct atsam4lc8a_pac::lcdca::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub cr: CR,
    pub cfg: CFG,
    pub tim: TIM,
    pub sr: SR,
    pub scr: SCR,
    pub drl0: DRL0,
    pub drh0: DRH0,
    pub drl1: DRL1,
    pub drh1: DRH1,
    pub drl2: DRL2,
    pub drh2: DRH2,
    pub drl3: DRL3,
    pub drh3: DRH3,
    pub iadr: IADR,
    pub bcfg: BCFG,
    pub csrcfg: CSRCFG,
    pub cmcfg: CMCFG,
    pub cmdr: CMDR,
    pub acmcfg: ACMCFG,
    pub acmdr: ACMDR,
    pub abmcfg: ABMCFG,
    pub abmdr: ABMDR,
    pub ier: IER,
    pub idr: IDR,
    pub imr: IMR,
    pub version: VERSION,
}

Register block

Fields

cr: CR

0x00 - Control Register

cfg: CFG

0x04 - Configuration Register

tim: TIM

0x08 - Timing Register

sr: SR

0x0c - Status Register

scr: SCR

0x10 - Status Clear Register

drl0: DRL0

0x14 - Data Register Low 0

drh0: DRH0

0x18 - Data Register High 0

drl1: DRL1

0x1c - Data Register Low 1

drh1: DRH1

0x20 - Data Register High 1

drl2: DRL2

0x24 - Data Register Low 2

drh2: DRH2

0x28 - Data Register High 2

drl3: DRL3

0x2c - Data Register Low 3

drh3: DRH3

0x30 - Data Register High 3

iadr: IADR

0x34 - Indirect Access Data Register

bcfg: BCFG

0x38 - Blink Configuration Register

csrcfg: CSRCFG

0x3c - Circular Shift Register Configuration

cmcfg: CMCFG

0x40 - Character Mapping Configuration Register

cmdr: CMDR

0x44 - Character Mapping Data Register

acmcfg: ACMCFG

0x48 - Automated Character Mapping Configuration Register

acmdr: ACMDR

0x4c - Automated Character Mapping Data Register

abmcfg: ABMCFG

0x50 - Automated Bit Mapping Configuration Register

abmdr: ABMDR

0x54 - Automated Bit Mapping Data Register

ier: IER

0x58 - Interrupt Enable Register

idr: IDR

0x5c - Interrupt Disable Register

imr: IMR

0x60 - Interrupt Mask Register

version: VERSION

0x64 - Version Register

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