Struct atsam4lc4c_pac::tc0::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 35 fields
    pub ccr0: CCR,
    pub smmr0: SMMR,
    pub cv0: CV,
    pub ra0: RA,
    pub rb0: RB,
    pub rc0: RC,
    pub sr0: SR,
    pub ier0: IER,
    pub idr0: IDR,
    pub imr0: IMR,
    pub ccr1: CCR,
    pub smmr1: SMMR,
    pub cv1: CV,
    pub ra1: RA,
    pub rb1: RB,
    pub rc1: RC,
    pub sr1: SR,
    pub ier1: IER,
    pub idr1: IDR,
    pub imr1: IMR,
    pub ccr2: CCR,
    pub smmr2: SMMR,
    pub cv2: CV,
    pub ra2: RA,
    pub rb2: RB,
    pub rc2: RC,
    pub sr2: SR,
    pub ier2: IER,
    pub idr2: IDR,
    pub imr2: IMR,
    pub bcr: BCR,
    pub bmr: BMR,
    pub wpmr: WPMR,
    pub features: FEATURES,
    pub version: VERSION,
    /* private fields */

}
Expand description

Register block

Fields§

§ccr0: CCR

0x00 - Channel Control Register Channel

§smmr0: SMMR

0x08 - Stepper Motor Mode Register

§cv0: CV

0x10 - Counter Value Channel

§ra0: RA

0x14 - Register A Channel

§rb0: RB

0x18 - Register B Channel

§rc0: RC

0x1c - Register C Channel

§sr0: SR

0x20 - Status Register Channel

§ier0: IER

0x24 - Interrupt Enable Register Channel

§idr0: IDR

0x28 - Interrupt Disable Register Channel

§imr0: IMR

0x2c - Interrupt Mask Register Channel

§ccr1: CCR

0x40 - Channel Control Register Channel

§smmr1: SMMR

0x48 - Stepper Motor Mode Register

§cv1: CV

0x50 - Counter Value Channel

§ra1: RA

0x54 - Register A Channel

§rb1: RB

0x58 - Register B Channel

§rc1: RC

0x5c - Register C Channel

§sr1: SR

0x60 - Status Register Channel

§ier1: IER

0x64 - Interrupt Enable Register Channel

§idr1: IDR

0x68 - Interrupt Disable Register Channel

§imr1: IMR

0x6c - Interrupt Mask Register Channel

§ccr2: CCR

0x80 - Channel Control Register Channel

§smmr2: SMMR

0x88 - Stepper Motor Mode Register

§cv2: CV

0x90 - Counter Value Channel

§ra2: RA

0x94 - Register A Channel

§rb2: RB

0x98 - Register B Channel

§rc2: RC

0x9c - Register C Channel

§sr2: SR

0xa0 - Status Register Channel

§ier2: IER

0xa4 - Interrupt Enable Register Channel

§idr2: IDR

0xa8 - Interrupt Disable Register Channel

§imr2: IMR

0xac - Interrupt Mask Register Channel

§bcr: BCR

0xc0 - TC Block Control Register

§bmr: BMR

0xc4 - TC Block Mode Register

§wpmr: WPMR

0xe4 - Write Protect Mode Register

§features: FEATURES

0xf8 - Features Register

§version: VERSION

0xfc - Version Register

Implementations§

source§

impl RegisterBlock

source

pub const fn waveform_cmr0_alt(&self) -> &WAVEFORM_CMR_ALT

0x04 - Channel Mode Register Channel

source

pub const fn capture_cmr0(&self) -> &CAPTURE_CMR

0x04 - Channel Mode Register Channel

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pub const fn waveform_cmr1_alt(&self) -> &WAVEFORM_CMR_ALT

0x44 - Channel Mode Register Channel

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pub const fn capture_cmr1(&self) -> &CAPTURE_CMR

0x44 - Channel Mode Register Channel

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pub const fn waveform_cmr2_alt(&self) -> &WAVEFORM_CMR_ALT

0x84 - Channel Mode Register Channel

source

pub const fn capture_cmr2(&self) -> &CAPTURE_CMR

0x84 - Channel Mode Register Channel

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