atsam4lc4c_pac/usbc/
uhintclr.rs

1#[doc = "Register `UHINTCLR` writer"]
2pub struct W(crate::W<UHINTCLR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<UHINTCLR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<UHINTCLR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<UHINTCLR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `DCONNIC` writer - DCONNI Clear"]
23pub type DCONNIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
24#[doc = "Field `DDISCIC` writer - DDISCI Clear"]
25pub type DDISCIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
26#[doc = "Field `RSTIC` writer - RSTI Clear"]
27pub type RSTIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
28#[doc = "Field `RSMEDIC` writer - RSMEDI Clear"]
29pub type RSMEDIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
30#[doc = "Field `RXRSMIC` writer - RXRSMI Clear"]
31pub type RXRSMIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
32#[doc = "Field `HSOFIC` writer - HSOFI Clear"]
33pub type HSOFIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
34#[doc = "Field `HWUPIC` writer - HWUPI Clear"]
35pub type HWUPIC_W<'a, const O: u8> = crate::BitWriter<'a, u32, UHINTCLR_SPEC, bool, O>;
36impl W {
37    #[doc = "Bit 0 - DCONNI Clear"]
38    #[inline(always)]
39    #[must_use]
40    pub fn dconnic(&mut self) -> DCONNIC_W<0> {
41        DCONNIC_W::new(self)
42    }
43    #[doc = "Bit 1 - DDISCI Clear"]
44    #[inline(always)]
45    #[must_use]
46    pub fn ddiscic(&mut self) -> DDISCIC_W<1> {
47        DDISCIC_W::new(self)
48    }
49    #[doc = "Bit 2 - RSTI Clear"]
50    #[inline(always)]
51    #[must_use]
52    pub fn rstic(&mut self) -> RSTIC_W<2> {
53        RSTIC_W::new(self)
54    }
55    #[doc = "Bit 3 - RSMEDI Clear"]
56    #[inline(always)]
57    #[must_use]
58    pub fn rsmedic(&mut self) -> RSMEDIC_W<3> {
59        RSMEDIC_W::new(self)
60    }
61    #[doc = "Bit 4 - RXRSMI Clear"]
62    #[inline(always)]
63    #[must_use]
64    pub fn rxrsmic(&mut self) -> RXRSMIC_W<4> {
65        RXRSMIC_W::new(self)
66    }
67    #[doc = "Bit 5 - HSOFI Clear"]
68    #[inline(always)]
69    #[must_use]
70    pub fn hsofic(&mut self) -> HSOFIC_W<5> {
71        HSOFIC_W::new(self)
72    }
73    #[doc = "Bit 6 - HWUPI Clear"]
74    #[inline(always)]
75    #[must_use]
76    pub fn hwupic(&mut self) -> HWUPIC_W<6> {
77        HWUPIC_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Host Global Interrrupt Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uhintclr](index.html) module"]
87pub struct UHINTCLR_SPEC;
88impl crate::RegisterSpec for UHINTCLR_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [uhintclr::W](W) writer structure"]
92impl crate::Writable for UHINTCLR_SPEC {
93    type Writer = W;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
97#[doc = "`reset()` method sets UHINTCLR to value 0"]
98impl crate::Resettable for UHINTCLR_SPEC {
99    const RESET_VALUE: Self::Ux = 0;
100}
atsam4lc4c_pac/usbc/uhintclr.rs

atsam4lc4c_pac/usbc/
uhintclr.rs
