atsam4lc4b_pac/twis0/
sr.rs

1#[doc = "Register `SR` reader"]
2pub struct R(crate::R<SR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RXRDY` reader - RX Buffer Ready"]
17pub type RXRDY_R = crate::BitReader<bool>;
18#[doc = "Field `TXRDY` reader - TX Buffer Ready"]
19pub type TXRDY_R = crate::BitReader<bool>;
20#[doc = "Field `SEN` reader - Slave Enabled"]
21pub type SEN_R = crate::BitReader<bool>;
22#[doc = "Field `TCOMP` reader - Transmission Complete"]
23pub type TCOMP_R = crate::BitReader<bool>;
24#[doc = "Field `TRA` reader - Transmitter Mode"]
25pub type TRA_R = crate::BitReader<bool>;
26#[doc = "Field `URUN` reader - Underrun"]
27pub type URUN_R = crate::BitReader<bool>;
28#[doc = "Field `ORUN` reader - Overrun"]
29pub type ORUN_R = crate::BitReader<bool>;
30#[doc = "Field `NAK` reader - NAK Received"]
31pub type NAK_R = crate::BitReader<bool>;
32#[doc = "Field `SMBTOUT` reader - SMBus Timeout"]
33pub type SMBTOUT_R = crate::BitReader<bool>;
34#[doc = "Field `SMBPECERR` reader - SMBus PEC Error"]
35pub type SMBPECERR_R = crate::BitReader<bool>;
36#[doc = "Field `BUSERR` reader - Bus Error"]
37pub type BUSERR_R = crate::BitReader<bool>;
38#[doc = "Field `SAM` reader - Slave Address Match"]
39pub type SAM_R = crate::BitReader<bool>;
40#[doc = "Field `GCM` reader - General Call Match"]
41pub type GCM_R = crate::BitReader<bool>;
42#[doc = "Field `SMBALERTM` reader - SMBus Alert Response Address Match"]
43pub type SMBALERTM_R = crate::BitReader<bool>;
44#[doc = "Field `SMBHHM` reader - SMBus Host Header Address Match"]
45pub type SMBHHM_R = crate::BitReader<bool>;
46#[doc = "Field `SMBDAM` reader - SMBus Default Address Match"]
47pub type SMBDAM_R = crate::BitReader<bool>;
48#[doc = "Field `STO` reader - Stop Received"]
49pub type STO_R = crate::BitReader<bool>;
50#[doc = "Field `REP` reader - Repeated Start Received"]
51pub type REP_R = crate::BitReader<bool>;
52#[doc = "Field `BTF` reader - Byte Transfer Finished"]
53pub type BTF_R = crate::BitReader<bool>;
54impl R {
55    #[doc = "Bit 0 - RX Buffer Ready"]
56    #[inline(always)]
57    pub fn rxrdy(&self) -> RXRDY_R {
58        RXRDY_R::new((self.bits & 1) != 0)
59    }
60    #[doc = "Bit 1 - TX Buffer Ready"]
61    #[inline(always)]
62    pub fn txrdy(&self) -> TXRDY_R {
63        TXRDY_R::new(((self.bits >> 1) & 1) != 0)
64    }
65    #[doc = "Bit 2 - Slave Enabled"]
66    #[inline(always)]
67    pub fn sen(&self) -> SEN_R {
68        SEN_R::new(((self.bits >> 2) & 1) != 0)
69    }
70    #[doc = "Bit 3 - Transmission Complete"]
71    #[inline(always)]
72    pub fn tcomp(&self) -> TCOMP_R {
73        TCOMP_R::new(((self.bits >> 3) & 1) != 0)
74    }
75    #[doc = "Bit 5 - Transmitter Mode"]
76    #[inline(always)]
77    pub fn tra(&self) -> TRA_R {
78        TRA_R::new(((self.bits >> 5) & 1) != 0)
79    }
80    #[doc = "Bit 6 - Underrun"]
81    #[inline(always)]
82    pub fn urun(&self) -> URUN_R {
83        URUN_R::new(((self.bits >> 6) & 1) != 0)
84    }
85    #[doc = "Bit 7 - Overrun"]
86    #[inline(always)]
87    pub fn orun(&self) -> ORUN_R {
88        ORUN_R::new(((self.bits >> 7) & 1) != 0)
89    }
90    #[doc = "Bit 8 - NAK Received"]
91    #[inline(always)]
92    pub fn nak(&self) -> NAK_R {
93        NAK_R::new(((self.bits >> 8) & 1) != 0)
94    }
95    #[doc = "Bit 12 - SMBus Timeout"]
96    #[inline(always)]
97    pub fn smbtout(&self) -> SMBTOUT_R {
98        SMBTOUT_R::new(((self.bits >> 12) & 1) != 0)
99    }
100    #[doc = "Bit 13 - SMBus PEC Error"]
101    #[inline(always)]
102    pub fn smbpecerr(&self) -> SMBPECERR_R {
103        SMBPECERR_R::new(((self.bits >> 13) & 1) != 0)
104    }
105    #[doc = "Bit 14 - Bus Error"]
106    #[inline(always)]
107    pub fn buserr(&self) -> BUSERR_R {
108        BUSERR_R::new(((self.bits >> 14) & 1) != 0)
109    }
110    #[doc = "Bit 16 - Slave Address Match"]
111    #[inline(always)]
112    pub fn sam(&self) -> SAM_R {
113        SAM_R::new(((self.bits >> 16) & 1) != 0)
114    }
115    #[doc = "Bit 17 - General Call Match"]
116    #[inline(always)]
117    pub fn gcm(&self) -> GCM_R {
118        GCM_R::new(((self.bits >> 17) & 1) != 0)
119    }
120    #[doc = "Bit 18 - SMBus Alert Response Address Match"]
121    #[inline(always)]
122    pub fn smbalertm(&self) -> SMBALERTM_R {
123        SMBALERTM_R::new(((self.bits >> 18) & 1) != 0)
124    }
125    #[doc = "Bit 19 - SMBus Host Header Address Match"]
126    #[inline(always)]
127    pub fn smbhhm(&self) -> SMBHHM_R {
128        SMBHHM_R::new(((self.bits >> 19) & 1) != 0)
129    }
130    #[doc = "Bit 20 - SMBus Default Address Match"]
131    #[inline(always)]
132    pub fn smbdam(&self) -> SMBDAM_R {
133        SMBDAM_R::new(((self.bits >> 20) & 1) != 0)
134    }
135    #[doc = "Bit 21 - Stop Received"]
136    #[inline(always)]
137    pub fn sto(&self) -> STO_R {
138        STO_R::new(((self.bits >> 21) & 1) != 0)
139    }
140    #[doc = "Bit 22 - Repeated Start Received"]
141    #[inline(always)]
142    pub fn rep(&self) -> REP_R {
143        REP_R::new(((self.bits >> 22) & 1) != 0)
144    }
145    #[doc = "Bit 23 - Byte Transfer Finished"]
146    #[inline(always)]
147    pub fn btf(&self) -> BTF_R {
148        BTF_R::new(((self.bits >> 23) & 1) != 0)
149    }
150}
151#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](index.html) module"]
152pub struct SR_SPEC;
153impl crate::RegisterSpec for SR_SPEC {
154    type Ux = u32;
155}
156#[doc = "`read()` method returns [sr::R](R) reader structure"]
157impl crate::Readable for SR_SPEC {
158    type Reader = R;
159}
160#[doc = "`reset()` method sets SR to value 0x02"]
161impl crate::Resettable for SR_SPEC {
162    const RESET_VALUE: Self::Ux = 0x02;
163}
atsam4lc4b_pac/twis0/sr.rs

atsam4lc4b_pac/twis0/
sr.rs
