Struct atsam4lc4a_pac::twis0::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub cr: CR,
    pub nbytes: NBYTES,
    pub tr: TR,
    pub rhr: RHR,
    pub thr: THR,
    pub pecr: PECR,
    pub sr: SR,
    pub ier: IER,
    pub idr: IDR,
    pub imr: IMR,
    pub scr: SCR,
    pub pr: PR,
    pub vr: VR,
    pub hstr: HSTR,
    pub srr: SRR,
    pub hssrr: HSSRR,
}

Register block

Fields

cr: CR

0x00 - Control Register

nbytes: NBYTES

0x04 - NBYTES Register

tr: TR

0x08 - Timing Register

rhr: RHR

0x0c - Receive Holding Register

thr: THR

0x10 - Transmit Holding Register

pecr: PECR

0x14 - Packet Error Check Register

sr: SR

0x18 - Status Register

ier: IER

0x1c - Interrupt Enable Register

idr: IDR

0x20 - Interrupt Disable Register

imr: IMR

0x24 - Interrupt Mask Register

scr: SCR

0x28 - Status Clear Register

pr: PR

0x2c - Parameter Register

vr: VR

0x30 - Version Register

hstr: HSTR

0x34 - HS-mode Timing Register

srr: SRR

0x38 - Slew Rate Register

hssrr: HSSRR

0x3c - HS-mode Slew Rate Register

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