atsam4lc2c_pac/eic/
icr.rs

1#[doc = "Register `ICR` writer"]
2pub struct W(crate::W<ICR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<ICR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<ICR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<ICR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `NMI` writer - External Non Maskable CPU interrupt"]
23pub type NMI_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
24#[doc = "External Interrupt 1\n\nValue on reset: 0"]
25#[derive(Clone, Copy, Debug, PartialEq, Eq)]
26pub enum INT1SELECT_AW {
27    #[doc = "0: No effect"]
28    _0 = 0,
29    #[doc = "1: Clear Interrupt."]
30    _1 = 1,
31}
32impl From<INT1SELECT_AW> for bool {
33    #[inline(always)]
34    fn from(variant: INT1SELECT_AW) -> Self {
35        variant as u8 != 0
36    }
37}
38#[doc = "Field `INT1` writer - External Interrupt 1"]
39pub type INT1_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, INT1SELECT_AW, O>;
40impl<'a, const O: u8> INT1_W<'a, O> {
41    #[doc = "No effect"]
42    #[inline(always)]
43    pub fn _0(self) -> &'a mut W {
44        self.variant(INT1SELECT_AW::_0)
45    }
46    #[doc = "Clear Interrupt."]
47    #[inline(always)]
48    pub fn _1(self) -> &'a mut W {
49        self.variant(INT1SELECT_AW::_1)
50    }
51}
52#[doc = "External Interrupt 2\n\nValue on reset: 0"]
53#[derive(Clone, Copy, Debug, PartialEq, Eq)]
54pub enum INT2SELECT_AW {
55    #[doc = "0: No effect"]
56    _0 = 0,
57    #[doc = "1: Clear Interrupt."]
58    _1 = 1,
59}
60impl From<INT2SELECT_AW> for bool {
61    #[inline(always)]
62    fn from(variant: INT2SELECT_AW) -> Self {
63        variant as u8 != 0
64    }
65}
66#[doc = "Field `INT2` writer - External Interrupt 2"]
67pub type INT2_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, INT2SELECT_AW, O>;
68impl<'a, const O: u8> INT2_W<'a, O> {
69    #[doc = "No effect"]
70    #[inline(always)]
71    pub fn _0(self) -> &'a mut W {
72        self.variant(INT2SELECT_AW::_0)
73    }
74    #[doc = "Clear Interrupt."]
75    #[inline(always)]
76    pub fn _1(self) -> &'a mut W {
77        self.variant(INT2SELECT_AW::_1)
78    }
79}
80#[doc = "External Interrupt 3\n\nValue on reset: 0"]
81#[derive(Clone, Copy, Debug, PartialEq, Eq)]
82pub enum INT3SELECT_AW {
83    #[doc = "0: No effect"]
84    _0 = 0,
85    #[doc = "1: Clear Interrupt."]
86    _1 = 1,
87}
88impl From<INT3SELECT_AW> for bool {
89    #[inline(always)]
90    fn from(variant: INT3SELECT_AW) -> Self {
91        variant as u8 != 0
92    }
93}
94#[doc = "Field `INT3` writer - External Interrupt 3"]
95pub type INT3_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, INT3SELECT_AW, O>;
96impl<'a, const O: u8> INT3_W<'a, O> {
97    #[doc = "No effect"]
98    #[inline(always)]
99    pub fn _0(self) -> &'a mut W {
100        self.variant(INT3SELECT_AW::_0)
101    }
102    #[doc = "Clear Interrupt."]
103    #[inline(always)]
104    pub fn _1(self) -> &'a mut W {
105        self.variant(INT3SELECT_AW::_1)
106    }
107}
108#[doc = "External Interrupt 4\n\nValue on reset: 0"]
109#[derive(Clone, Copy, Debug, PartialEq, Eq)]
110pub enum INT4SELECT_AW {
111    #[doc = "0: No effect"]
112    _0 = 0,
113    #[doc = "1: Clear Interrupt."]
114    _1 = 1,
115}
116impl From<INT4SELECT_AW> for bool {
117    #[inline(always)]
118    fn from(variant: INT4SELECT_AW) -> Self {
119        variant as u8 != 0
120    }
121}
122#[doc = "Field `INT4` writer - External Interrupt 4"]
123pub type INT4_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, INT4SELECT_AW, O>;
124impl<'a, const O: u8> INT4_W<'a, O> {
125    #[doc = "No effect"]
126    #[inline(always)]
127    pub fn _0(self) -> &'a mut W {
128        self.variant(INT4SELECT_AW::_0)
129    }
130    #[doc = "Clear Interrupt."]
131    #[inline(always)]
132    pub fn _1(self) -> &'a mut W {
133        self.variant(INT4SELECT_AW::_1)
134    }
135}
136#[doc = "Field `INT5` writer - External Interrupt 5"]
137pub type INT5_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
138#[doc = "Field `INT6` writer - External Interrupt 6"]
139pub type INT6_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
140#[doc = "Field `INT7` writer - External Interrupt 7"]
141pub type INT7_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
142#[doc = "Field `INT8` writer - External Interrupt 8"]
143pub type INT8_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
144#[doc = "Field `INT9` writer - External Interrupt 9"]
145pub type INT9_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
146#[doc = "Field `INT10` writer - External Interrupt 10"]
147pub type INT10_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
148#[doc = "Field `INT11` writer - External Interrupt 11"]
149pub type INT11_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
150#[doc = "Field `INT12` writer - External Interrupt 12"]
151pub type INT12_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
152#[doc = "Field `INT13` writer - External Interrupt 13"]
153pub type INT13_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
154#[doc = "Field `INT14` writer - External Interrupt 14"]
155pub type INT14_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
156#[doc = "Field `INT15` writer - External Interrupt 15"]
157pub type INT15_W<'a, const O: u8> = crate::BitWriter<'a, u32, ICR_SPEC, bool, O>;
158impl W {
159    #[doc = "Bit 0 - External Non Maskable CPU interrupt"]
160    #[inline(always)]
161    #[must_use]
162    pub fn nmi(&mut self) -> NMI_W<0> {
163        NMI_W::new(self)
164    }
165    #[doc = "Bit 1 - External Interrupt 1"]
166    #[inline(always)]
167    #[must_use]
168    pub fn int1(&mut self) -> INT1_W<1> {
169        INT1_W::new(self)
170    }
171    #[doc = "Bit 2 - External Interrupt 2"]
172    #[inline(always)]
173    #[must_use]
174    pub fn int2(&mut self) -> INT2_W<2> {
175        INT2_W::new(self)
176    }
177    #[doc = "Bit 3 - External Interrupt 3"]
178    #[inline(always)]
179    #[must_use]
180    pub fn int3(&mut self) -> INT3_W<3> {
181        INT3_W::new(self)
182    }
183    #[doc = "Bit 4 - External Interrupt 4"]
184    #[inline(always)]
185    #[must_use]
186    pub fn int4(&mut self) -> INT4_W<4> {
187        INT4_W::new(self)
188    }
189    #[doc = "Bit 5 - External Interrupt 5"]
190    #[inline(always)]
191    #[must_use]
192    pub fn int5(&mut self) -> INT5_W<5> {
193        INT5_W::new(self)
194    }
195    #[doc = "Bit 6 - External Interrupt 6"]
196    #[inline(always)]
197    #[must_use]
198    pub fn int6(&mut self) -> INT6_W<6> {
199        INT6_W::new(self)
200    }
201    #[doc = "Bit 7 - External Interrupt 7"]
202    #[inline(always)]
203    #[must_use]
204    pub fn int7(&mut self) -> INT7_W<7> {
205        INT7_W::new(self)
206    }
207    #[doc = "Bit 8 - External Interrupt 8"]
208    #[inline(always)]
209    #[must_use]
210    pub fn int8(&mut self) -> INT8_W<8> {
211        INT8_W::new(self)
212    }
213    #[doc = "Bit 9 - External Interrupt 9"]
214    #[inline(always)]
215    #[must_use]
216    pub fn int9(&mut self) -> INT9_W<9> {
217        INT9_W::new(self)
218    }
219    #[doc = "Bit 10 - External Interrupt 10"]
220    #[inline(always)]
221    #[must_use]
222    pub fn int10(&mut self) -> INT10_W<10> {
223        INT10_W::new(self)
224    }
225    #[doc = "Bit 11 - External Interrupt 11"]
226    #[inline(always)]
227    #[must_use]
228    pub fn int11(&mut self) -> INT11_W<11> {
229        INT11_W::new(self)
230    }
231    #[doc = "Bit 12 - External Interrupt 12"]
232    #[inline(always)]
233    #[must_use]
234    pub fn int12(&mut self) -> INT12_W<12> {
235        INT12_W::new(self)
236    }
237    #[doc = "Bit 13 - External Interrupt 13"]
238    #[inline(always)]
239    #[must_use]
240    pub fn int13(&mut self) -> INT13_W<13> {
241        INT13_W::new(self)
242    }
243    #[doc = "Bit 14 - External Interrupt 14"]
244    #[inline(always)]
245    #[must_use]
246    pub fn int14(&mut self) -> INT14_W<14> {
247        INT14_W::new(self)
248    }
249    #[doc = "Bit 15 - External Interrupt 15"]
250    #[inline(always)]
251    #[must_use]
252    pub fn int15(&mut self) -> INT15_W<15> {
253        INT15_W::new(self)
254    }
255    #[doc = "Writes raw bits to the register."]
256    #[inline(always)]
257    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
258        self.0.bits(bits);
259        self
260    }
261}
262#[doc = "Interrupt Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](index.html) module"]
263pub struct ICR_SPEC;
264impl crate::RegisterSpec for ICR_SPEC {
265    type Ux = u32;
266}
267#[doc = "`write(|w| ..)` method takes [icr::W](W) writer structure"]
268impl crate::Writable for ICR_SPEC {
269    type Writer = W;
270    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
271    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
272}
273#[doc = "`reset()` method sets ICR to value 0"]
274impl crate::Resettable for ICR_SPEC {
275    const RESET_VALUE: Self::Ux = 0;
276}
atsam4lc2c_pac/eic/icr.rs

atsam4lc2c_pac/eic/
icr.rs
