atsam4lc2c_pac/ast/
scr.rs

1#[doc = "Register `SCR` writer"]
2pub struct W(crate::W<SCR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<SCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<SCR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<SCR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `OVF` writer - Overflow"]
23pub type OVF_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
24#[doc = "Field `ALARM0` writer - Alarm 0"]
25pub type ALARM0_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
26#[doc = "Field `ALARM1` writer - Alarm 1"]
27pub type ALARM1_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
28#[doc = "Field `PER0` writer - Periodic 0"]
29pub type PER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
30#[doc = "Field `PER1` writer - Periodic 1"]
31pub type PER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
32#[doc = "Field `READY` writer - AST Ready"]
33pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
34#[doc = "Field `CLKRDY` writer - Clock Ready"]
35pub type CLKRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCR_SPEC, bool, O>;
36impl W {
37    #[doc = "Bit 0 - Overflow"]
38    #[inline(always)]
39    #[must_use]
40    pub fn ovf(&mut self) -> OVF_W<0> {
41        OVF_W::new(self)
42    }
43    #[doc = "Bit 8 - Alarm 0"]
44    #[inline(always)]
45    #[must_use]
46    pub fn alarm0(&mut self) -> ALARM0_W<8> {
47        ALARM0_W::new(self)
48    }
49    #[doc = "Bit 9 - Alarm 1"]
50    #[inline(always)]
51    #[must_use]
52    pub fn alarm1(&mut self) -> ALARM1_W<9> {
53        ALARM1_W::new(self)
54    }
55    #[doc = "Bit 16 - Periodic 0"]
56    #[inline(always)]
57    #[must_use]
58    pub fn per0(&mut self) -> PER0_W<16> {
59        PER0_W::new(self)
60    }
61    #[doc = "Bit 17 - Periodic 1"]
62    #[inline(always)]
63    #[must_use]
64    pub fn per1(&mut self) -> PER1_W<17> {
65        PER1_W::new(self)
66    }
67    #[doc = "Bit 25 - AST Ready"]
68    #[inline(always)]
69    #[must_use]
70    pub fn ready(&mut self) -> READY_W<25> {
71        READY_W::new(self)
72    }
73    #[doc = "Bit 29 - Clock Ready"]
74    #[inline(always)]
75    #[must_use]
76    pub fn clkrdy(&mut self) -> CLKRDY_W<29> {
77        CLKRDY_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Status Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scr](index.html) module"]
87pub struct SCR_SPEC;
88impl crate::RegisterSpec for SCR_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [scr::W](W) writer structure"]
92impl crate::Writable for SCR_SPEC {
93    type Writer = W;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
97#[doc = "`reset()` method sets SCR to value 0"]
98impl crate::Resettable for SCR_SPEC {
99    const RESET_VALUE: Self::Ux = 0;
100}
atsam4lc2c_pac/ast/scr.rs

atsam4lc2c_pac/ast/
scr.rs
