Expand description

Performance Control Register

Structs

Field CH0EN reader - Channel 0 Enabled

Field CH0EN writer - Channel 0 Enabled

Field CH0OF reader - Channel 0 Overflow Freeze

Field CH0OF writer - Channel 0 Overflow Freeze

Field CH0RES reader - Channel 0 counter reset

Field CH0RES writer - Channel 0 counter reset

Field CH1EN reader - Channel 1 Enabled.

Field CH1EN writer - Channel 1 Enabled.

Field CH1OF reader - Channel 1 overflow freeze

Field CH1OF writer - Channel 1 overflow freeze

Field CH1RES reader - Channel 1 counter reset

Field CH1RES writer - Channel 1 counter reset

Field MON0CH reader - PDCA Channel to monitor with counter 0

Field MON0CH writer - PDCA Channel to monitor with counter 0

Field MON1CH reader - PDCA Channel to monitor with counter 1

Field MON1CH writer - PDCA Channel to monitor with counter 1

Performance Control Register

Register PCONTROL reader

Register PCONTROL writer