atsam4lc2a_pac/twis0/
ier.rs

1#[doc = "Register `IER` writer"]
2pub struct W(crate::W<IER_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IER_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IER_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IER_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXRDY` writer - RX Buffer Ready"]
23pub type RXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
24#[doc = "Field `TXRDY` writer - TX Buffer Ready"]
25pub type TXRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
26#[doc = "Field `TCOMP` writer - Transmission Complete"]
27pub type TCOMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
28#[doc = "Field `URUN` writer - Underrun"]
29pub type URUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
30#[doc = "Field `ORUN` writer - Overrun"]
31pub type ORUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
32#[doc = "Field `NAK` writer - NAK Received"]
33pub type NAK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
34#[doc = "Field `SMBTOUT` writer - SMBus Timeout"]
35pub type SMBTOUT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
36#[doc = "Field `SMBPECERR` writer - SMBus PEC Error"]
37pub type SMBPECERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
38#[doc = "Field `BUSERR` writer - Bus Error"]
39pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
40#[doc = "Field `SAM` writer - Slave Address Match"]
41pub type SAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
42#[doc = "Field `GCM` writer - General Call Match"]
43pub type GCM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
44#[doc = "Field `SMBALERTM` writer - SMBus Alert Response Address Match"]
45pub type SMBALERTM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
46#[doc = "Field `SMBHHM` writer - SMBus Host Header Address Match"]
47pub type SMBHHM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
48#[doc = "Field `SMBDAM` writer - SMBus Default Address Match"]
49pub type SMBDAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
50#[doc = "Field `STO` writer - Stop Received"]
51pub type STO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
52#[doc = "Field `REP` writer - Repeated Start Received"]
53pub type REP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
54#[doc = "Field `BTF` writer - Byte Transfer Finished"]
55pub type BTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
56impl W {
57    #[doc = "Bit 0 - RX Buffer Ready"]
58    #[inline(always)]
59    #[must_use]
60    pub fn rxrdy(&mut self) -> RXRDY_W<0> {
61        RXRDY_W::new(self)
62    }
63    #[doc = "Bit 1 - TX Buffer Ready"]
64    #[inline(always)]
65    #[must_use]
66    pub fn txrdy(&mut self) -> TXRDY_W<1> {
67        TXRDY_W::new(self)
68    }
69    #[doc = "Bit 3 - Transmission Complete"]
70    #[inline(always)]
71    #[must_use]
72    pub fn tcomp(&mut self) -> TCOMP_W<3> {
73        TCOMP_W::new(self)
74    }
75    #[doc = "Bit 6 - Underrun"]
76    #[inline(always)]
77    #[must_use]
78    pub fn urun(&mut self) -> URUN_W<6> {
79        URUN_W::new(self)
80    }
81    #[doc = "Bit 7 - Overrun"]
82    #[inline(always)]
83    #[must_use]
84    pub fn orun(&mut self) -> ORUN_W<7> {
85        ORUN_W::new(self)
86    }
87    #[doc = "Bit 8 - NAK Received"]
88    #[inline(always)]
89    #[must_use]
90    pub fn nak(&mut self) -> NAK_W<8> {
91        NAK_W::new(self)
92    }
93    #[doc = "Bit 12 - SMBus Timeout"]
94    #[inline(always)]
95    #[must_use]
96    pub fn smbtout(&mut self) -> SMBTOUT_W<12> {
97        SMBTOUT_W::new(self)
98    }
99    #[doc = "Bit 13 - SMBus PEC Error"]
100    #[inline(always)]
101    #[must_use]
102    pub fn smbpecerr(&mut self) -> SMBPECERR_W<13> {
103        SMBPECERR_W::new(self)
104    }
105    #[doc = "Bit 14 - Bus Error"]
106    #[inline(always)]
107    #[must_use]
108    pub fn buserr(&mut self) -> BUSERR_W<14> {
109        BUSERR_W::new(self)
110    }
111    #[doc = "Bit 16 - Slave Address Match"]
112    #[inline(always)]
113    #[must_use]
114    pub fn sam(&mut self) -> SAM_W<16> {
115        SAM_W::new(self)
116    }
117    #[doc = "Bit 17 - General Call Match"]
118    #[inline(always)]
119    #[must_use]
120    pub fn gcm(&mut self) -> GCM_W<17> {
121        GCM_W::new(self)
122    }
123    #[doc = "Bit 18 - SMBus Alert Response Address Match"]
124    #[inline(always)]
125    #[must_use]
126    pub fn smbalertm(&mut self) -> SMBALERTM_W<18> {
127        SMBALERTM_W::new(self)
128    }
129    #[doc = "Bit 19 - SMBus Host Header Address Match"]
130    #[inline(always)]
131    #[must_use]
132    pub fn smbhhm(&mut self) -> SMBHHM_W<19> {
133        SMBHHM_W::new(self)
134    }
135    #[doc = "Bit 20 - SMBus Default Address Match"]
136    #[inline(always)]
137    #[must_use]
138    pub fn smbdam(&mut self) -> SMBDAM_W<20> {
139        SMBDAM_W::new(self)
140    }
141    #[doc = "Bit 21 - Stop Received"]
142    #[inline(always)]
143    #[must_use]
144    pub fn sto(&mut self) -> STO_W<21> {
145        STO_W::new(self)
146    }
147    #[doc = "Bit 22 - Repeated Start Received"]
148    #[inline(always)]
149    #[must_use]
150    pub fn rep(&mut self) -> REP_W<22> {
151        REP_W::new(self)
152    }
153    #[doc = "Bit 23 - Byte Transfer Finished"]
154    #[inline(always)]
155    #[must_use]
156    pub fn btf(&mut self) -> BTF_W<23> {
157        BTF_W::new(self)
158    }
159    #[doc = "Writes raw bits to the register."]
160    #[inline(always)]
161    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
162        self.0.bits(bits);
163        self
164    }
165}
166#[doc = "Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](index.html) module"]
167pub struct IER_SPEC;
168impl crate::RegisterSpec for IER_SPEC {
169    type Ux = u32;
170}
171#[doc = "`write(|w| ..)` method takes [ier::W](W) writer structure"]
172impl crate::Writable for IER_SPEC {
173    type Writer = W;
174    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
175    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
176}
177#[doc = "`reset()` method sets IER to value 0"]
178impl crate::Resettable for IER_SPEC {
179    const RESET_VALUE: Self::Ux = 0;
180}