atsam4e8e_pac/twi0/
sr.rs

1#[doc = "Register `SR` reader"]
2pub struct R(crate::R<SR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `TXCOMP` reader - Transmission Completed (automatically set / reset)"]
17pub type TXCOMP_R = crate::BitReader<bool>;
18#[doc = "Field `RXRDY` reader - Receive Holding Register Ready (automatically set / reset)"]
19pub type RXRDY_R = crate::BitReader<bool>;
20#[doc = "Field `TXRDY` reader - Transmit Holding Register Ready (automatically set / reset)"]
21pub type TXRDY_R = crate::BitReader<bool>;
22#[doc = "Field `SVREAD` reader - Slave Read (automatically set / reset)"]
23pub type SVREAD_R = crate::BitReader<bool>;
24#[doc = "Field `SVACC` reader - Slave Access (automatically set / reset)"]
25pub type SVACC_R = crate::BitReader<bool>;
26#[doc = "Field `GACC` reader - General Call Access (clear on read)"]
27pub type GACC_R = crate::BitReader<bool>;
28#[doc = "Field `OVRE` reader - Overrun Error (clear on read)"]
29pub type OVRE_R = crate::BitReader<bool>;
30#[doc = "Field `NACK` reader - Not Acknowledged (clear on read)"]
31pub type NACK_R = crate::BitReader<bool>;
32#[doc = "Field `ARBLST` reader - Arbitration Lost (clear on read)"]
33pub type ARBLST_R = crate::BitReader<bool>;
34#[doc = "Field `SCLWS` reader - Clock Wait State (automatically set / reset)"]
35pub type SCLWS_R = crate::BitReader<bool>;
36#[doc = "Field `EOSACC` reader - End Of Slave Access (clear on read)"]
37pub type EOSACC_R = crate::BitReader<bool>;
38#[doc = "Field `ENDRX` reader - End of RX buffer"]
39pub type ENDRX_R = crate::BitReader<bool>;
40#[doc = "Field `ENDTX` reader - End of TX buffer"]
41pub type ENDTX_R = crate::BitReader<bool>;
42#[doc = "Field `RXBUFF` reader - RX Buffer Full"]
43pub type RXBUFF_R = crate::BitReader<bool>;
44#[doc = "Field `TXBUFE` reader - TX Buffer Empty"]
45pub type TXBUFE_R = crate::BitReader<bool>;
46impl R {
47    #[doc = "Bit 0 - Transmission Completed (automatically set / reset)"]
48    #[inline(always)]
49    pub fn txcomp(&self) -> TXCOMP_R {
50        TXCOMP_R::new((self.bits & 1) != 0)
51    }
52    #[doc = "Bit 1 - Receive Holding Register Ready (automatically set / reset)"]
53    #[inline(always)]
54    pub fn rxrdy(&self) -> RXRDY_R {
55        RXRDY_R::new(((self.bits >> 1) & 1) != 0)
56    }
57    #[doc = "Bit 2 - Transmit Holding Register Ready (automatically set / reset)"]
58    #[inline(always)]
59    pub fn txrdy(&self) -> TXRDY_R {
60        TXRDY_R::new(((self.bits >> 2) & 1) != 0)
61    }
62    #[doc = "Bit 3 - Slave Read (automatically set / reset)"]
63    #[inline(always)]
64    pub fn svread(&self) -> SVREAD_R {
65        SVREAD_R::new(((self.bits >> 3) & 1) != 0)
66    }
67    #[doc = "Bit 4 - Slave Access (automatically set / reset)"]
68    #[inline(always)]
69    pub fn svacc(&self) -> SVACC_R {
70        SVACC_R::new(((self.bits >> 4) & 1) != 0)
71    }
72    #[doc = "Bit 5 - General Call Access (clear on read)"]
73    #[inline(always)]
74    pub fn gacc(&self) -> GACC_R {
75        GACC_R::new(((self.bits >> 5) & 1) != 0)
76    }
77    #[doc = "Bit 6 - Overrun Error (clear on read)"]
78    #[inline(always)]
79    pub fn ovre(&self) -> OVRE_R {
80        OVRE_R::new(((self.bits >> 6) & 1) != 0)
81    }
82    #[doc = "Bit 8 - Not Acknowledged (clear on read)"]
83    #[inline(always)]
84    pub fn nack(&self) -> NACK_R {
85        NACK_R::new(((self.bits >> 8) & 1) != 0)
86    }
87    #[doc = "Bit 9 - Arbitration Lost (clear on read)"]
88    #[inline(always)]
89    pub fn arblst(&self) -> ARBLST_R {
90        ARBLST_R::new(((self.bits >> 9) & 1) != 0)
91    }
92    #[doc = "Bit 10 - Clock Wait State (automatically set / reset)"]
93    #[inline(always)]
94    pub fn sclws(&self) -> SCLWS_R {
95        SCLWS_R::new(((self.bits >> 10) & 1) != 0)
96    }
97    #[doc = "Bit 11 - End Of Slave Access (clear on read)"]
98    #[inline(always)]
99    pub fn eosacc(&self) -> EOSACC_R {
100        EOSACC_R::new(((self.bits >> 11) & 1) != 0)
101    }
102    #[doc = "Bit 12 - End of RX buffer"]
103    #[inline(always)]
104    pub fn endrx(&self) -> ENDRX_R {
105        ENDRX_R::new(((self.bits >> 12) & 1) != 0)
106    }
107    #[doc = "Bit 13 - End of TX buffer"]
108    #[inline(always)]
109    pub fn endtx(&self) -> ENDTX_R {
110        ENDTX_R::new(((self.bits >> 13) & 1) != 0)
111    }
112    #[doc = "Bit 14 - RX Buffer Full"]
113    #[inline(always)]
114    pub fn rxbuff(&self) -> RXBUFF_R {
115        RXBUFF_R::new(((self.bits >> 14) & 1) != 0)
116    }
117    #[doc = "Bit 15 - TX Buffer Empty"]
118    #[inline(always)]
119    pub fn txbufe(&self) -> TXBUFE_R {
120        TXBUFE_R::new(((self.bits >> 15) & 1) != 0)
121    }
122}
123#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](index.html) module"]
124pub struct SR_SPEC;
125impl crate::RegisterSpec for SR_SPEC {
126    type Ux = u32;
127}
128#[doc = "`read()` method returns [sr::R](R) reader structure"]
129impl crate::Readable for SR_SPEC {
130    type Reader = R;
131}
132#[doc = "`reset()` method sets SR to value 0xf009"]
133impl crate::Resettable for SR_SPEC {
134    const RESET_VALUE: Self::Ux = 0xf009;
135}
atsam4e8e_pac/twi0/sr.rs

atsam4e8e_pac/twi0/
sr.rs
