1#[doc = "Register `SR2` reader"]
2pub struct R(crate::R<SR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `COVFS` reader - Counter Overflow Status"]
17pub type COVFS_R = crate::BitReader<bool>;
18#[doc = "Field `LOVRS` reader - Load Overrun Status"]
19pub type LOVRS_R = crate::BitReader<bool>;
20#[doc = "Field `CPAS` reader - RA Compare Status"]
21pub type CPAS_R = crate::BitReader<bool>;
22#[doc = "Field `CPBS` reader - RB Compare Status"]
23pub type CPBS_R = crate::BitReader<bool>;
24#[doc = "Field `CPCS` reader - RC Compare Status"]
25pub type CPCS_R = crate::BitReader<bool>;
26#[doc = "Field `LDRAS` reader - RA Loading Status"]
27pub type LDRAS_R = crate::BitReader<bool>;
28#[doc = "Field `LDRBS` reader - RB Loading Status"]
29pub type LDRBS_R = crate::BitReader<bool>;
30#[doc = "Field `ETRGS` reader - External Trigger Status"]
31pub type ETRGS_R = crate::BitReader<bool>;
32#[doc = "Field `ENDRX` reader - End of Receiver Transfer"]
33pub type ENDRX_R = crate::BitReader<bool>;
34#[doc = "Field `RXBUFF` reader - Reception Buffer Full"]
35pub type RXBUFF_R = crate::BitReader<bool>;
36#[doc = "Field `CLKSTA` reader - Clock Enabling Status"]
37pub type CLKSTA_R = crate::BitReader<bool>;
38#[doc = "Field `MTIOA` reader - TIOA Mirror"]
39pub type MTIOA_R = crate::BitReader<bool>;
40#[doc = "Field `MTIOB` reader - TIOB Mirror"]
41pub type MTIOB_R = crate::BitReader<bool>;
42impl R {
43 #[doc = "Bit 0 - Counter Overflow Status"]
44 #[inline(always)]
45 pub fn covfs(&self) -> COVFS_R {
46 COVFS_R::new((self.bits & 1) != 0)
47 }
48 #[doc = "Bit 1 - Load Overrun Status"]
49 #[inline(always)]
50 pub fn lovrs(&self) -> LOVRS_R {
51 LOVRS_R::new(((self.bits >> 1) & 1) != 0)
52 }
53 #[doc = "Bit 2 - RA Compare Status"]
54 #[inline(always)]
55 pub fn cpas(&self) -> CPAS_R {
56 CPAS_R::new(((self.bits >> 2) & 1) != 0)
57 }
58 #[doc = "Bit 3 - RB Compare Status"]
59 #[inline(always)]
60 pub fn cpbs(&self) -> CPBS_R {
61 CPBS_R::new(((self.bits >> 3) & 1) != 0)
62 }
63 #[doc = "Bit 4 - RC Compare Status"]
64 #[inline(always)]
65 pub fn cpcs(&self) -> CPCS_R {
66 CPCS_R::new(((self.bits >> 4) & 1) != 0)
67 }
68 #[doc = "Bit 5 - RA Loading Status"]
69 #[inline(always)]
70 pub fn ldras(&self) -> LDRAS_R {
71 LDRAS_R::new(((self.bits >> 5) & 1) != 0)
72 }
73 #[doc = "Bit 6 - RB Loading Status"]
74 #[inline(always)]
75 pub fn ldrbs(&self) -> LDRBS_R {
76 LDRBS_R::new(((self.bits >> 6) & 1) != 0)
77 }
78 #[doc = "Bit 7 - External Trigger Status"]
79 #[inline(always)]
80 pub fn etrgs(&self) -> ETRGS_R {
81 ETRGS_R::new(((self.bits >> 7) & 1) != 0)
82 }
83 #[doc = "Bit 8 - End of Receiver Transfer"]
84 #[inline(always)]
85 pub fn endrx(&self) -> ENDRX_R {
86 ENDRX_R::new(((self.bits >> 8) & 1) != 0)
87 }
88 #[doc = "Bit 9 - Reception Buffer Full"]
89 #[inline(always)]
90 pub fn rxbuff(&self) -> RXBUFF_R {
91 RXBUFF_R::new(((self.bits >> 9) & 1) != 0)
92 }
93 #[doc = "Bit 16 - Clock Enabling Status"]
94 #[inline(always)]
95 pub fn clksta(&self) -> CLKSTA_R {
96 CLKSTA_R::new(((self.bits >> 16) & 1) != 0)
97 }
98 #[doc = "Bit 17 - TIOA Mirror"]
99 #[inline(always)]
100 pub fn mtioa(&self) -> MTIOA_R {
101 MTIOA_R::new(((self.bits >> 17) & 1) != 0)
102 }
103 #[doc = "Bit 18 - TIOB Mirror"]
104 #[inline(always)]
105 pub fn mtiob(&self) -> MTIOB_R {
106 MTIOB_R::new(((self.bits >> 18) & 1) != 0)
107 }
108}
109#[doc = "Status Register (channel = 2)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr2](index.html) module"]
110pub struct SR2_SPEC;
111impl crate::RegisterSpec for SR2_SPEC {
112 type Ux = u32;
113}
114#[doc = "`read()` method returns [sr2::R](R) reader structure"]
115impl crate::Readable for SR2_SPEC {
116 type Reader = R;
117}
118#[doc = "`reset()` method sets SR2 to value 0"]
119impl crate::Resettable for SR2_SPEC {
120 const RESET_VALUE: Self::Ux = 0;
121}