1#[doc = "Register `IER` writer"]
2pub struct W(crate::W<IER_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<IER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<IER_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<IER_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `EOC0` writer - End of Conversion Interrupt Enable 0"]
23pub type EOC0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
24#[doc = "Field `EOC1` writer - End of Conversion Interrupt Enable 1"]
25pub type EOC1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
26#[doc = "Field `EOC2` writer - End of Conversion Interrupt Enable 2"]
27pub type EOC2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
28#[doc = "Field `EOC3` writer - End of Conversion Interrupt Enable 3"]
29pub type EOC3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
30#[doc = "Field `EOC4` writer - End of Conversion Interrupt Enable 4"]
31pub type EOC4_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
32#[doc = "Field `EOC5` writer - End of Conversion Interrupt Enable 5"]
33pub type EOC5_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
34#[doc = "Field `EOC6` writer - End of Conversion Interrupt Enable 6"]
35pub type EOC6_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
36#[doc = "Field `EOC7` writer - End of Conversion Interrupt Enable 7"]
37pub type EOC7_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
38#[doc = "Field `EOC8` writer - End of Conversion Interrupt Enable 8"]
39pub type EOC8_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
40#[doc = "Field `EOC9` writer - End of Conversion Interrupt Enable 9"]
41pub type EOC9_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
42#[doc = "Field `EOC10` writer - End of Conversion Interrupt Enable 10"]
43pub type EOC10_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
44#[doc = "Field `EOC11` writer - End of Conversion Interrupt Enable 11"]
45pub type EOC11_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
46#[doc = "Field `EOC12` writer - End of Conversion Interrupt Enable 12"]
47pub type EOC12_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
48#[doc = "Field `EOC13` writer - End of Conversion Interrupt Enable 13"]
49pub type EOC13_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
50#[doc = "Field `EOC14` writer - End of Conversion Interrupt Enable 14"]
51pub type EOC14_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
52#[doc = "Field `EOC15` writer - End of Conversion Interrupt Enable 15"]
53pub type EOC15_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
54#[doc = "Field `DRDY` writer - Data Ready Interrupt Enable"]
55pub type DRDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
56#[doc = "Field `GOVRE` writer - General Overrun Error Interrupt Enable"]
57pub type GOVRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
58#[doc = "Field `COMPE` writer - Comparison Event Interrupt Enable"]
59pub type COMPE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
60#[doc = "Field `ENDRX` writer - End of Receive Buffer Interrupt Enable"]
61pub type ENDRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
62#[doc = "Field `RXBUFF` writer - Receive Buffer Full Interrupt Enable"]
63pub type RXBUFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
64#[doc = "Field `TEMPCHG` writer - Temperature Change Interrupt Enable"]
65pub type TEMPCHG_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
66#[doc = "Field `EOCAL` writer - End of Calibration Sequence Interrupt Enable"]
67pub type EOCAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER_SPEC, bool, O>;
68impl W {
69 #[doc = "Bit 0 - End of Conversion Interrupt Enable 0"]
70 #[inline(always)]
71 #[must_use]
72 pub fn eoc0(&mut self) -> EOC0_W<0> {
73 EOC0_W::new(self)
74 }
75 #[doc = "Bit 1 - End of Conversion Interrupt Enable 1"]
76 #[inline(always)]
77 #[must_use]
78 pub fn eoc1(&mut self) -> EOC1_W<1> {
79 EOC1_W::new(self)
80 }
81 #[doc = "Bit 2 - End of Conversion Interrupt Enable 2"]
82 #[inline(always)]
83 #[must_use]
84 pub fn eoc2(&mut self) -> EOC2_W<2> {
85 EOC2_W::new(self)
86 }
87 #[doc = "Bit 3 - End of Conversion Interrupt Enable 3"]
88 #[inline(always)]
89 #[must_use]
90 pub fn eoc3(&mut self) -> EOC3_W<3> {
91 EOC3_W::new(self)
92 }
93 #[doc = "Bit 4 - End of Conversion Interrupt Enable 4"]
94 #[inline(always)]
95 #[must_use]
96 pub fn eoc4(&mut self) -> EOC4_W<4> {
97 EOC4_W::new(self)
98 }
99 #[doc = "Bit 5 - End of Conversion Interrupt Enable 5"]
100 #[inline(always)]
101 #[must_use]
102 pub fn eoc5(&mut self) -> EOC5_W<5> {
103 EOC5_W::new(self)
104 }
105 #[doc = "Bit 6 - End of Conversion Interrupt Enable 6"]
106 #[inline(always)]
107 #[must_use]
108 pub fn eoc6(&mut self) -> EOC6_W<6> {
109 EOC6_W::new(self)
110 }
111 #[doc = "Bit 7 - End of Conversion Interrupt Enable 7"]
112 #[inline(always)]
113 #[must_use]
114 pub fn eoc7(&mut self) -> EOC7_W<7> {
115 EOC7_W::new(self)
116 }
117 #[doc = "Bit 8 - End of Conversion Interrupt Enable 8"]
118 #[inline(always)]
119 #[must_use]
120 pub fn eoc8(&mut self) -> EOC8_W<8> {
121 EOC8_W::new(self)
122 }
123 #[doc = "Bit 9 - End of Conversion Interrupt Enable 9"]
124 #[inline(always)]
125 #[must_use]
126 pub fn eoc9(&mut self) -> EOC9_W<9> {
127 EOC9_W::new(self)
128 }
129 #[doc = "Bit 10 - End of Conversion Interrupt Enable 10"]
130 #[inline(always)]
131 #[must_use]
132 pub fn eoc10(&mut self) -> EOC10_W<10> {
133 EOC10_W::new(self)
134 }
135 #[doc = "Bit 11 - End of Conversion Interrupt Enable 11"]
136 #[inline(always)]
137 #[must_use]
138 pub fn eoc11(&mut self) -> EOC11_W<11> {
139 EOC11_W::new(self)
140 }
141 #[doc = "Bit 12 - End of Conversion Interrupt Enable 12"]
142 #[inline(always)]
143 #[must_use]
144 pub fn eoc12(&mut self) -> EOC12_W<12> {
145 EOC12_W::new(self)
146 }
147 #[doc = "Bit 13 - End of Conversion Interrupt Enable 13"]
148 #[inline(always)]
149 #[must_use]
150 pub fn eoc13(&mut self) -> EOC13_W<13> {
151 EOC13_W::new(self)
152 }
153 #[doc = "Bit 14 - End of Conversion Interrupt Enable 14"]
154 #[inline(always)]
155 #[must_use]
156 pub fn eoc14(&mut self) -> EOC14_W<14> {
157 EOC14_W::new(self)
158 }
159 #[doc = "Bit 15 - End of Conversion Interrupt Enable 15"]
160 #[inline(always)]
161 #[must_use]
162 pub fn eoc15(&mut self) -> EOC15_W<15> {
163 EOC15_W::new(self)
164 }
165 #[doc = "Bit 24 - Data Ready Interrupt Enable"]
166 #[inline(always)]
167 #[must_use]
168 pub fn drdy(&mut self) -> DRDY_W<24> {
169 DRDY_W::new(self)
170 }
171 #[doc = "Bit 25 - General Overrun Error Interrupt Enable"]
172 #[inline(always)]
173 #[must_use]
174 pub fn govre(&mut self) -> GOVRE_W<25> {
175 GOVRE_W::new(self)
176 }
177 #[doc = "Bit 26 - Comparison Event Interrupt Enable"]
178 #[inline(always)]
179 #[must_use]
180 pub fn compe(&mut self) -> COMPE_W<26> {
181 COMPE_W::new(self)
182 }
183 #[doc = "Bit 27 - End of Receive Buffer Interrupt Enable"]
184 #[inline(always)]
185 #[must_use]
186 pub fn endrx(&mut self) -> ENDRX_W<27> {
187 ENDRX_W::new(self)
188 }
189 #[doc = "Bit 28 - Receive Buffer Full Interrupt Enable"]
190 #[inline(always)]
191 #[must_use]
192 pub fn rxbuff(&mut self) -> RXBUFF_W<28> {
193 RXBUFF_W::new(self)
194 }
195 #[doc = "Bit 30 - Temperature Change Interrupt Enable"]
196 #[inline(always)]
197 #[must_use]
198 pub fn tempchg(&mut self) -> TEMPCHG_W<30> {
199 TEMPCHG_W::new(self)
200 }
201 #[doc = "Bit 31 - End of Calibration Sequence Interrupt Enable"]
202 #[inline(always)]
203 #[must_use]
204 pub fn eocal(&mut self) -> EOCAL_W<31> {
205 EOCAL_W::new(self)
206 }
207 #[doc = "Writes raw bits to the register."]
208 #[inline(always)]
209 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
210 self.0.bits(bits);
211 self
212 }
213}
214#[doc = "AFEC Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](index.html) module"]
215pub struct IER_SPEC;
216impl crate::RegisterSpec for IER_SPEC {
217 type Ux = u32;
218}
219#[doc = "`write(|w| ..)` method takes [ier::W](W) writer structure"]
220impl crate::Writable for IER_SPEC {
221 type Writer = W;
222 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
223 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
224}