atsam4e8e_pac/dmac/
ctrlb3.rs

1#[doc = "Register `CTRLB3` reader"]
2pub struct R(crate::R<CTRLB3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLB3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLB3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLB3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLB3` writer"]
17pub struct W(crate::W<CTRLB3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLB3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLB3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLB3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SRC_DSCR` reader - Source Address Descriptor"]
38pub type SRC_DSCR_R = crate::BitReader<SRC_DSCR_A>;
39#[doc = "Source Address Descriptor\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SRC_DSCR_A {
42    #[doc = "0: Source address is updated when the descriptor is fetched from the memory."]
43    FETCH_FROM_MEM = 0,
44    #[doc = "1: Buffer Descriptor Fetch operation is disabled for the source."]
45    FETCH_DISABLE = 1,
46}
47impl From<SRC_DSCR_A> for bool {
48    #[inline(always)]
49    fn from(variant: SRC_DSCR_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SRC_DSCR_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SRC_DSCR_A {
57        match self.bits {
58            false => SRC_DSCR_A::FETCH_FROM_MEM,
59            true => SRC_DSCR_A::FETCH_DISABLE,
60        }
61    }
62    #[doc = "Checks if the value of the field is `FETCH_FROM_MEM`"]
63    #[inline(always)]
64    pub fn is_fetch_from_mem(&self) -> bool {
65        *self == SRC_DSCR_A::FETCH_FROM_MEM
66    }
67    #[doc = "Checks if the value of the field is `FETCH_DISABLE`"]
68    #[inline(always)]
69    pub fn is_fetch_disable(&self) -> bool {
70        *self == SRC_DSCR_A::FETCH_DISABLE
71    }
72}
73#[doc = "Field `SRC_DSCR` writer - Source Address Descriptor"]
74pub type SRC_DSCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB3_SPEC, SRC_DSCR_A, O>;
75impl<'a, const O: u8> SRC_DSCR_W<'a, O> {
76    #[doc = "Source address is updated when the descriptor is fetched from the memory."]
77    #[inline(always)]
78    pub fn fetch_from_mem(self) -> &'a mut W {
79        self.variant(SRC_DSCR_A::FETCH_FROM_MEM)
80    }
81    #[doc = "Buffer Descriptor Fetch operation is disabled for the source."]
82    #[inline(always)]
83    pub fn fetch_disable(self) -> &'a mut W {
84        self.variant(SRC_DSCR_A::FETCH_DISABLE)
85    }
86}
87#[doc = "Field `DST_DSCR` reader - Destination Address Descriptor"]
88pub type DST_DSCR_R = crate::BitReader<DST_DSCR_A>;
89#[doc = "Destination Address Descriptor\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum DST_DSCR_A {
92    #[doc = "0: Destination address is updated when the descriptor is fetched from the memory."]
93    FETCH_FROM_MEM = 0,
94    #[doc = "1: Buffer Descriptor Fetch operation is disabled for the destination."]
95    FETCH_DISABLE = 1,
96}
97impl From<DST_DSCR_A> for bool {
98    #[inline(always)]
99    fn from(variant: DST_DSCR_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl DST_DSCR_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> DST_DSCR_A {
107        match self.bits {
108            false => DST_DSCR_A::FETCH_FROM_MEM,
109            true => DST_DSCR_A::FETCH_DISABLE,
110        }
111    }
112    #[doc = "Checks if the value of the field is `FETCH_FROM_MEM`"]
113    #[inline(always)]
114    pub fn is_fetch_from_mem(&self) -> bool {
115        *self == DST_DSCR_A::FETCH_FROM_MEM
116    }
117    #[doc = "Checks if the value of the field is `FETCH_DISABLE`"]
118    #[inline(always)]
119    pub fn is_fetch_disable(&self) -> bool {
120        *self == DST_DSCR_A::FETCH_DISABLE
121    }
122}
123#[doc = "Field `DST_DSCR` writer - Destination Address Descriptor"]
124pub type DST_DSCR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB3_SPEC, DST_DSCR_A, O>;
125impl<'a, const O: u8> DST_DSCR_W<'a, O> {
126    #[doc = "Destination address is updated when the descriptor is fetched from the memory."]
127    #[inline(always)]
128    pub fn fetch_from_mem(self) -> &'a mut W {
129        self.variant(DST_DSCR_A::FETCH_FROM_MEM)
130    }
131    #[doc = "Buffer Descriptor Fetch operation is disabled for the destination."]
132    #[inline(always)]
133    pub fn fetch_disable(self) -> &'a mut W {
134        self.variant(DST_DSCR_A::FETCH_DISABLE)
135    }
136}
137#[doc = "Field `FC` reader - Flow Control"]
138pub type FC_R = crate::FieldReader<u8, FC_A>;
139#[doc = "Flow Control\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141#[repr(u8)]
142pub enum FC_A {
143    #[doc = "0: Memory-to-Memory Transfer DMAC is flow controller"]
144    MEM2MEM_DMA_FC = 0,
145    #[doc = "1: Memory-to-Peripheral Transfer DMAC is flow controller"]
146    MEM2PER_DMA_FC = 1,
147    #[doc = "2: Peripheral-to-Memory Transfer DMAC is flow controller"]
148    PER2MEM_DMA_FC = 2,
149    #[doc = "3: Peripheral-to-Peripheral Transfer DMAC is flow controller"]
150    PER2PER_DMA_FC = 3,
151}
152impl From<FC_A> for u8 {
153    #[inline(always)]
154    fn from(variant: FC_A) -> Self {
155        variant as _
156    }
157}
158impl FC_R {
159    #[doc = "Get enumerated values variant"]
160    #[inline(always)]
161    pub fn variant(&self) -> FC_A {
162        match self.bits {
163            0 => FC_A::MEM2MEM_DMA_FC,
164            1 => FC_A::MEM2PER_DMA_FC,
165            2 => FC_A::PER2MEM_DMA_FC,
166            3 => FC_A::PER2PER_DMA_FC,
167            _ => unreachable!(),
168        }
169    }
170    #[doc = "Checks if the value of the field is `MEM2MEM_DMA_FC`"]
171    #[inline(always)]
172    pub fn is_mem2mem_dma_fc(&self) -> bool {
173        *self == FC_A::MEM2MEM_DMA_FC
174    }
175    #[doc = "Checks if the value of the field is `MEM2PER_DMA_FC`"]
176    #[inline(always)]
177    pub fn is_mem2per_dma_fc(&self) -> bool {
178        *self == FC_A::MEM2PER_DMA_FC
179    }
180    #[doc = "Checks if the value of the field is `PER2MEM_DMA_FC`"]
181    #[inline(always)]
182    pub fn is_per2mem_dma_fc(&self) -> bool {
183        *self == FC_A::PER2MEM_DMA_FC
184    }
185    #[doc = "Checks if the value of the field is `PER2PER_DMA_FC`"]
186    #[inline(always)]
187    pub fn is_per2per_dma_fc(&self) -> bool {
188        *self == FC_A::PER2PER_DMA_FC
189    }
190}
191#[doc = "Field `FC` writer - Flow Control"]
192pub type FC_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRLB3_SPEC, u8, FC_A, 2, O>;
193impl<'a, const O: u8> FC_W<'a, O> {
194    #[doc = "Memory-to-Memory Transfer DMAC is flow controller"]
195    #[inline(always)]
196    pub fn mem2mem_dma_fc(self) -> &'a mut W {
197        self.variant(FC_A::MEM2MEM_DMA_FC)
198    }
199    #[doc = "Memory-to-Peripheral Transfer DMAC is flow controller"]
200    #[inline(always)]
201    pub fn mem2per_dma_fc(self) -> &'a mut W {
202        self.variant(FC_A::MEM2PER_DMA_FC)
203    }
204    #[doc = "Peripheral-to-Memory Transfer DMAC is flow controller"]
205    #[inline(always)]
206    pub fn per2mem_dma_fc(self) -> &'a mut W {
207        self.variant(FC_A::PER2MEM_DMA_FC)
208    }
209    #[doc = "Peripheral-to-Peripheral Transfer DMAC is flow controller"]
210    #[inline(always)]
211    pub fn per2per_dma_fc(self) -> &'a mut W {
212        self.variant(FC_A::PER2PER_DMA_FC)
213    }
214}
215#[doc = "Field `SRC_INCR` reader - Incrementing, Decrementing or Fixed Address for the Source"]
216pub type SRC_INCR_R = crate::FieldReader<u8, SRC_INCR_A>;
217#[doc = "Incrementing, Decrementing or Fixed Address for the Source\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219#[repr(u8)]
220pub enum SRC_INCR_A {
221    #[doc = "0: The source address is incremented"]
222    INCREMENTING = 0,
223    #[doc = "1: The source address is decremented"]
224    DECREMENTING = 1,
225    #[doc = "2: The source address remains unchanged"]
226    FIXED = 2,
227}
228impl From<SRC_INCR_A> for u8 {
229    #[inline(always)]
230    fn from(variant: SRC_INCR_A) -> Self {
231        variant as _
232    }
233}
234impl SRC_INCR_R {
235    #[doc = "Get enumerated values variant"]
236    #[inline(always)]
237    pub fn variant(&self) -> Option<SRC_INCR_A> {
238        match self.bits {
239            0 => Some(SRC_INCR_A::INCREMENTING),
240            1 => Some(SRC_INCR_A::DECREMENTING),
241            2 => Some(SRC_INCR_A::FIXED),
242            _ => None,
243        }
244    }
245    #[doc = "Checks if the value of the field is `INCREMENTING`"]
246    #[inline(always)]
247    pub fn is_incrementing(&self) -> bool {
248        *self == SRC_INCR_A::INCREMENTING
249    }
250    #[doc = "Checks if the value of the field is `DECREMENTING`"]
251    #[inline(always)]
252    pub fn is_decrementing(&self) -> bool {
253        *self == SRC_INCR_A::DECREMENTING
254    }
255    #[doc = "Checks if the value of the field is `FIXED`"]
256    #[inline(always)]
257    pub fn is_fixed(&self) -> bool {
258        *self == SRC_INCR_A::FIXED
259    }
260}
261#[doc = "Field `SRC_INCR` writer - Incrementing, Decrementing or Fixed Address for the Source"]
262pub type SRC_INCR_W<'a, const O: u8> =
263    crate::FieldWriter<'a, u32, CTRLB3_SPEC, u8, SRC_INCR_A, 2, O>;
264impl<'a, const O: u8> SRC_INCR_W<'a, O> {
265    #[doc = "The source address is incremented"]
266    #[inline(always)]
267    pub fn incrementing(self) -> &'a mut W {
268        self.variant(SRC_INCR_A::INCREMENTING)
269    }
270    #[doc = "The source address is decremented"]
271    #[inline(always)]
272    pub fn decrementing(self) -> &'a mut W {
273        self.variant(SRC_INCR_A::DECREMENTING)
274    }
275    #[doc = "The source address remains unchanged"]
276    #[inline(always)]
277    pub fn fixed(self) -> &'a mut W {
278        self.variant(SRC_INCR_A::FIXED)
279    }
280}
281#[doc = "Field `DST_INCR` reader - Incrementing, Decrementing or Fixed Address for the Destination"]
282pub type DST_INCR_R = crate::FieldReader<u8, DST_INCR_A>;
283#[doc = "Incrementing, Decrementing or Fixed Address for the Destination\n\nValue on reset: 0"]
284#[derive(Clone, Copy, Debug, PartialEq, Eq)]
285#[repr(u8)]
286pub enum DST_INCR_A {
287    #[doc = "0: The destination address is incremented"]
288    INCREMENTING = 0,
289    #[doc = "1: The destination address is decremented"]
290    DECREMENTING = 1,
291    #[doc = "2: The destination address remains unchanged"]
292    FIXED = 2,
293}
294impl From<DST_INCR_A> for u8 {
295    #[inline(always)]
296    fn from(variant: DST_INCR_A) -> Self {
297        variant as _
298    }
299}
300impl DST_INCR_R {
301    #[doc = "Get enumerated values variant"]
302    #[inline(always)]
303    pub fn variant(&self) -> Option<DST_INCR_A> {
304        match self.bits {
305            0 => Some(DST_INCR_A::INCREMENTING),
306            1 => Some(DST_INCR_A::DECREMENTING),
307            2 => Some(DST_INCR_A::FIXED),
308            _ => None,
309        }
310    }
311    #[doc = "Checks if the value of the field is `INCREMENTING`"]
312    #[inline(always)]
313    pub fn is_incrementing(&self) -> bool {
314        *self == DST_INCR_A::INCREMENTING
315    }
316    #[doc = "Checks if the value of the field is `DECREMENTING`"]
317    #[inline(always)]
318    pub fn is_decrementing(&self) -> bool {
319        *self == DST_INCR_A::DECREMENTING
320    }
321    #[doc = "Checks if the value of the field is `FIXED`"]
322    #[inline(always)]
323    pub fn is_fixed(&self) -> bool {
324        *self == DST_INCR_A::FIXED
325    }
326}
327#[doc = "Field `DST_INCR` writer - Incrementing, Decrementing or Fixed Address for the Destination"]
328pub type DST_INCR_W<'a, const O: u8> =
329    crate::FieldWriter<'a, u32, CTRLB3_SPEC, u8, DST_INCR_A, 2, O>;
330impl<'a, const O: u8> DST_INCR_W<'a, O> {
331    #[doc = "The destination address is incremented"]
332    #[inline(always)]
333    pub fn incrementing(self) -> &'a mut W {
334        self.variant(DST_INCR_A::INCREMENTING)
335    }
336    #[doc = "The destination address is decremented"]
337    #[inline(always)]
338    pub fn decrementing(self) -> &'a mut W {
339        self.variant(DST_INCR_A::DECREMENTING)
340    }
341    #[doc = "The destination address remains unchanged"]
342    #[inline(always)]
343    pub fn fixed(self) -> &'a mut W {
344        self.variant(DST_INCR_A::FIXED)
345    }
346}
347#[doc = "Field `IEN` reader - Interrupt Enable Not"]
348pub type IEN_R = crate::BitReader<bool>;
349#[doc = "Field `IEN` writer - Interrupt Enable Not"]
350pub type IEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLB3_SPEC, bool, O>;
351impl R {
352    #[doc = "Bit 16 - Source Address Descriptor"]
353    #[inline(always)]
354    pub fn src_dscr(&self) -> SRC_DSCR_R {
355        SRC_DSCR_R::new(((self.bits >> 16) & 1) != 0)
356    }
357    #[doc = "Bit 20 - Destination Address Descriptor"]
358    #[inline(always)]
359    pub fn dst_dscr(&self) -> DST_DSCR_R {
360        DST_DSCR_R::new(((self.bits >> 20) & 1) != 0)
361    }
362    #[doc = "Bits 21:22 - Flow Control"]
363    #[inline(always)]
364    pub fn fc(&self) -> FC_R {
365        FC_R::new(((self.bits >> 21) & 3) as u8)
366    }
367    #[doc = "Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source"]
368    #[inline(always)]
369    pub fn src_incr(&self) -> SRC_INCR_R {
370        SRC_INCR_R::new(((self.bits >> 24) & 3) as u8)
371    }
372    #[doc = "Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination"]
373    #[inline(always)]
374    pub fn dst_incr(&self) -> DST_INCR_R {
375        DST_INCR_R::new(((self.bits >> 28) & 3) as u8)
376    }
377    #[doc = "Bit 30 - Interrupt Enable Not"]
378    #[inline(always)]
379    pub fn ien(&self) -> IEN_R {
380        IEN_R::new(((self.bits >> 30) & 1) != 0)
381    }
382}
383impl W {
384    #[doc = "Bit 16 - Source Address Descriptor"]
385    #[inline(always)]
386    #[must_use]
387    pub fn src_dscr(&mut self) -> SRC_DSCR_W<16> {
388        SRC_DSCR_W::new(self)
389    }
390    #[doc = "Bit 20 - Destination Address Descriptor"]
391    #[inline(always)]
392    #[must_use]
393    pub fn dst_dscr(&mut self) -> DST_DSCR_W<20> {
394        DST_DSCR_W::new(self)
395    }
396    #[doc = "Bits 21:22 - Flow Control"]
397    #[inline(always)]
398    #[must_use]
399    pub fn fc(&mut self) -> FC_W<21> {
400        FC_W::new(self)
401    }
402    #[doc = "Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source"]
403    #[inline(always)]
404    #[must_use]
405    pub fn src_incr(&mut self) -> SRC_INCR_W<24> {
406        SRC_INCR_W::new(self)
407    }
408    #[doc = "Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination"]
409    #[inline(always)]
410    #[must_use]
411    pub fn dst_incr(&mut self) -> DST_INCR_W<28> {
412        DST_INCR_W::new(self)
413    }
414    #[doc = "Bit 30 - Interrupt Enable Not"]
415    #[inline(always)]
416    #[must_use]
417    pub fn ien(&mut self) -> IEN_W<30> {
418        IEN_W::new(self)
419    }
420    #[doc = "Writes raw bits to the register."]
421    #[inline(always)]
422    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
423        self.0.bits(bits);
424        self
425    }
426}
427#[doc = "DMAC Channel Control B Register (ch_num = 3)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb3](index.html) module"]
428pub struct CTRLB3_SPEC;
429impl crate::RegisterSpec for CTRLB3_SPEC {
430    type Ux = u32;
431}
432#[doc = "`read()` method returns [ctrlb3::R](R) reader structure"]
433impl crate::Readable for CTRLB3_SPEC {
434    type Reader = R;
435}
436#[doc = "`write(|w| ..)` method takes [ctrlb3::W](W) writer structure"]
437impl crate::Writable for CTRLB3_SPEC {
438    type Writer = W;
439    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
440    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
441}
442#[doc = "`reset()` method sets CTRLB3 to value 0"]
443impl crate::Resettable for CTRLB3_SPEC {
444    const RESET_VALUE: Self::Ux = 0;
445}
atsam4e8e_pac/dmac/ctrlb3.rs

atsam4e8e_pac/dmac/
ctrlb3.rs
