atsam4e8c_pac/dmac/
ctrla1.rs

1#[doc = "Register `CTRLA1` reader"]
2pub struct R(crate::R<CTRLA1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLA1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLA1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLA1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLA1` writer"]
17pub struct W(crate::W<CTRLA1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLA1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLA1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLA1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BTSIZE` reader - Buffer Transfer Size"]
38pub type BTSIZE_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `BTSIZE` writer - Buffer Transfer Size"]
40pub type BTSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRLA1_SPEC, u16, u16, 16, O>;
41#[doc = "Field `SRC_WIDTH` reader - Transfer Width for the Source"]
42pub type SRC_WIDTH_R = crate::FieldReader<u8, SRC_WIDTH_A>;
43#[doc = "Transfer Width for the Source\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum SRC_WIDTH_A {
47    #[doc = "0: the transfer size is set to 8-bit width"]
48    BYTE = 0,
49    #[doc = "1: the transfer size is set to 16-bit width"]
50    HALF_WORD = 1,
51    #[doc = "2: the transfer size is set to 32-bit width"]
52    WORD = 2,
53}
54impl From<SRC_WIDTH_A> for u8 {
55    #[inline(always)]
56    fn from(variant: SRC_WIDTH_A) -> Self {
57        variant as _
58    }
59}
60impl SRC_WIDTH_R {
61    #[doc = "Get enumerated values variant"]
62    #[inline(always)]
63    pub fn variant(&self) -> Option<SRC_WIDTH_A> {
64        match self.bits {
65            0 => Some(SRC_WIDTH_A::BYTE),
66            1 => Some(SRC_WIDTH_A::HALF_WORD),
67            2 => Some(SRC_WIDTH_A::WORD),
68            _ => None,
69        }
70    }
71    #[doc = "Checks if the value of the field is `BYTE`"]
72    #[inline(always)]
73    pub fn is_byte(&self) -> bool {
74        *self == SRC_WIDTH_A::BYTE
75    }
76    #[doc = "Checks if the value of the field is `HALF_WORD`"]
77    #[inline(always)]
78    pub fn is_half_word(&self) -> bool {
79        *self == SRC_WIDTH_A::HALF_WORD
80    }
81    #[doc = "Checks if the value of the field is `WORD`"]
82    #[inline(always)]
83    pub fn is_word(&self) -> bool {
84        *self == SRC_WIDTH_A::WORD
85    }
86}
87#[doc = "Field `SRC_WIDTH` writer - Transfer Width for the Source"]
88pub type SRC_WIDTH_W<'a, const O: u8> =
89    crate::FieldWriter<'a, u32, CTRLA1_SPEC, u8, SRC_WIDTH_A, 2, O>;
90impl<'a, const O: u8> SRC_WIDTH_W<'a, O> {
91    #[doc = "the transfer size is set to 8-bit width"]
92    #[inline(always)]
93    pub fn byte(self) -> &'a mut W {
94        self.variant(SRC_WIDTH_A::BYTE)
95    }
96    #[doc = "the transfer size is set to 16-bit width"]
97    #[inline(always)]
98    pub fn half_word(self) -> &'a mut W {
99        self.variant(SRC_WIDTH_A::HALF_WORD)
100    }
101    #[doc = "the transfer size is set to 32-bit width"]
102    #[inline(always)]
103    pub fn word(self) -> &'a mut W {
104        self.variant(SRC_WIDTH_A::WORD)
105    }
106}
107#[doc = "Field `DST_WIDTH` reader - Transfer Width for the Destination"]
108pub type DST_WIDTH_R = crate::FieldReader<u8, DST_WIDTH_A>;
109#[doc = "Transfer Width for the Destination\n\nValue on reset: 0"]
110#[derive(Clone, Copy, Debug, PartialEq, Eq)]
111#[repr(u8)]
112pub enum DST_WIDTH_A {
113    #[doc = "0: the transfer size is set to 8-bit width"]
114    BYTE = 0,
115    #[doc = "1: the transfer size is set to 16-bit width"]
116    HALF_WORD = 1,
117    #[doc = "2: the transfer size is set to 32-bit width"]
118    WORD = 2,
119}
120impl From<DST_WIDTH_A> for u8 {
121    #[inline(always)]
122    fn from(variant: DST_WIDTH_A) -> Self {
123        variant as _
124    }
125}
126impl DST_WIDTH_R {
127    #[doc = "Get enumerated values variant"]
128    #[inline(always)]
129    pub fn variant(&self) -> Option<DST_WIDTH_A> {
130        match self.bits {
131            0 => Some(DST_WIDTH_A::BYTE),
132            1 => Some(DST_WIDTH_A::HALF_WORD),
133            2 => Some(DST_WIDTH_A::WORD),
134            _ => None,
135        }
136    }
137    #[doc = "Checks if the value of the field is `BYTE`"]
138    #[inline(always)]
139    pub fn is_byte(&self) -> bool {
140        *self == DST_WIDTH_A::BYTE
141    }
142    #[doc = "Checks if the value of the field is `HALF_WORD`"]
143    #[inline(always)]
144    pub fn is_half_word(&self) -> bool {
145        *self == DST_WIDTH_A::HALF_WORD
146    }
147    #[doc = "Checks if the value of the field is `WORD`"]
148    #[inline(always)]
149    pub fn is_word(&self) -> bool {
150        *self == DST_WIDTH_A::WORD
151    }
152}
153#[doc = "Field `DST_WIDTH` writer - Transfer Width for the Destination"]
154pub type DST_WIDTH_W<'a, const O: u8> =
155    crate::FieldWriter<'a, u32, CTRLA1_SPEC, u8, DST_WIDTH_A, 2, O>;
156impl<'a, const O: u8> DST_WIDTH_W<'a, O> {
157    #[doc = "the transfer size is set to 8-bit width"]
158    #[inline(always)]
159    pub fn byte(self) -> &'a mut W {
160        self.variant(DST_WIDTH_A::BYTE)
161    }
162    #[doc = "the transfer size is set to 16-bit width"]
163    #[inline(always)]
164    pub fn half_word(self) -> &'a mut W {
165        self.variant(DST_WIDTH_A::HALF_WORD)
166    }
167    #[doc = "the transfer size is set to 32-bit width"]
168    #[inline(always)]
169    pub fn word(self) -> &'a mut W {
170        self.variant(DST_WIDTH_A::WORD)
171    }
172}
173#[doc = "Field `DONE` reader - Current Descriptor Stop Command and Transfer Completed Memory Indicator"]
174pub type DONE_R = crate::BitReader<bool>;
175#[doc = "Field `DONE` writer - Current Descriptor Stop Command and Transfer Completed Memory Indicator"]
176pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLA1_SPEC, bool, O>;
177impl R {
178    #[doc = "Bits 0:15 - Buffer Transfer Size"]
179    #[inline(always)]
180    pub fn btsize(&self) -> BTSIZE_R {
181        BTSIZE_R::new((self.bits & 0xffff) as u16)
182    }
183    #[doc = "Bits 24:25 - Transfer Width for the Source"]
184    #[inline(always)]
185    pub fn src_width(&self) -> SRC_WIDTH_R {
186        SRC_WIDTH_R::new(((self.bits >> 24) & 3) as u8)
187    }
188    #[doc = "Bits 28:29 - Transfer Width for the Destination"]
189    #[inline(always)]
190    pub fn dst_width(&self) -> DST_WIDTH_R {
191        DST_WIDTH_R::new(((self.bits >> 28) & 3) as u8)
192    }
193    #[doc = "Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator"]
194    #[inline(always)]
195    pub fn done(&self) -> DONE_R {
196        DONE_R::new(((self.bits >> 31) & 1) != 0)
197    }
198}
199impl W {
200    #[doc = "Bits 0:15 - Buffer Transfer Size"]
201    #[inline(always)]
202    #[must_use]
203    pub fn btsize(&mut self) -> BTSIZE_W<0> {
204        BTSIZE_W::new(self)
205    }
206    #[doc = "Bits 24:25 - Transfer Width for the Source"]
207    #[inline(always)]
208    #[must_use]
209    pub fn src_width(&mut self) -> SRC_WIDTH_W<24> {
210        SRC_WIDTH_W::new(self)
211    }
212    #[doc = "Bits 28:29 - Transfer Width for the Destination"]
213    #[inline(always)]
214    #[must_use]
215    pub fn dst_width(&mut self) -> DST_WIDTH_W<28> {
216        DST_WIDTH_W::new(self)
217    }
218    #[doc = "Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator"]
219    #[inline(always)]
220    #[must_use]
221    pub fn done(&mut self) -> DONE_W<31> {
222        DONE_W::new(self)
223    }
224    #[doc = "Writes raw bits to the register."]
225    #[inline(always)]
226    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227        self.0.bits(bits);
228        self
229    }
230}
231#[doc = "DMAC Channel Control A Register (ch_num = 1)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla1](index.html) module"]
232pub struct CTRLA1_SPEC;
233impl crate::RegisterSpec for CTRLA1_SPEC {
234    type Ux = u32;
235}
236#[doc = "`read()` method returns [ctrla1::R](R) reader structure"]
237impl crate::Readable for CTRLA1_SPEC {
238    type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [ctrla1::W](W) writer structure"]
241impl crate::Writable for CTRLA1_SPEC {
242    type Writer = W;
243    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245}
246#[doc = "`reset()` method sets CTRLA1 to value 0"]
247impl crate::Resettable for CTRLA1_SPEC {
248    const RESET_VALUE: Self::Ux = 0;
249}
atsam4e8c_pac/dmac/ctrla1.rs

atsam4e8c_pac/dmac/
ctrla1.rs
