atsam4e8c_pac/udp/
isr.rs

1#[doc = "Register `ISR` reader"]
2pub struct R(crate::R<ISR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ISR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ISR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ISR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `EP0INT` reader - Endpoint 0 Interrupt Status"]
17pub type EP0INT_R = crate::BitReader<bool>;
18#[doc = "Field `EP1INT` reader - Endpoint 1 Interrupt Status"]
19pub type EP1INT_R = crate::BitReader<bool>;
20#[doc = "Field `EP2INT` reader - Endpoint 2 Interrupt Status"]
21pub type EP2INT_R = crate::BitReader<bool>;
22#[doc = "Field `EP3INT` reader - Endpoint 3 Interrupt Status"]
23pub type EP3INT_R = crate::BitReader<bool>;
24#[doc = "Field `EP4INT` reader - Endpoint 4 Interrupt Status"]
25pub type EP4INT_R = crate::BitReader<bool>;
26#[doc = "Field `EP5INT` reader - Endpoint 5 Interrupt Status"]
27pub type EP5INT_R = crate::BitReader<bool>;
28#[doc = "Field `EP6INT` reader - Endpoint 6 Interrupt Status"]
29pub type EP6INT_R = crate::BitReader<bool>;
30#[doc = "Field `EP7INT` reader - Endpoint 7Interrupt Status"]
31pub type EP7INT_R = crate::BitReader<bool>;
32#[doc = "Field `RXSUSP` reader - UDP Suspend Interrupt Status"]
33pub type RXSUSP_R = crate::BitReader<bool>;
34#[doc = "Field `RXRSM` reader - UDP Resume Interrupt Status"]
35pub type RXRSM_R = crate::BitReader<bool>;
36#[doc = "Field `EXTRSM` reader - "]
37pub type EXTRSM_R = crate::BitReader<bool>;
38#[doc = "Field `SOFINT` reader - Start of Frame Interrupt Status"]
39pub type SOFINT_R = crate::BitReader<bool>;
40#[doc = "Field `ENDBUSRES` reader - End of BUS Reset Interrupt Status"]
41pub type ENDBUSRES_R = crate::BitReader<bool>;
42#[doc = "Field `WAKEUP` reader - UDP Resume Interrupt Status"]
43pub type WAKEUP_R = crate::BitReader<bool>;
44impl R {
45    #[doc = "Bit 0 - Endpoint 0 Interrupt Status"]
46    #[inline(always)]
47    pub fn ep0int(&self) -> EP0INT_R {
48        EP0INT_R::new((self.bits & 1) != 0)
49    }
50    #[doc = "Bit 1 - Endpoint 1 Interrupt Status"]
51    #[inline(always)]
52    pub fn ep1int(&self) -> EP1INT_R {
53        EP1INT_R::new(((self.bits >> 1) & 1) != 0)
54    }
55    #[doc = "Bit 2 - Endpoint 2 Interrupt Status"]
56    #[inline(always)]
57    pub fn ep2int(&self) -> EP2INT_R {
58        EP2INT_R::new(((self.bits >> 2) & 1) != 0)
59    }
60    #[doc = "Bit 3 - Endpoint 3 Interrupt Status"]
61    #[inline(always)]
62    pub fn ep3int(&self) -> EP3INT_R {
63        EP3INT_R::new(((self.bits >> 3) & 1) != 0)
64    }
65    #[doc = "Bit 4 - Endpoint 4 Interrupt Status"]
66    #[inline(always)]
67    pub fn ep4int(&self) -> EP4INT_R {
68        EP4INT_R::new(((self.bits >> 4) & 1) != 0)
69    }
70    #[doc = "Bit 5 - Endpoint 5 Interrupt Status"]
71    #[inline(always)]
72    pub fn ep5int(&self) -> EP5INT_R {
73        EP5INT_R::new(((self.bits >> 5) & 1) != 0)
74    }
75    #[doc = "Bit 6 - Endpoint 6 Interrupt Status"]
76    #[inline(always)]
77    pub fn ep6int(&self) -> EP6INT_R {
78        EP6INT_R::new(((self.bits >> 6) & 1) != 0)
79    }
80    #[doc = "Bit 7 - Endpoint 7Interrupt Status"]
81    #[inline(always)]
82    pub fn ep7int(&self) -> EP7INT_R {
83        EP7INT_R::new(((self.bits >> 7) & 1) != 0)
84    }
85    #[doc = "Bit 8 - UDP Suspend Interrupt Status"]
86    #[inline(always)]
87    pub fn rxsusp(&self) -> RXSUSP_R {
88        RXSUSP_R::new(((self.bits >> 8) & 1) != 0)
89    }
90    #[doc = "Bit 9 - UDP Resume Interrupt Status"]
91    #[inline(always)]
92    pub fn rxrsm(&self) -> RXRSM_R {
93        RXRSM_R::new(((self.bits >> 9) & 1) != 0)
94    }
95    #[doc = "Bit 10"]
96    #[inline(always)]
97    pub fn extrsm(&self) -> EXTRSM_R {
98        EXTRSM_R::new(((self.bits >> 10) & 1) != 0)
99    }
100    #[doc = "Bit 11 - Start of Frame Interrupt Status"]
101    #[inline(always)]
102    pub fn sofint(&self) -> SOFINT_R {
103        SOFINT_R::new(((self.bits >> 11) & 1) != 0)
104    }
105    #[doc = "Bit 12 - End of BUS Reset Interrupt Status"]
106    #[inline(always)]
107    pub fn endbusres(&self) -> ENDBUSRES_R {
108        ENDBUSRES_R::new(((self.bits >> 12) & 1) != 0)
109    }
110    #[doc = "Bit 13 - UDP Resume Interrupt Status"]
111    #[inline(always)]
112    pub fn wakeup(&self) -> WAKEUP_R {
113        WAKEUP_R::new(((self.bits >> 13) & 1) != 0)
114    }
115}
116#[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](index.html) module"]
117pub struct ISR_SPEC;
118impl crate::RegisterSpec for ISR_SPEC {
119    type Ux = u32;
120}
121#[doc = "`read()` method returns [isr::R](R) reader structure"]
122impl crate::Readable for ISR_SPEC {
123    type Reader = R;
124}
atsam4e8c_pac/udp/isr.rs

atsam4e8c_pac/udp/
isr.rs
