atsam4e8c_pac/pwm/
ier1.rs

1#[doc = "Register `IER1` writer"]
2pub struct W(crate::W<IER1_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IER1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IER1_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IER1_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CHID0` writer - Counter Event on Channel 0 Interrupt Enable"]
23pub type CHID0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
24#[doc = "Field `CHID1` writer - Counter Event on Channel 1 Interrupt Enable"]
25pub type CHID1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
26#[doc = "Field `CHID2` writer - Counter Event on Channel 2 Interrupt Enable"]
27pub type CHID2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
28#[doc = "Field `CHID3` writer - Counter Event on Channel 3 Interrupt Enable"]
29pub type CHID3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
30#[doc = "Field `FCHID0` writer - Fault Protection Trigger on Channel 0 Interrupt Enable"]
31pub type FCHID0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
32#[doc = "Field `FCHID1` writer - Fault Protection Trigger on Channel 1 Interrupt Enable"]
33pub type FCHID1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
34#[doc = "Field `FCHID2` writer - Fault Protection Trigger on Channel 2 Interrupt Enable"]
35pub type FCHID2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
36#[doc = "Field `FCHID3` writer - Fault Protection Trigger on Channel 3 Interrupt Enable"]
37pub type FCHID3_W<'a, const O: u8> = crate::BitWriter<'a, u32, IER1_SPEC, bool, O>;
38impl W {
39    #[doc = "Bit 0 - Counter Event on Channel 0 Interrupt Enable"]
40    #[inline(always)]
41    #[must_use]
42    pub fn chid0(&mut self) -> CHID0_W<0> {
43        CHID0_W::new(self)
44    }
45    #[doc = "Bit 1 - Counter Event on Channel 1 Interrupt Enable"]
46    #[inline(always)]
47    #[must_use]
48    pub fn chid1(&mut self) -> CHID1_W<1> {
49        CHID1_W::new(self)
50    }
51    #[doc = "Bit 2 - Counter Event on Channel 2 Interrupt Enable"]
52    #[inline(always)]
53    #[must_use]
54    pub fn chid2(&mut self) -> CHID2_W<2> {
55        CHID2_W::new(self)
56    }
57    #[doc = "Bit 3 - Counter Event on Channel 3 Interrupt Enable"]
58    #[inline(always)]
59    #[must_use]
60    pub fn chid3(&mut self) -> CHID3_W<3> {
61        CHID3_W::new(self)
62    }
63    #[doc = "Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Enable"]
64    #[inline(always)]
65    #[must_use]
66    pub fn fchid0(&mut self) -> FCHID0_W<16> {
67        FCHID0_W::new(self)
68    }
69    #[doc = "Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Enable"]
70    #[inline(always)]
71    #[must_use]
72    pub fn fchid1(&mut self) -> FCHID1_W<17> {
73        FCHID1_W::new(self)
74    }
75    #[doc = "Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Enable"]
76    #[inline(always)]
77    #[must_use]
78    pub fn fchid2(&mut self) -> FCHID2_W<18> {
79        FCHID2_W::new(self)
80    }
81    #[doc = "Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Enable"]
82    #[inline(always)]
83    #[must_use]
84    pub fn fchid3(&mut self) -> FCHID3_W<19> {
85        FCHID3_W::new(self)
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "PWM Interrupt Enable Register 1\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier1](index.html) module"]
95pub struct IER1_SPEC;
96impl crate::RegisterSpec for IER1_SPEC {
97    type Ux = u32;
98}
99#[doc = "`write(|w| ..)` method takes [ier1::W](W) writer structure"]
100impl crate::Writable for IER1_SPEC {
101    type Writer = W;
102    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
103    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
104}
atsam4e8c_pac/pwm/ier1.rs

atsam4e8c_pac/pwm/
ier1.rs
