#[repr(C)]
pub struct RegisterBlock {
Show 104 fields pub clk: CLK, pub ena: ENA, pub dis: DIS, pub sr: SR, pub ier1: IER1, pub idr1: IDR1, pub imr1: IMR1, pub isr1: ISR1, pub scm: SCM, pub dmar: DMAR, pub scuc: SCUC, pub scup: SCUP, pub scupupd: SCUPUPD, pub ier2: IER2, pub idr2: IDR2, pub imr2: IMR2, pub isr2: ISR2, pub oov: OOV, pub os: OS, pub oss: OSS, pub osc: OSC, pub ossupd: OSSUPD, pub oscupd: OSCUPD, pub fmr: FMR, pub fsr: FSR, pub fcr: FCR, pub fpv: FPV, pub fpe: FPE, pub elmr: [ELMR; 2], pub sspr: SSPR, pub sspup: SSPUP, pub smmr: SMMR, pub wpcr: WPCR, pub wpsr: WPSR, pub tpr: TPR, pub tcr: TCR, pub tnpr: TNPR, pub tncr: TNCR, pub ptcr: PTCR, pub ptsr: PTSR, pub cmpv0: CMPV0, pub cmpvupd0: CMPVUPD0, pub cmpm0: CMPM0, pub cmpmupd0: CMPMUPD0, pub cmpv1: CMPV1, pub cmpvupd1: CMPVUPD1, pub cmpm1: CMPM1, pub cmpmupd1: CMPMUPD1, pub cmpv2: CMPV2, pub cmpvupd2: CMPVUPD2, pub cmpm2: CMPM2, pub cmpmupd2: CMPMUPD2, pub cmpv3: CMPV3, pub cmpvupd3: CMPVUPD3, pub cmpm3: CMPM3, pub cmpmupd3: CMPMUPD3, pub cmpv4: CMPV4, pub cmpvupd4: CMPVUPD4, pub cmpm4: CMPM4, pub cmpmupd4: CMPMUPD4, pub cmpv5: CMPV5, pub cmpvupd5: CMPVUPD5, pub cmpm5: CMPM5, pub cmpmupd5: CMPMUPD5, pub cmpv6: CMPV6, pub cmpvupd6: CMPVUPD6, pub cmpm6: CMPM6, pub cmpmupd6: CMPMUPD6, pub cmpv7: CMPV7, pub cmpvupd7: CMPVUPD7, pub cmpm7: CMPM7, pub cmpmupd7: CMPMUPD7, pub cmr0: CMR0, pub cdty0: CDTY0, pub cdtyupd0: CDTYUPD0, pub cprd0: CPRD0, pub cprdupd0: CPRDUPD0, pub ccnt0: CCNT0, pub dt0: DT0, pub dtupd0: DTUPD0, pub cmr1: CMR1, pub cdty1: CDTY1, pub cdtyupd1: CDTYUPD1, pub cprd1: CPRD1, pub cprdupd1: CPRDUPD1, pub ccnt1: CCNT1, pub dt1: DT1, pub dtupd1: DTUPD1, pub cmr2: CMR2, pub cdty2: CDTY2, pub cdtyupd2: CDTYUPD2, pub cprd2: CPRD2, pub cprdupd2: CPRDUPD2, pub ccnt2: CCNT2, pub dt2: DT2, pub dtupd2: DTUPD2, pub cmr3: CMR3, pub cdty3: CDTY3, pub cdtyupd3: CDTYUPD3, pub cprd3: CPRD3, pub cprdupd3: CPRDUPD3, pub ccnt3: CCNT3, pub dt3: DT3, pub dtupd3: DTUPD3, /* private fields */
}
Expand description

Register block

Fields§

§clk: CLK

0x00 - PWM Clock Register

§ena: ENA

0x04 - PWM Enable Register

§dis: DIS

0x08 - PWM Disable Register

§sr: SR

0x0c - PWM Status Register

§ier1: IER1

0x10 - PWM Interrupt Enable Register 1

§idr1: IDR1

0x14 - PWM Interrupt Disable Register 1

§imr1: IMR1

0x18 - PWM Interrupt Mask Register 1

§isr1: ISR1

0x1c - PWM Interrupt Status Register 1

§scm: SCM

0x20 - PWM Sync Channels Mode Register

§dmar: DMAR

0x24 - PWM DMA Register

§scuc: SCUC

0x28 - PWM Sync Channels Update Control Register

§scup: SCUP

0x2c - PWM Sync Channels Update Period Register

§scupupd: SCUPUPD

0x30 - PWM Sync Channels Update Period Update Register

§ier2: IER2

0x34 - PWM Interrupt Enable Register 2

§idr2: IDR2

0x38 - PWM Interrupt Disable Register 2

§imr2: IMR2

0x3c - PWM Interrupt Mask Register 2

§isr2: ISR2

0x40 - PWM Interrupt Status Register 2

§oov: OOV

0x44 - PWM Output Override Value Register

§os: OS

0x48 - PWM Output Selection Register

§oss: OSS

0x4c - PWM Output Selection Set Register

§osc: OSC

0x50 - PWM Output Selection Clear Register

§ossupd: OSSUPD

0x54 - PWM Output Selection Set Update Register

§oscupd: OSCUPD

0x58 - PWM Output Selection Clear Update Register

§fmr: FMR

0x5c - PWM Fault Mode Register

§fsr: FSR

0x60 - PWM Fault Status Register

§fcr: FCR

0x64 - PWM Fault Clear Register

§fpv: FPV

0x68 - PWM Fault Protection Value Register

§fpe: FPE

0x6c - PWM Fault Protection Enable Register

§elmr: [ELMR; 2]

0x7c..0x84 - PWM Event Line 0 Mode Register

§sspr: SSPR

0xa0 - PWM Spread Spectrum Register

§sspup: SSPUP

0xa4 - PWM Spread Spectrum Update Register

§smmr: SMMR

0xb0 - PWM Stepper Motor Mode Register

§wpcr: WPCR

0xe4 - PWM Write Protection Control Register

§wpsr: WPSR

0xe8 - PWM Write Protection Status Register

§tpr: TPR

0x108 - Transmit Pointer Register

§tcr: TCR

0x10c - Transmit Counter Register

§tnpr: TNPR

0x118 - Transmit Next Pointer Register

§tncr: TNCR

0x11c - Transmit Next Counter Register

§ptcr: PTCR

0x120 - Transfer Control Register

§ptsr: PTSR

0x124 - Transfer Status Register

§cmpv0: CMPV0

0x130 - PWM Comparison 0 Value Register

§cmpvupd0: CMPVUPD0

0x134 - PWM Comparison 0 Value Update Register

§cmpm0: CMPM0

0x138 - PWM Comparison 0 Mode Register

§cmpmupd0: CMPMUPD0

0x13c - PWM Comparison 0 Mode Update Register

§cmpv1: CMPV1

0x140 - PWM Comparison 1 Value Register

§cmpvupd1: CMPVUPD1

0x144 - PWM Comparison 1 Value Update Register

§cmpm1: CMPM1

0x148 - PWM Comparison 1 Mode Register

§cmpmupd1: CMPMUPD1

0x14c - PWM Comparison 1 Mode Update Register

§cmpv2: CMPV2

0x150 - PWM Comparison 2 Value Register

§cmpvupd2: CMPVUPD2

0x154 - PWM Comparison 2 Value Update Register

§cmpm2: CMPM2

0x158 - PWM Comparison 2 Mode Register

§cmpmupd2: CMPMUPD2

0x15c - PWM Comparison 2 Mode Update Register

§cmpv3: CMPV3

0x160 - PWM Comparison 3 Value Register

§cmpvupd3: CMPVUPD3

0x164 - PWM Comparison 3 Value Update Register

§cmpm3: CMPM3

0x168 - PWM Comparison 3 Mode Register

§cmpmupd3: CMPMUPD3

0x16c - PWM Comparison 3 Mode Update Register

§cmpv4: CMPV4

0x170 - PWM Comparison 4 Value Register

§cmpvupd4: CMPVUPD4

0x174 - PWM Comparison 4 Value Update Register

§cmpm4: CMPM4

0x178 - PWM Comparison 4 Mode Register

§cmpmupd4: CMPMUPD4

0x17c - PWM Comparison 4 Mode Update Register

§cmpv5: CMPV5

0x180 - PWM Comparison 5 Value Register

§cmpvupd5: CMPVUPD5

0x184 - PWM Comparison 5 Value Update Register

§cmpm5: CMPM5

0x188 - PWM Comparison 5 Mode Register

§cmpmupd5: CMPMUPD5

0x18c - PWM Comparison 5 Mode Update Register

§cmpv6: CMPV6

0x190 - PWM Comparison 6 Value Register

§cmpvupd6: CMPVUPD6

0x194 - PWM Comparison 6 Value Update Register

§cmpm6: CMPM6

0x198 - PWM Comparison 6 Mode Register

§cmpmupd6: CMPMUPD6

0x19c - PWM Comparison 6 Mode Update Register

§cmpv7: CMPV7

0x1a0 - PWM Comparison 7 Value Register

§cmpvupd7: CMPVUPD7

0x1a4 - PWM Comparison 7 Value Update Register

§cmpm7: CMPM7

0x1a8 - PWM Comparison 7 Mode Register

§cmpmupd7: CMPMUPD7

0x1ac - PWM Comparison 7 Mode Update Register

§cmr0: CMR0

0x200 - PWM Channel Mode Register (ch_num = 0)

§cdty0: CDTY0

0x204 - PWM Channel Duty Cycle Register (ch_num = 0)

§cdtyupd0: CDTYUPD0

0x208 - PWM Channel Duty Cycle Update Register (ch_num = 0)

§cprd0: CPRD0

0x20c - PWM Channel Period Register (ch_num = 0)

§cprdupd0: CPRDUPD0

0x210 - PWM Channel Period Update Register (ch_num = 0)

§ccnt0: CCNT0

0x214 - PWM Channel Counter Register (ch_num = 0)

§dt0: DT0

0x218 - PWM Channel Dead Time Register (ch_num = 0)

§dtupd0: DTUPD0

0x21c - PWM Channel Dead Time Update Register (ch_num = 0)

§cmr1: CMR1

0x220 - PWM Channel Mode Register (ch_num = 1)

§cdty1: CDTY1

0x224 - PWM Channel Duty Cycle Register (ch_num = 1)

§cdtyupd1: CDTYUPD1

0x228 - PWM Channel Duty Cycle Update Register (ch_num = 1)

§cprd1: CPRD1

0x22c - PWM Channel Period Register (ch_num = 1)

§cprdupd1: CPRDUPD1

0x230 - PWM Channel Period Update Register (ch_num = 1)

§ccnt1: CCNT1

0x234 - PWM Channel Counter Register (ch_num = 1)

§dt1: DT1

0x238 - PWM Channel Dead Time Register (ch_num = 1)

§dtupd1: DTUPD1

0x23c - PWM Channel Dead Time Update Register (ch_num = 1)

§cmr2: CMR2

0x240 - PWM Channel Mode Register (ch_num = 2)

§cdty2: CDTY2

0x244 - PWM Channel Duty Cycle Register (ch_num = 2)

§cdtyupd2: CDTYUPD2

0x248 - PWM Channel Duty Cycle Update Register (ch_num = 2)

§cprd2: CPRD2

0x24c - PWM Channel Period Register (ch_num = 2)

§cprdupd2: CPRDUPD2

0x250 - PWM Channel Period Update Register (ch_num = 2)

§ccnt2: CCNT2

0x254 - PWM Channel Counter Register (ch_num = 2)

§dt2: DT2

0x258 - PWM Channel Dead Time Register (ch_num = 2)

§dtupd2: DTUPD2

0x25c - PWM Channel Dead Time Update Register (ch_num = 2)

§cmr3: CMR3

0x260 - PWM Channel Mode Register (ch_num = 3)

§cdty3: CDTY3

0x264 - PWM Channel Duty Cycle Register (ch_num = 3)

§cdtyupd3: CDTYUPD3

0x268 - PWM Channel Duty Cycle Update Register (ch_num = 3)

§cprd3: CPRD3

0x26c - PWM Channel Period Register (ch_num = 3)

§cprdupd3: CPRDUPD3

0x270 - PWM Channel Period Update Register (ch_num = 3)

§ccnt3: CCNT3

0x274 - PWM Channel Counter Register (ch_num = 3)

§dt3: DT3

0x278 - PWM Channel Dead Time Register (ch_num = 3)

§dtupd3: DTUPD3

0x27c - PWM Channel Dead Time Update Register (ch_num = 3)

Auto Trait Implementations§

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