[−][src]Struct atsam4e16e_pac::afec0::RegisterBlock
Register block
Fields
cr: CR
0x00 - Control Register
mr: MR
0x04 - Mode Register
emr: EMR
0x08 - Extended Mode Register
seq1r: SEQ1R
0x0c - Channel Sequence 1 Register
seq2r: SEQ2R
0x10 - Channel Sequence 2 Register
cher: CHER
0x14 - Channel Enable Register
chdr: CHDR
0x18 - Channel Disable Register
chsr: CHSR
0x1c - Channel Status Register
lcdr: LCDR
0x20 - Last Converted Data Register
ier: IER
0x24 - Interrupt Enable Register
idr: IDR
0x28 - Interrupt Disable Register
imr: IMR
0x2c - Interrupt Mask Register
isr: ISR
0x30 - Interrupt Status Register
over: OVER
0x4c - Overrun Status Register
cwr: CWR
0x50 - Compare Window Register
cgr: CGR
0x54 - Channel Gain Register
cdor: CDOR
0x5c - Channel DC Offset Register
diffr: DIFFR
0x60 - Channel Differential Register
cselr: CSELR
0x64 - Channel Register Selection
cdr: CDR
0x68 - Channel Data Register
cocr: COCR
0x6c - Channel Offset Compensation Register
tempmr: TEMPMR
0x70 - Temperature Sensor Mode Register
tempcwr: TEMPCWR
0x74 - Temperature Compare Window Register
acr: ACR
0x94 - Analog Control Register
wpmr: WPMR
0xe4 - Write Protect Mode Register
wpsr: WPSR
0xe8 - Write Protect Status Register
rpr: RPR
0x100 - Receive Pointer Register
rcr: RCR
0x104 - Receive Counter Register
rnpr: RNPR
0x110 - Receive Next Pointer Register
rncr: RNCR
0x114 - Receive Next Counter Register
ptcr: PTCR
0x120 - Transfer Control Register
ptsr: PTSR
0x124 - Transfer Status Register
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