[−][src]Module atsam4e16e_pac::dmac
DMA Controller
Modules
cfg0 | DMAC Channel Configuration Register (ch_num = 0) |
cfg1 | DMAC Channel Configuration Register (ch_num = 1) |
cfg2 | DMAC Channel Configuration Register (ch_num = 2) |
cfg3 | DMAC Channel Configuration Register (ch_num = 3) |
chdr | DMAC Channel Handler Disable Register |
cher | DMAC Channel Handler Enable Register |
chsr | DMAC Channel Handler Status Register |
creq | DMAC Software Chunk Transfer Request Register |
ctrla0 | DMAC Channel Control A Register (ch_num = 0) |
ctrla1 | DMAC Channel Control A Register (ch_num = 1) |
ctrla2 | DMAC Channel Control A Register (ch_num = 2) |
ctrla3 | DMAC Channel Control A Register (ch_num = 3) |
ctrlb0 | DMAC Channel Control B Register (ch_num = 0) |
ctrlb1 | DMAC Channel Control B Register (ch_num = 1) |
ctrlb2 | DMAC Channel Control B Register (ch_num = 2) |
ctrlb3 | DMAC Channel Control B Register (ch_num = 3) |
daddr0 | DMAC Channel Destination Address Register (ch_num = 0) |
daddr1 | DMAC Channel Destination Address Register (ch_num = 1) |
daddr2 | DMAC Channel Destination Address Register (ch_num = 2) |
daddr3 | DMAC Channel Destination Address Register (ch_num = 3) |
dscr0 | DMAC Channel Descriptor Address Register (ch_num = 0) |
dscr1 | DMAC Channel Descriptor Address Register (ch_num = 1) |
dscr2 | DMAC Channel Descriptor Address Register (ch_num = 2) |
dscr3 | DMAC Channel Descriptor Address Register (ch_num = 3) |
ebcidr | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register. |
ebcier | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register. |
ebcimr | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register. |
ebcisr | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register. |
en | DMAC Enable Register |
gcfg | DMAC Global Configuration Register |
last | DMAC Software Last Transfer Flag Register |
saddr0 | DMAC Channel Source Address Register (ch_num = 0) |
saddr1 | DMAC Channel Source Address Register (ch_num = 1) |
saddr2 | DMAC Channel Source Address Register (ch_num = 2) |
saddr3 | DMAC Channel Source Address Register (ch_num = 3) |
sreq | DMAC Software Single Request Register |
wpmr | DMAC Write Protect Mode Register |
wpsr | DMAC Write Protect Status Register |
Structs
RegisterBlock | Register block |
Type Definitions
CFG0 | DMAC Channel Configuration Register (ch_num = 0) |
CFG1 | DMAC Channel Configuration Register (ch_num = 1) |
CFG2 | DMAC Channel Configuration Register (ch_num = 2) |
CFG3 | DMAC Channel Configuration Register (ch_num = 3) |
CHDR | DMAC Channel Handler Disable Register |
CHER | DMAC Channel Handler Enable Register |
CHSR | DMAC Channel Handler Status Register |
CREQ | DMAC Software Chunk Transfer Request Register |
CTRLA0 | DMAC Channel Control A Register (ch_num = 0) |
CTRLA1 | DMAC Channel Control A Register (ch_num = 1) |
CTRLA2 | DMAC Channel Control A Register (ch_num = 2) |
CTRLA3 | DMAC Channel Control A Register (ch_num = 3) |
CTRLB0 | DMAC Channel Control B Register (ch_num = 0) |
CTRLB1 | DMAC Channel Control B Register (ch_num = 1) |
CTRLB2 | DMAC Channel Control B Register (ch_num = 2) |
CTRLB3 | DMAC Channel Control B Register (ch_num = 3) |
DADDR0 | DMAC Channel Destination Address Register (ch_num = 0) |
DADDR1 | DMAC Channel Destination Address Register (ch_num = 1) |
DADDR2 | DMAC Channel Destination Address Register (ch_num = 2) |
DADDR3 | DMAC Channel Destination Address Register (ch_num = 3) |
DSCR0 | DMAC Channel Descriptor Address Register (ch_num = 0) |
DSCR1 | DMAC Channel Descriptor Address Register (ch_num = 1) |
DSCR2 | DMAC Channel Descriptor Address Register (ch_num = 2) |
DSCR3 | DMAC Channel Descriptor Address Register (ch_num = 3) |
EBCIDR | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Disable register. |
EBCIER | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer Transfer Completed Interrupt Enable register. |
EBCIMR | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Mask Register. |
EBCISR | DMAC Error, Chained Buffer Transfer Completed Interrupt and Buffer transfer completed Status Register. |
EN | DMAC Enable Register |
GCFG | DMAC Global Configuration Register |
LAST | DMAC Software Last Transfer Flag Register |
SADDR0 | DMAC Channel Source Address Register (ch_num = 0) |
SADDR1 | DMAC Channel Source Address Register (ch_num = 1) |
SADDR2 | DMAC Channel Source Address Register (ch_num = 2) |
SADDR3 | DMAC Channel Source Address Register (ch_num = 3) |
SREQ | DMAC Software Single Request Register |
WPMR | DMAC Write Protect Mode Register |
WPSR | DMAC Write Protect Status Register |