Struct atsam4e16c_pac::usart0::RegisterBlock[][src]

#[repr(C)]pub struct RegisterBlock {
    pub rhr: RHR,
    pub thr: THR,
    pub brgr: BRGR,
    pub rtor: RTOR,
    pub ttgr: TTGR,
    pub fidi: FIDI,
    pub ner: NER,
    pub if_: IF,
    pub man: MAN,
    pub wpmr: WPMR,
    pub wpsr: WPSR,
    pub rpr: RPR,
    pub rcr: RCR,
    pub tpr: TPR,
    pub tcr: TCR,
    pub rnpr: RNPR,
    pub rncr: RNCR,
    pub tnpr: TNPR,
    pub tncr: TNCR,
    pub ptcr: PTCR,
    pub ptsr: PTSR,
    // some fields omitted
}

Register block

Fields

rhr: RHR

0x18 - Receive Holding Register

thr: THR

0x1c - Transmit Holding Register

brgr: BRGR

0x20 - Baud Rate Generator Register

rtor: RTOR

0x24 - Receiver Time-out Register

ttgr: TTGR

0x28 - Transmitter Timeguard Register

fidi: FIDI

0x40 - FI DI Ratio Register

ner: NER

0x44 - Number of Errors Register

if_: IF

0x4c - IrDA Filter Register

man: MAN

0x50 - Manchester Configuration Register

wpmr: WPMR

0xe4 - Write Protection Mode Register

wpsr: WPSR

0xe8 - Write Protection Status Register

rpr: RPR

0x100 - Receive Pointer Register

rcr: RCR

0x104 - Receive Counter Register

tpr: TPR

0x108 - Transmit Pointer Register

tcr: TCR

0x10c - Transmit Counter Register

rnpr: RNPR

0x110 - Receive Next Pointer Register

rncr: RNCR

0x114 - Receive Next Counter Register

tnpr: TNPR

0x118 - Transmit Next Pointer Register

tncr: TNCR

0x11c - Transmit Next Counter Register

ptcr: PTCR

0x120 - Transfer Control Register

ptsr: PTSR

0x124 - Transfer Status Register

Implementations

impl RegisterBlock[src]

pub fn cr_spi_mode(&self) -> &CR_SPI_MODE[src]

0x00 - Control Register

pub fn cr_spi_mode_mut(&self) -> &mut CR_SPI_MODE[src]

0x00 - Control Register

pub fn cr(&self) -> &CR[src]

0x00 - Control Register

pub fn cr_mut(&self) -> &mut CR[src]

0x00 - Control Register

pub fn mr_spi_mode(&self) -> &MR_SPI_MODE[src]

0x04 - Mode Register

pub fn mr_spi_mode_mut(&self) -> &mut MR_SPI_MODE[src]

0x04 - Mode Register

pub fn mr(&self) -> &MR[src]

0x04 - Mode Register

pub fn mr_mut(&self) -> &mut MR[src]

0x04 - Mode Register

pub fn ier_spi_mode(&self) -> &IER_SPI_MODE[src]

0x08 - Interrupt Enable Register

pub fn ier_spi_mode_mut(&self) -> &mut IER_SPI_MODE[src]

0x08 - Interrupt Enable Register

pub fn ier(&self) -> &IER[src]

0x08 - Interrupt Enable Register

pub fn ier_mut(&self) -> &mut IER[src]

0x08 - Interrupt Enable Register

pub fn idr_spi_mode(&self) -> &IDR_SPI_MODE[src]

0x0c - Interrupt Disable Register

pub fn idr_spi_mode_mut(&self) -> &mut IDR_SPI_MODE[src]

0x0c - Interrupt Disable Register

pub fn idr(&self) -> &IDR[src]

0x0c - Interrupt Disable Register

pub fn idr_mut(&self) -> &mut IDR[src]

0x0c - Interrupt Disable Register

pub fn imr_spi_mode(&self) -> &IMR_SPI_MODE[src]

0x10 - Interrupt Mask Register

pub fn imr_spi_mode_mut(&self) -> &mut IMR_SPI_MODE[src]

0x10 - Interrupt Mask Register

pub fn imr(&self) -> &IMR[src]

0x10 - Interrupt Mask Register

pub fn imr_mut(&self) -> &mut IMR[src]

0x10 - Interrupt Mask Register

pub fn csr_spi_mode(&self) -> &CSR_SPI_MODE[src]

0x14 - Channel Status Register

pub fn csr_spi_mode_mut(&self) -> &mut CSR_SPI_MODE[src]

0x14 - Channel Status Register

pub fn csr(&self) -> &CSR[src]

0x14 - Channel Status Register

pub fn csr_mut(&self) -> &mut CSR[src]

0x14 - Channel Status Register

Auto Trait Implementations

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impl<T> Any for T where
    T: 'static + ?Sized
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    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T> Same<T> for T

type Output = T

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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

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impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

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