Struct atsam4e16c_pac::generic::R[][src]

pub struct R<U, T> { /* fields omitted */ }

Register/field reader.

Result of the read methods of registers. Also used as a closure argument in the modify method.

Implementations

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Reads raw bits from register/field.

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits.

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0).

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1).

impl R<u32, Reg<u32, _CLK>>[src]

pub fn diva(&self) -> DIVA_R[src]

Bits 0:7 - CLKA, CLKB Divide Factor

pub fn prea(&self) -> PREA_R[src]

Bits 8:11 - CLKA, CLKB Source Clock Selection

pub fn divb(&self) -> DIVB_R[src]

Bits 16:23 - CLKA, CLKB Divide Factor

pub fn preb(&self) -> PREB_R[src]

Bits 24:27 - CLKA, CLKB Source Clock Selection

impl R<u32, Reg<u32, _SR>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Channel ID

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Channel ID

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Channel ID

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Channel ID

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Counter Event on Channel 0 Interrupt Mask

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Counter Event on Channel 1 Interrupt Mask

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Counter Event on Channel 2 Interrupt Mask

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Counter Event on Channel 3 Interrupt Mask

pub fn fchid0(&self) -> FCHID0_R[src]

Bit 16 - Fault Protection Trigger on Channel 0 Interrupt Mask

pub fn fchid1(&self) -> FCHID1_R[src]

Bit 17 - Fault Protection Trigger on Channel 1 Interrupt Mask

pub fn fchid2(&self) -> FCHID2_R[src]

Bit 18 - Fault Protection Trigger on Channel 2 Interrupt Mask

pub fn fchid3(&self) -> FCHID3_R[src]

Bit 19 - Fault Protection Trigger on Channel 3 Interrupt Mask

impl R<u32, Reg<u32, _ISR1>>[src]

pub fn chid0(&self) -> CHID0_R[src]

Bit 0 - Counter Event on Channel 0

pub fn chid1(&self) -> CHID1_R[src]

Bit 1 - Counter Event on Channel 1

pub fn chid2(&self) -> CHID2_R[src]

Bit 2 - Counter Event on Channel 2

pub fn chid3(&self) -> CHID3_R[src]

Bit 3 - Counter Event on Channel 3

pub fn fchid0(&self) -> FCHID0_R[src]

Bit 16 - Fault Protection Trigger on Channel 0

pub fn fchid1(&self) -> FCHID1_R[src]

Bit 17 - Fault Protection Trigger on Channel 1

pub fn fchid2(&self) -> FCHID2_R[src]

Bit 18 - Fault Protection Trigger on Channel 2

pub fn fchid3(&self) -> FCHID3_R[src]

Bit 19 - Fault Protection Trigger on Channel 3

impl R<u8, UPDM_A>[src]

pub fn variant(&self) -> Variant<u8, UPDM_A>[src]

Get enumerated values variant

pub fn is_mode0(&self) -> bool[src]

Checks if the value of the field is MODE0

pub fn is_mode1(&self) -> bool[src]

Checks if the value of the field is MODE1

pub fn is_mode2(&self) -> bool[src]

Checks if the value of the field is MODE2

impl R<u32, Reg<u32, _SCM>>[src]

pub fn sync0(&self) -> SYNC0_R[src]

Bit 0 - Synchronous Channel 0

pub fn sync1(&self) -> SYNC1_R[src]

Bit 1 - Synchronous Channel 1

pub fn sync2(&self) -> SYNC2_R[src]

Bit 2 - Synchronous Channel 2

pub fn sync3(&self) -> SYNC3_R[src]

Bit 3 - Synchronous Channel 3

pub fn updm(&self) -> UPDM_R[src]

Bits 16:17 - Synchronous Channels Update Mode

pub fn ptrm(&self) -> PTRM_R[src]

Bit 20 - PDCPDC or DMA Transfer Request Mode

pub fn ptrcs(&self) -> PTRCS_R[src]

Bits 21:23 - PDCPDC or DMA Transfer Request Comparison Selection

impl R<u32, Reg<u32, _SCUC>>[src]

pub fn updulock(&self) -> UPDULOCK_R[src]

Bit 0 - Synchronous Channels Update Unlock

impl R<u32, Reg<u32, _SCUP>>[src]

pub fn upr(&self) -> UPR_R[src]

Bits 0:3 - Update Period

pub fn uprcnt(&self) -> UPRCNT_R[src]

Bits 4:7 - Update Period Counter

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn wrdy(&self) -> WRDY_R[src]

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 1 - PDC End of TX Buffer Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 2 - PDC TX Buffer Empty Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Mask

pub fn cmpm0(&self) -> CMPM0_R[src]

Bit 8 - Comparison 0 Match Interrupt Mask

pub fn cmpm1(&self) -> CMPM1_R[src]

Bit 9 - Comparison 1 Match Interrupt Mask

pub fn cmpm2(&self) -> CMPM2_R[src]

Bit 10 - Comparison 2 Match Interrupt Mask

pub fn cmpm3(&self) -> CMPM3_R[src]

Bit 11 - Comparison 3 Match Interrupt Mask

pub fn cmpm4(&self) -> CMPM4_R[src]

Bit 12 - Comparison 4 Match Interrupt Mask

pub fn cmpm5(&self) -> CMPM5_R[src]

Bit 13 - Comparison 5 Match Interrupt Mask

pub fn cmpm6(&self) -> CMPM6_R[src]

Bit 14 - Comparison 6 Match Interrupt Mask

pub fn cmpm7(&self) -> CMPM7_R[src]

Bit 15 - Comparison 7 Match Interrupt Mask

pub fn cmpu0(&self) -> CMPU0_R[src]

Bit 16 - Comparison 0 Update Interrupt Mask

pub fn cmpu1(&self) -> CMPU1_R[src]

Bit 17 - Comparison 1 Update Interrupt Mask

pub fn cmpu2(&self) -> CMPU2_R[src]

Bit 18 - Comparison 2 Update Interrupt Mask

pub fn cmpu3(&self) -> CMPU3_R[src]

Bit 19 - Comparison 3 Update Interrupt Mask

pub fn cmpu4(&self) -> CMPU4_R[src]

Bit 20 - Comparison 4 Update Interrupt Mask

pub fn cmpu5(&self) -> CMPU5_R[src]

Bit 21 - Comparison 5 Update Interrupt Mask

pub fn cmpu6(&self) -> CMPU6_R[src]

Bit 22 - Comparison 6 Update Interrupt Mask

pub fn cmpu7(&self) -> CMPU7_R[src]

Bit 23 - Comparison 7 Update Interrupt Mask

impl R<u32, Reg<u32, _ISR2>>[src]

pub fn wrdy(&self) -> WRDY_R[src]

Bit 0 - Write Ready for Synchronous Channels Update

pub fn endtx(&self) -> ENDTX_R[src]

Bit 1 - PDC End of TX Buffer

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 2 - PDC TX Buffer Empty

pub fn unre(&self) -> UNRE_R[src]

Bit 3 - Synchronous Channels Update Underrun Error

pub fn cmpm0(&self) -> CMPM0_R[src]

Bit 8 - Comparison 0 Match

pub fn cmpm1(&self) -> CMPM1_R[src]

Bit 9 - Comparison 1 Match

pub fn cmpm2(&self) -> CMPM2_R[src]

Bit 10 - Comparison 2 Match

pub fn cmpm3(&self) -> CMPM3_R[src]

Bit 11 - Comparison 3 Match

pub fn cmpm4(&self) -> CMPM4_R[src]

Bit 12 - Comparison 4 Match

pub fn cmpm5(&self) -> CMPM5_R[src]

Bit 13 - Comparison 5 Match

pub fn cmpm6(&self) -> CMPM6_R[src]

Bit 14 - Comparison 6 Match

pub fn cmpm7(&self) -> CMPM7_R[src]

Bit 15 - Comparison 7 Match

pub fn cmpu0(&self) -> CMPU0_R[src]

Bit 16 - Comparison 0 Update

pub fn cmpu1(&self) -> CMPU1_R[src]

Bit 17 - Comparison 1 Update

pub fn cmpu2(&self) -> CMPU2_R[src]

Bit 18 - Comparison 2 Update

pub fn cmpu3(&self) -> CMPU3_R[src]

Bit 19 - Comparison 3 Update

pub fn cmpu4(&self) -> CMPU4_R[src]

Bit 20 - Comparison 4 Update

pub fn cmpu5(&self) -> CMPU5_R[src]

Bit 21 - Comparison 5 Update

pub fn cmpu6(&self) -> CMPU6_R[src]

Bit 22 - Comparison 6 Update

pub fn cmpu7(&self) -> CMPU7_R[src]

Bit 23 - Comparison 7 Update

impl R<u32, Reg<u32, _OOV>>[src]

pub fn oovh0(&self) -> OOVH0_R[src]

Bit 0 - Output Override Value for PWMH output of the channel 0

pub fn oovh1(&self) -> OOVH1_R[src]

Bit 1 - Output Override Value for PWMH output of the channel 1

pub fn oovh2(&self) -> OOVH2_R[src]

Bit 2 - Output Override Value for PWMH output of the channel 2

pub fn oovh3(&self) -> OOVH3_R[src]

Bit 3 - Output Override Value for PWMH output of the channel 3

pub fn oovl0(&self) -> OOVL0_R[src]

Bit 16 - Output Override Value for PWML output of the channel 0

pub fn oovl1(&self) -> OOVL1_R[src]

Bit 17 - Output Override Value for PWML output of the channel 1

pub fn oovl2(&self) -> OOVL2_R[src]

Bit 18 - Output Override Value for PWML output of the channel 2

pub fn oovl3(&self) -> OOVL3_R[src]

Bit 19 - Output Override Value for PWML output of the channel 3

impl R<u32, Reg<u32, _OS>>[src]

pub fn osh0(&self) -> OSH0_R[src]

Bit 0 - Output Selection for PWMH output of the channel 0

pub fn osh1(&self) -> OSH1_R[src]

Bit 1 - Output Selection for PWMH output of the channel 1

pub fn osh2(&self) -> OSH2_R[src]

Bit 2 - Output Selection for PWMH output of the channel 2

pub fn osh3(&self) -> OSH3_R[src]

Bit 3 - Output Selection for PWMH output of the channel 3

pub fn osl0(&self) -> OSL0_R[src]

Bit 16 - Output Selection for PWML output of the channel 0

pub fn osl1(&self) -> OSL1_R[src]

Bit 17 - Output Selection for PWML output of the channel 1

pub fn osl2(&self) -> OSL2_R[src]

Bit 18 - Output Selection for PWML output of the channel 2

pub fn osl3(&self) -> OSL3_R[src]

Bit 19 - Output Selection for PWML output of the channel 3

impl R<u32, Reg<u32, _FMR>>[src]

pub fn fpol(&self) -> FPOL_R[src]

Bits 0:7 - Fault Polarity

pub fn fmod(&self) -> FMOD_R[src]

Bits 8:15 - Fault Activation Mode

pub fn ffil(&self) -> FFIL_R[src]

Bits 16:23 - Fault Filtering

impl R<u32, Reg<u32, _FSR>>[src]

pub fn fiv(&self) -> FIV_R[src]

Bits 0:7 - Fault Input Value

pub fn fs(&self) -> FS_R[src]

Bits 8:15 - Fault Status

impl R<u32, Reg<u32, _FPV>>[src]

pub fn fpvh0(&self) -> FPVH0_R[src]

Bit 0 - Fault Protection Value for PWMH output on channel 0

pub fn fpvh1(&self) -> FPVH1_R[src]

Bit 1 - Fault Protection Value for PWMH output on channel 1

pub fn fpvh2(&self) -> FPVH2_R[src]

Bit 2 - Fault Protection Value for PWMH output on channel 2

pub fn fpvh3(&self) -> FPVH3_R[src]

Bit 3 - Fault Protection Value for PWMH output on channel 3

pub fn fpvl0(&self) -> FPVL0_R[src]

Bit 16 - Fault Protection Value for PWML output on channel 0

pub fn fpvl1(&self) -> FPVL1_R[src]

Bit 17 - Fault Protection Value for PWML output on channel 1

pub fn fpvl2(&self) -> FPVL2_R[src]

Bit 18 - Fault Protection Value for PWML output on channel 2

pub fn fpvl3(&self) -> FPVL3_R[src]

Bit 19 - Fault Protection Value for PWML output on channel 3

impl R<u32, Reg<u32, _FPE>>[src]

pub fn fpe0(&self) -> FPE0_R[src]

Bits 0:7 - Fault Protection Enable for channel 0

pub fn fpe1(&self) -> FPE1_R[src]

Bits 8:15 - Fault Protection Enable for channel 1

pub fn fpe2(&self) -> FPE2_R[src]

Bits 16:23 - Fault Protection Enable for channel 2

pub fn fpe3(&self) -> FPE3_R[src]

Bits 24:31 - Fault Protection Enable for channel 3

impl R<u32, Reg<u32, _ELMR>>[src]

pub fn csel0(&self) -> CSEL0_R[src]

Bit 0 - Comparison 0 Selection

pub fn csel1(&self) -> CSEL1_R[src]

Bit 1 - Comparison 1 Selection

pub fn csel2(&self) -> CSEL2_R[src]

Bit 2 - Comparison 2 Selection

pub fn csel3(&self) -> CSEL3_R[src]

Bit 3 - Comparison 3 Selection

pub fn csel4(&self) -> CSEL4_R[src]

Bit 4 - Comparison 4 Selection

pub fn csel5(&self) -> CSEL5_R[src]

Bit 5 - Comparison 5 Selection

pub fn csel6(&self) -> CSEL6_R[src]

Bit 6 - Comparison 6 Selection

pub fn csel7(&self) -> CSEL7_R[src]

Bit 7 - Comparison 7 Selection

impl R<u32, Reg<u32, _SSPR>>[src]

pub fn sprd(&self) -> SPRD_R[src]

Bits 0:23 - Spread Spectrum Limit Value

pub fn sprdm(&self) -> SPRDM_R[src]

Bit 24 - Spread Spectrum Counter Mode

impl R<u32, Reg<u32, _SMMR>>[src]

pub fn gcen0(&self) -> GCEN0_R[src]

Bit 0 - Gray Count ENable

pub fn gcen1(&self) -> GCEN1_R[src]

Bit 1 - Gray Count ENable

pub fn down0(&self) -> DOWN0_R[src]

Bit 16 - DOWN Count

pub fn down1(&self) -> DOWN1_R[src]

Bit 17 - DOWN Count

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpsws0(&self) -> WPSWS0_R[src]

Bit 0 - Write Protect SW Status

pub fn wpsws1(&self) -> WPSWS1_R[src]

Bit 1 - Write Protect SW Status

pub fn wpsws2(&self) -> WPSWS2_R[src]

Bit 2 - Write Protect SW Status

pub fn wpsws3(&self) -> WPSWS3_R[src]

Bit 3 - Write Protect SW Status

pub fn wpsws4(&self) -> WPSWS4_R[src]

Bit 4 - Write Protect SW Status

pub fn wpsws5(&self) -> WPSWS5_R[src]

Bit 5 - Write Protect SW Status

pub fn wpvs(&self) -> WPVS_R[src]

Bit 7 - Write Protect Violation Status

pub fn wphws0(&self) -> WPHWS0_R[src]

Bit 8 - Write Protect HW Status

pub fn wphws1(&self) -> WPHWS1_R[src]

Bit 9 - Write Protect HW Status

pub fn wphws2(&self) -> WPHWS2_R[src]

Bit 10 - Write Protect HW Status

pub fn wphws3(&self) -> WPHWS3_R[src]

Bit 11 - Write Protect HW Status

pub fn wphws4(&self) -> WPHWS4_R[src]

Bit 12 - Write Protect HW Status

pub fn wphws5(&self) -> WPHWS5_R[src]

Bit 13 - Write Protect HW Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 16:31 - Write Protect Violation Source

impl R<u32, Reg<u32, _CMPV0>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM0>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV1>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV2>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM2>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV3>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM3>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV4>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM4>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV5>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM5>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV6>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM6>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u32, Reg<u32, _CMPV7>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:23 - Comparison x Value

pub fn cvm(&self) -> CVM_R[src]

Bit 24 - Comparison x Value Mode

impl R<u32, Reg<u32, _CMPM7>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Comparison x Enable

pub fn ctr(&self) -> CTR_R[src]

Bits 4:7 - Comparison x Trigger

pub fn cpr(&self) -> CPR_R[src]

Bits 8:11 - Comparison x Period

pub fn cprcnt(&self) -> CPRCNT_R[src]

Bits 12:15 - Comparison x Period Counter

pub fn cupr(&self) -> CUPR_R[src]

Bits 16:19 - Comparison x Update Period

pub fn cuprcnt(&self) -> CUPRCNT_R[src]

Bits 20:23 - Comparison x Update Period Counter

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR0>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn tcts(&self) -> TCTS_R[src]

Bit 13 - Timer Counter Trigger Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY0>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD0>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT0>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT0>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR1>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn tcts(&self) -> TCTS_R[src]

Bit 13 - Timer Counter Trigger Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY1>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD1>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT1>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT1>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR2>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn tcts(&self) -> TCTS_R[src]

Bit 13 - Timer Counter Trigger Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY2>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD2>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT2>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT2>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u8, CPRE_A>[src]

pub fn variant(&self) -> Variant<u8, CPRE_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div_2(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_2

pub fn is_mck_div_4(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_4

pub fn is_mck_div_8(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_8

pub fn is_mck_div_16(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_16

pub fn is_mck_div_32(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_32

pub fn is_mck_div_64(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_64

pub fn is_mck_div_128(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_128

pub fn is_mck_div_256(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_256

pub fn is_mck_div_512(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_512

pub fn is_mck_div_1024(&self) -> bool[src]

Checks if the value of the field is MCK_DIV_1024

pub fn is_clka(&self) -> bool[src]

Checks if the value of the field is CLKA

pub fn is_clkb(&self) -> bool[src]

Checks if the value of the field is CLKB

impl R<u32, Reg<u32, _CMR3>>[src]

pub fn cpre(&self) -> CPRE_R[src]

Bits 0:3 - Channel Pre-scaler

pub fn calg(&self) -> CALG_R[src]

Bit 8 - Channel Alignment

pub fn cpol(&self) -> CPOL_R[src]

Bit 9 - Channel Polarity

pub fn ces(&self) -> CES_R[src]

Bit 10 - Counter Event Selection

pub fn tcts(&self) -> TCTS_R[src]

Bit 13 - Timer Counter Trigger Selection

pub fn dte(&self) -> DTE_R[src]

Bit 16 - Dead-Time Generator Enable

pub fn dthi(&self) -> DTHI_R[src]

Bit 17 - Dead-Time PWMHx Output Inverted

pub fn dtli(&self) -> DTLI_R[src]

Bit 18 - Dead-Time PWMLx Output Inverted

impl R<u32, Reg<u32, _CDTY3>>[src]

pub fn cdty(&self) -> CDTY_R[src]

Bits 0:23 - Channel Duty-Cycle

impl R<u32, Reg<u32, _CPRD3>>[src]

pub fn cprd(&self) -> CPRD_R[src]

Bits 0:23 - Channel Period

impl R<u32, Reg<u32, _CCNT3>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:23 - Channel Counter Register

impl R<u32, Reg<u32, _DT3>>[src]

pub fn dth(&self) -> DTH_R[src]

Bits 0:15 - Dead-Time Value for PWMHx Output

pub fn dtl(&self) -> DTL_R[src]

Bits 16:31 - Dead-Time Value for PWMLx Output

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<bool, DUALBUFF_A>[src]

pub fn variant(&self) -> DUALBUFF_A[src]

Get enumerated values variant

pub fn is_inactive(&self) -> bool[src]

Checks if the value of the field is INACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<u8, SMOD_A>[src]

pub fn variant(&self) -> Variant<u8, SMOD_A>[src]

Get enumerated values variant

pub fn is_manual_start(&self) -> bool[src]

Checks if the value of the field is MANUAL_START

pub fn is_auto_start(&self) -> bool[src]

Checks if the value of the field is AUTO_START

pub fn is_idatar0_start(&self) -> bool[src]

Checks if the value of the field is IDATAR0_START

impl R<u8, KEYSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, KEYSIZE_A>[src]

Get enumerated values variant

pub fn is_aes128(&self) -> bool[src]

Checks if the value of the field is AES128

pub fn is_aes192(&self) -> bool[src]

Checks if the value of the field is AES192

pub fn is_aes256(&self) -> bool[src]

Checks if the value of the field is AES256

impl R<u8, OPMOD_A>[src]

pub fn variant(&self) -> Variant<u8, OPMOD_A>[src]

Get enumerated values variant

pub fn is_ecb(&self) -> bool[src]

Checks if the value of the field is ECB

pub fn is_cbc(&self) -> bool[src]

Checks if the value of the field is CBC

pub fn is_ofb(&self) -> bool[src]

Checks if the value of the field is OFB

pub fn is_cfb(&self) -> bool[src]

Checks if the value of the field is CFB

pub fn is_ctr(&self) -> bool[src]

Checks if the value of the field is CTR

impl R<u8, CFBS_A>[src]

pub fn variant(&self) -> Variant<u8, CFBS_A>[src]

Get enumerated values variant

pub fn is_size_128bit(&self) -> bool[src]

Checks if the value of the field is SIZE_128BIT

pub fn is_size_64bit(&self) -> bool[src]

Checks if the value of the field is SIZE_64BIT

pub fn is_size_32bit(&self) -> bool[src]

Checks if the value of the field is SIZE_32BIT

pub fn is_size_16bit(&self) -> bool[src]

Checks if the value of the field is SIZE_16BIT

pub fn is_size_8bit(&self) -> bool[src]

Checks if the value of the field is SIZE_8BIT

impl R<u8, CKEY_A>[src]

pub fn variant(&self) -> Variant<u8, CKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MR>>[src]

pub fn cipher(&self) -> CIPHER_R[src]

Bit 0 - Processing Mode

pub fn dualbuff(&self) -> DUALBUFF_R[src]

Bit 3 - Dual Input Buffer

pub fn procdly(&self) -> PROCDLY_R[src]

Bits 4:7 - Processing Delay

pub fn smod(&self) -> SMOD_R[src]

Bits 8:9 - Start Mode

pub fn keysize(&self) -> KEYSIZE_R[src]

Bits 10:11 - Key Size

pub fn opmod(&self) -> OPMOD_R[src]

Bits 12:14 - Operation Mode

pub fn lod(&self) -> LOD_R[src]

Bit 15 - Last Output Data Mode

pub fn cfbs(&self) -> CFBS_R[src]

Bits 16:18 - Cipher Feedback Data Size

pub fn ckey(&self) -> CKEY_R[src]

Bits 20:23 - Key

impl R<u32, Reg<u32, _IMR>>[src]

pub fn datrdy(&self) -> DATRDY_R[src]

Bit 0 - Data Ready Interrupt Mask

pub fn urad(&self) -> URAD_R[src]

Bit 8 - Unspecified Register Access Detection Interrupt Mask

impl R<u8, URAT_A>[src]

pub fn variant(&self) -> Variant<u8, URAT_A>[src]

Get enumerated values variant

pub fn is_idr_wr_processing(&self) -> bool[src]

Checks if the value of the field is IDR_WR_PROCESSING

pub fn is_odr_rd_processing(&self) -> bool[src]

Checks if the value of the field is ODR_RD_PROCESSING

pub fn is_mr_wr_processing(&self) -> bool[src]

Checks if the value of the field is MR_WR_PROCESSING

pub fn is_odr_rd_subkgen(&self) -> bool[src]

Checks if the value of the field is ODR_RD_SUBKGEN

pub fn is_mr_wr_subkgen(&self) -> bool[src]

Checks if the value of the field is MR_WR_SUBKGEN

pub fn is_wor_rd_access(&self) -> bool[src]

Checks if the value of the field is WOR_RD_ACCESS

impl R<u32, Reg<u32, _ISR>>[src]

pub fn datrdy(&self) -> DATRDY_R[src]

Bit 0 - Data Ready

pub fn urad(&self) -> URAD_R[src]

Bit 8 - Unspecified Register Access Detection Status

pub fn urat(&self) -> URAT_R[src]

Bits 12:15 - Unspecified Register Access

impl R<u32, Reg<u32, _ODATAR>>[src]

pub fn odata(&self) -> ODATA_R[src]

Bits 0:31 - Output Data

impl R<u32, Reg<u32, _MR>>[src]

pub fn canen(&self) -> CANEN_R[src]

Bit 0 - CAN Controller Enable

pub fn lpm(&self) -> LPM_R[src]

Bit 1 - Disable/Enable Low Power Mode

pub fn abm(&self) -> ABM_R[src]

Bit 2 - Disable/Enable Autobaud/Listen mode

pub fn ovl(&self) -> OVL_R[src]

Bit 3 - Disable/Enable Overload Frame

pub fn teof(&self) -> TEOF_R[src]

Bit 4 - Timestamp messages at each end of Frame

pub fn ttm(&self) -> TTM_R[src]

Bit 5 - Disable/Enable Time Triggered Mode

pub fn timfrz(&self) -> TIMFRZ_R[src]

Bit 6 - Enable Timer Freeze

pub fn drpt(&self) -> DRPT_R[src]

Bit 7 - Disable Repeat

impl R<u32, Reg<u32, _IMR>>[src]

pub fn mb0(&self) -> MB0_R[src]

Bit 0 - Mailbox 0 Interrupt Mask

pub fn mb1(&self) -> MB1_R[src]

Bit 1 - Mailbox 1 Interrupt Mask

pub fn mb2(&self) -> MB2_R[src]

Bit 2 - Mailbox 2 Interrupt Mask

pub fn mb3(&self) -> MB3_R[src]

Bit 3 - Mailbox 3 Interrupt Mask

pub fn mb4(&self) -> MB4_R[src]

Bit 4 - Mailbox 4 Interrupt Mask

pub fn mb5(&self) -> MB5_R[src]

Bit 5 - Mailbox 5 Interrupt Mask

pub fn mb6(&self) -> MB6_R[src]

Bit 6 - Mailbox 6 Interrupt Mask

pub fn mb7(&self) -> MB7_R[src]

Bit 7 - Mailbox 7 Interrupt Mask

pub fn erra(&self) -> ERRA_R[src]

Bit 16 - Error Active Mode Interrupt Mask

pub fn warn(&self) -> WARN_R[src]

Bit 17 - Warning Limit Interrupt Mask

pub fn errp(&self) -> ERRP_R[src]

Bit 18 - Error Passive Mode Interrupt Mask

pub fn boff(&self) -> BOFF_R[src]

Bit 19 - Bus Off Mode Interrupt Mask

pub fn sleep(&self) -> SLEEP_R[src]

Bit 20 - Sleep Interrupt Mask

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 21 - Wakeup Interrupt Mask

pub fn tovf(&self) -> TOVF_R[src]

Bit 22 - Timer Overflow Interrupt Mask

pub fn tstp(&self) -> TSTP_R[src]

Bit 23 - Timestamp Interrupt Mask

pub fn cerr(&self) -> CERR_R[src]

Bit 24 - CRC Error Interrupt Mask

pub fn serr(&self) -> SERR_R[src]

Bit 25 - Stuffing Error Interrupt Mask

pub fn aerr(&self) -> AERR_R[src]

Bit 26 - Acknowledgment Error Interrupt Mask

pub fn ferr(&self) -> FERR_R[src]

Bit 27 - Form Error Interrupt Mask

pub fn berr(&self) -> BERR_R[src]

Bit 28 - Bit Error Interrupt Mask

impl R<u32, Reg<u32, _SR>>[src]

pub fn mb0(&self) -> MB0_R[src]

Bit 0 - Mailbox 0 Event

pub fn mb1(&self) -> MB1_R[src]

Bit 1 - Mailbox 1 Event

pub fn mb2(&self) -> MB2_R[src]

Bit 2 - Mailbox 2 Event

pub fn mb3(&self) -> MB3_R[src]

Bit 3 - Mailbox 3 Event

pub fn mb4(&self) -> MB4_R[src]

Bit 4 - Mailbox 4 Event

pub fn mb5(&self) -> MB5_R[src]

Bit 5 - Mailbox 5 Event

pub fn mb6(&self) -> MB6_R[src]

Bit 6 - Mailbox 6 Event

pub fn mb7(&self) -> MB7_R[src]

Bit 7 - Mailbox 7 Event

pub fn erra(&self) -> ERRA_R[src]

Bit 16 - Error Active Mode

pub fn warn(&self) -> WARN_R[src]

Bit 17 - Warning Limit

pub fn errp(&self) -> ERRP_R[src]

Bit 18 - Error Passive Mode

pub fn boff(&self) -> BOFF_R[src]

Bit 19 - Bus Off Mode

pub fn sleep(&self) -> SLEEP_R[src]

Bit 20 - CAN controller in Low power Mode

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 21 - CAN controller is not in Low power Mode

pub fn tovf(&self) -> TOVF_R[src]

Bit 22 - Timer Overflow

pub fn tstp(&self) -> TSTP_R[src]

Bit 23 - Timestamp

pub fn cerr(&self) -> CERR_R[src]

Bit 24 - Mailbox CRC Error

pub fn serr(&self) -> SERR_R[src]

Bit 25 - Mailbox Stuffing Error

pub fn aerr(&self) -> AERR_R[src]

Bit 26 - Acknowledgment Error

pub fn ferr(&self) -> FERR_R[src]

Bit 27 - Form Error

pub fn berr(&self) -> BERR_R[src]

Bit 28 - Bit Error

pub fn rbsy(&self) -> RBSY_R[src]

Bit 29 - Receiver busy

pub fn tbsy(&self) -> TBSY_R[src]

Bit 30 - Transmitter busy

pub fn ovlsy(&self) -> OVLSY_R[src]

Bit 31 - Overload busy

impl R<bool, SMP_A>[src]

pub fn variant(&self) -> SMP_A[src]

Get enumerated values variant

pub fn is_once(&self) -> bool[src]

Checks if the value of the field is ONCE

pub fn is_three(&self) -> bool[src]

Checks if the value of the field is THREE

impl R<u32, Reg<u32, _BR>>[src]

pub fn phase2(&self) -> PHASE2_R[src]

Bits 0:2 - Phase 2 segment

pub fn phase1(&self) -> PHASE1_R[src]

Bits 4:6 - Phase 1 segment

pub fn propag(&self) -> PROPAG_R[src]

Bits 8:10 - Programming time segment

pub fn sjw(&self) -> SJW_R[src]

Bits 12:13 - Re-synchronization jump width

pub fn brp(&self) -> BRP_R[src]

Bits 16:22 - Baudrate Prescaler.

pub fn smp(&self) -> SMP_R[src]

Bit 24 - Sampling Mode

impl R<u32, Reg<u32, _TIM>>[src]

pub fn timer(&self) -> TIMER_R[src]

Bits 0:15 - Timer

impl R<u32, Reg<u32, _TIMESTP>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timestamp

impl R<u32, Reg<u32, _ECR>>[src]

pub fn rec(&self) -> REC_R[src]

Bits 0:7 - Receive Error Counter

pub fn tec(&self) -> TEC_R[src]

Bits 16:24 - Transmit Error Counter

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - SPI Write Protection Key Password.

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:15 - Write Protection Violation Source

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR0>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM0>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID0>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID0>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR0>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL0>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH0>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR1>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM1>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID1>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID1>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR1>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL1>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH1>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR2>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM2>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID2>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID2>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR2>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL2>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH2>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR3>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM3>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID3>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID3>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR3>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL3>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH3>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR4>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM4>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID4>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID4>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR4>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL4>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH4>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR5>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM5>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID5>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID5>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR5>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL5>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH5>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR6>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM6>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID6>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID6>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR6>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL6>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH6>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u8, MOT_A>[src]

pub fn variant(&self) -> Variant<u8, MOT_A>[src]

Get enumerated values variant

pub fn is_mb_disabled(&self) -> bool[src]

Checks if the value of the field is MB_DISABLED

pub fn is_mb_rx(&self) -> bool[src]

Checks if the value of the field is MB_RX

pub fn is_mb_rx_overwrite(&self) -> bool[src]

Checks if the value of the field is MB_RX_OVERWRITE

pub fn is_mb_tx(&self) -> bool[src]

Checks if the value of the field is MB_TX

pub fn is_mb_consumer(&self) -> bool[src]

Checks if the value of the field is MB_CONSUMER

pub fn is_mb_producer(&self) -> bool[src]

Checks if the value of the field is MB_PRODUCER

impl R<u32, Reg<u32, _MMR7>>[src]

pub fn mtimemark(&self) -> MTIMEMARK_R[src]

Bits 0:15 - Mailbox Timemark

pub fn prior(&self) -> PRIOR_R[src]

Bits 16:19 - Mailbox Priority

pub fn mot(&self) -> MOT_R[src]

Bits 24:26 - Mailbox Object Type

impl R<u32, Reg<u32, _MAM7>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MID7>>[src]

pub fn midv_b(&self) -> MIDVB_R[src]

Bits 0:17 - Complementary bits for identifier in extended frame mode

pub fn midv_a(&self) -> MIDVA_R[src]

Bits 18:28 - Identifier for standard frame mode

pub fn mide(&self) -> MIDE_R[src]

Bit 29 - Identifier Version

impl R<u32, Reg<u32, _MFID7>>[src]

pub fn mfid(&self) -> MFID_R[src]

Bits 0:28 - Family ID

impl R<u32, Reg<u32, _MSR7>>[src]

pub fn mtimestamp(&self) -> MTIMESTAMP_R[src]

Bits 0:15 - Timer value

pub fn mdlc(&self) -> MDLC_R[src]

Bits 16:19 - Mailbox Data Length Code

pub fn mrtr(&self) -> MRTR_R[src]

Bit 20 - Mailbox Remote Transmission Request

pub fn mabt(&self) -> MABT_R[src]

Bit 22 - Mailbox Message Abort

pub fn mrdy(&self) -> MRDY_R[src]

Bit 23 - Mailbox Ready

pub fn mmi(&self) -> MMI_R[src]

Bit 24 - Mailbox Message Ignored

impl R<u32, Reg<u32, _MDL7>>[src]

pub fn mdl(&self) -> MDL_R[src]

Bits 0:31 - Message Data Low Value

impl R<u32, Reg<u32, _MDH7>>[src]

pub fn mdh(&self) -> MDH_R[src]

Bits 0:31 - Message Data High Value

impl R<u32, Reg<u32, _NCR>>[src]

pub fn lbl(&self) -> LBL_R[src]

Bit 1 - Loop Back Local

pub fn rxen(&self) -> RXEN_R[src]

Bit 2 - Receive Enable

pub fn txen(&self) -> TXEN_R[src]

Bit 3 - Transmit Enable

pub fn mpe(&self) -> MPE_R[src]

Bit 4 - Management Port Enable

pub fn clrstat(&self) -> CLRSTAT_R[src]

Bit 5 - Clear Statistics Registers

pub fn incstat(&self) -> INCSTAT_R[src]

Bit 6 - Increment Statistics Registers

pub fn westat(&self) -> WESTAT_R[src]

Bit 7 - Write Enable for Statistics Registers

pub fn bp(&self) -> BP_R[src]

Bit 8 - Back pressure

pub fn tstart(&self) -> TSTART_R[src]

Bit 9 - Start Transmission

pub fn thalt(&self) -> THALT_R[src]

Bit 10 - Transmit Halt

pub fn txpf(&self) -> TXPF_R[src]

Bit 11 - Transmit Pause Frame

pub fn txzqpf(&self) -> TXZQPF_R[src]

Bit 12 - Transmit Zero Quantum Pause Frame

pub fn srtsm(&self) -> SRTSM_R[src]

Bit 15 - Store Receive Time Stamp to Memory

pub fn enpbpr(&self) -> ENPBPR_R[src]

Bit 16 - Enable PFC Priority-based Pause Reception

pub fn txpbpf(&self) -> TXPBPF_R[src]

Bit 17 - Transmit PFC Priority-based Pause Frame

pub fn fnp(&self) -> FNP_R[src]

Bit 18 - Flush Next Packet

impl R<u8, CLK_A>[src]

pub fn variant(&self) -> Variant<u8, CLK_A>[src]

Get enumerated values variant

pub fn is_mck_8(&self) -> bool[src]

Checks if the value of the field is MCK_8

pub fn is_mck_16(&self) -> bool[src]

Checks if the value of the field is MCK_16

pub fn is_mck_32(&self) -> bool[src]

Checks if the value of the field is MCK_32

pub fn is_mck_48(&self) -> bool[src]

Checks if the value of the field is MCK_48

pub fn is_mck_64(&self) -> bool[src]

Checks if the value of the field is MCK_64

pub fn is_mck_96(&self) -> bool[src]

Checks if the value of the field is MCK_96

impl R<u32, Reg<u32, _NCFGR>>[src]

pub fn spd(&self) -> SPD_R[src]

Bit 0 - Speed

pub fn fd(&self) -> FD_R[src]

Bit 1 - Full Duplex

pub fn dnvlan(&self) -> DNVLAN_R[src]

Bit 2 - Discard Non-VLAN FRAMES

pub fn jframe(&self) -> JFRAME_R[src]

Bit 3 - Jumbo Frame Size

pub fn caf(&self) -> CAF_R[src]

Bit 4 - Copy All Frames

pub fn nbc(&self) -> NBC_R[src]

Bit 5 - No Broadcast

pub fn mtihen(&self) -> MTIHEN_R[src]

Bit 6 - Multicast Hash Enable

pub fn unihen(&self) -> UNIHEN_R[src]

Bit 7 - Unicast Hash Enable

pub fn maxfs(&self) -> MAXFS_R[src]

Bit 8 - 1536 Maximum Frame Size

pub fn rty(&self) -> RTY_R[src]

Bit 12 - Retry Test

pub fn pen(&self) -> PEN_R[src]

Bit 13 - Pause Enable

pub fn rxbufo(&self) -> RXBUFO_R[src]

Bits 14:15 - Receive Buffer Offset

pub fn lferd(&self) -> LFERD_R[src]

Bit 16 - Length Field Error Frame Discard

pub fn rfcs(&self) -> RFCS_R[src]

Bit 17 - Remove FCS

pub fn clk(&self) -> CLK_R[src]

Bits 18:20 - MDC CLock Division

pub fn dbw(&self) -> DBW_R[src]

Bits 21:22 - Data Bus Width

pub fn dcpf(&self) -> DCPF_R[src]

Bit 23 - Disable Copy of Pause Frames

pub fn rxcoen(&self) -> RXCOEN_R[src]

Bit 24 - Receive Checksum Offload Enable

pub fn efrhd(&self) -> EFRHD_R[src]

Bit 25 - Enable Frames Received in Half Duplex

pub fn irxfcs(&self) -> IRXFCS_R[src]

Bit 26 - Ignore RX FCS

pub fn ipgsen(&self) -> IPGSEN_R[src]

Bit 28 - IP Stretch Enable

pub fn rxbp(&self) -> RXBP_R[src]

Bit 29 - Receive Bad Preamble

pub fn irxer(&self) -> IRXER_R[src]

Bit 30 - Ignore IPG GRXER

impl R<u32, Reg<u32, _NSR>>[src]

pub fn mdio(&self) -> MDIO_R[src]

Bit 1 - MDIO Input Status

pub fn idle(&self) -> IDLE_R[src]

Bit 2 - PHY Management Logic Idle

impl R<u32, Reg<u32, _UR>>[src]

pub fn mii(&self) -> MII_R[src]

Bit 0 - MII Mode

impl R<u8, FBLDO_A>[src]

pub fn variant(&self) -> Variant<u8, FBLDO_A>[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_incr4(&self) -> bool[src]

Checks if the value of the field is INCR4

pub fn is_incr8(&self) -> bool[src]

Checks if the value of the field is INCR8

pub fn is_incr16(&self) -> bool[src]

Checks if the value of the field is INCR16

impl R<u32, Reg<u32, _DCFGR>>[src]

pub fn fbldo(&self) -> FBLDO_R[src]

Bits 0:4 - Fixed Burst Length for DMA Data Operations:

pub fn esma(&self) -> ESMA_R[src]

Bit 6 - Endian Swap Mode Enable for Management Descriptor Accesses

pub fn espa(&self) -> ESPA_R[src]

Bit 7 - Endian Swap Mode Enable for Packet Data Accesses

pub fn drbs(&self) -> DRBS_R[src]

Bits 16:23 - DMA Receive Buffer Size

impl R<u32, Reg<u32, _TSR>>[src]

pub fn ubr(&self) -> UBR_R[src]

Bit 0 - Used Bit Read

pub fn col(&self) -> COL_R[src]

Bit 1 - Collision Occurred

pub fn rle(&self) -> RLE_R[src]

Bit 2 - Retry Limit Exceeded

pub fn txgo(&self) -> TXGO_R[src]

Bit 3 - Transmit Go

pub fn tfc(&self) -> TFC_R[src]

Bit 4 - Transmit Frame Corruption Due to AHB Error

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 5 - Transmit Complete

pub fn und(&self) -> UND_R[src]

Bit 6 - Transmit Underrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 8 - HRESP Not OK

impl R<u32, Reg<u32, _RBQB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Receive Buffer Queue Base Address

impl R<u32, Reg<u32, _TBQB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Transmit Buffer Queue Base Address

impl R<u32, Reg<u32, _RSR>>[src]

pub fn bna(&self) -> BNA_R[src]

Bit 0 - Buffer Not Available

pub fn rec(&self) -> REC_R[src]

Bit 1 - Frame Received

pub fn rxovr(&self) -> RXOVR_R[src]

Bit 2 - Receive Overrun

pub fn hno(&self) -> HNO_R[src]

Bit 3 - HRESP Not OK

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mfs(&self) -> MFS_R[src]

Bit 0 - Management Frame Sent

pub fn rcomp(&self) -> RCOMP_R[src]

Bit 1 - Receive Complete

pub fn rxubr(&self) -> RXUBR_R[src]

Bit 2 - RX Used Bit Read

pub fn txubr(&self) -> TXUBR_R[src]

Bit 3 - TX Used Bit Read

pub fn tur(&self) -> TUR_R[src]

Bit 4 - Transmit Underrun

pub fn rlex(&self) -> RLEX_R[src]

Bit 5 - Retry Limit Exceeded

pub fn tfc(&self) -> TFC_R[src]

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 7 - Transmit Complete

pub fn rovr(&self) -> ROVR_R[src]

Bit 10 - Receive Overrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 11 - HRESP Not OK

pub fn pfnz(&self) -> PFNZ_R[src]

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&self) -> PTZ_R[src]

Bit 13 - Pause Time Zero

pub fn pftr(&self) -> PFTR_R[src]

Bit 14 - Pause Frame Transmitted

pub fn drqfr(&self) -> DRQFR_R[src]

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&self) -> SFR_R[src]

Bit 19 - PTP Sync Frame Received

pub fn drqft(&self) -> DRQFT_R[src]

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&self) -> SFT_R[src]

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&self) -> PDRQFR_R[src]

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&self) -> PDRSFR_R[src]

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&self) -> PDRQFT_R[src]

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&self) -> PDRSFT_R[src]

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&self) -> SRI_R[src]

Bit 26 - TSU Seconds Register Increment

pub fn wol(&self) -> WOL_R[src]

Bit 28 - Wake On LAN

impl R<u32, Reg<u32, _IMR>>[src]

pub fn mfs(&self) -> MFS_R[src]

Bit 0 - Management Frame Sent

pub fn rcomp(&self) -> RCOMP_R[src]

Bit 1 - Receive Complete

pub fn rxubr(&self) -> RXUBR_R[src]

Bit 2 - RX Used Bit Read

pub fn txubr(&self) -> TXUBR_R[src]

Bit 3 - TX Used Bit Read

pub fn tur(&self) -> TUR_R[src]

Bit 4 - Transmit Underrun

pub fn rlex(&self) -> RLEX_R[src]

Bit 5 - Retry Limit Exceeded

pub fn tfc(&self) -> TFC_R[src]

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 7 - Transmit Complete

pub fn rovr(&self) -> ROVR_R[src]

Bit 10 - Receive Overrun

pub fn hresp(&self) -> HRESP_R[src]

Bit 11 - HRESP Not OK

pub fn pfnz(&self) -> PFNZ_R[src]

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&self) -> PTZ_R[src]

Bit 13 - Pause Time Zero

pub fn pftr(&self) -> PFTR_R[src]

Bit 14 - Pause Frame Transmitted

pub fn exint(&self) -> EXINT_R[src]

Bit 15 - External Interrupt

pub fn drqfr(&self) -> DRQFR_R[src]

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&self) -> SFR_R[src]

Bit 19 - PTP Sync Frame Received

pub fn drqft(&self) -> DRQFT_R[src]

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&self) -> SFT_R[src]

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&self) -> PDRQFR_R[src]

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&self) -> PDRSFR_R[src]

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&self) -> PDRQFT_R[src]

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&self) -> PDRSFT_R[src]

Bit 25 - PDelay Response Frame Transmitted

impl R<u32, Reg<u32, _MAN>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:15 - PHY Data

pub fn wtn(&self) -> WTN_R[src]

Bits 16:17 - Write Ten

pub fn rega(&self) -> REGA_R[src]

Bits 18:22 - Register Address

pub fn phya(&self) -> PHYA_R[src]

Bits 23:27 - PHY Address

pub fn op(&self) -> OP_R[src]

Bits 28:29 - Operation

pub fn cltto(&self) -> CLTTO_R[src]

Bit 30 - Clause 22 Operation

pub fn wzo(&self) -> WZO_R[src]

Bit 31 - Write ZERO

impl R<u32, Reg<u32, _RPQ>>[src]

pub fn rpq(&self) -> RPQ_R[src]

Bits 0:15 - Received Pause Quantum

impl R<u32, Reg<u32, _TPQ>>[src]

pub fn tpq(&self) -> TPQ_R[src]

Bits 0:15 - Transmit Pause Quantum

impl R<u32, Reg<u32, _HRB>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Hash Address

impl R<u32, Reg<u32, _HRT>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Hash Address

impl R<u32, Reg<u32, _SAB1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 1

impl R<u32, Reg<u32, _SAT1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 1

impl R<u32, Reg<u32, _SAB2>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 2

impl R<u32, Reg<u32, _SAT2>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 2

impl R<u32, Reg<u32, _SAB3>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 3

impl R<u32, Reg<u32, _SAT3>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 3

impl R<u32, Reg<u32, _SAB4>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 4

impl R<u32, Reg<u32, _SAT4>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 4

impl R<u32, Reg<u32, _TIDM>>[src]

pub fn tid(&self) -> TID_R[src]

Bits 0:15 - Type ID Match 1

impl R<u32, Reg<u32, _IPGS>>[src]

pub fn fl(&self) -> FL_R[src]

Bits 0:15 - Frame Length

impl R<u32, Reg<u32, _SVLAN>>[src]

pub fn vlan_type(&self) -> VLAN_TYPE_R[src]

Bits 0:15 - User Defined VLAN_TYPE Field

pub fn esvlan(&self) -> ESVLAN_R[src]

Bit 31 - Enable Stacked VLAN Processing Mode

impl R<u32, Reg<u32, _TPFCP>>[src]

pub fn pev(&self) -> PEV_R[src]

Bits 0:7 - Priority Enable Vector

pub fn pq(&self) -> PQ_R[src]

Bits 8:15 - Pause Quantum

impl R<u32, Reg<u32, _SAMB1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:31 - Specific Address 1 Mask

impl R<u32, Reg<u32, _SAMT1>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 0:15 - Specific Address 1 Mask

impl R<u32, Reg<u32, _OTLO>>[src]

pub fn txo(&self) -> TXO_R[src]

Bits 0:31 - Transmitted Octets

impl R<u32, Reg<u32, _OTHI>>[src]

pub fn txo(&self) -> TXO_R[src]

Bits 0:15 - Transmitted Octets

impl R<u32, Reg<u32, _FT>>[src]

pub fn ftx(&self) -> FTX_R[src]

Bits 0:31 - Frames Transmitted without Error

impl R<u32, Reg<u32, _BCFT>>[src]

pub fn bftx(&self) -> BFTX_R[src]

Bits 0:31 - Broadcast Frames Transmitted without Error

impl R<u32, Reg<u32, _MFT>>[src]

pub fn mftx(&self) -> MFTX_R[src]

Bits 0:31 - Multicast Frames Transmitted without Error

impl R<u32, Reg<u32, _PFT>>[src]

pub fn pftx(&self) -> PFTX_R[src]

Bits 0:15 - Pause Frames Transmitted Register

impl R<u32, Reg<u32, _BFT64>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 64 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT127>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 65 to 127 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT255>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 128 to 255 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT511>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 256 to 511 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT1023>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 512 to 1023 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TBFT1518>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - 1024 to 1518 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _GTBFT1518>>[src]

pub fn nftx(&self) -> NFTX_R[src]

Bits 0:31 - Greater than 1518 Byte Frames Transmitted without Error

impl R<u32, Reg<u32, _TUR>>[src]

pub fn txunr(&self) -> TXUNR_R[src]

Bits 0:9 - Transmit Underruns

impl R<u32, Reg<u32, _SCF>>[src]

pub fn scol(&self) -> SCOL_R[src]

Bits 0:17 - Single Collision

impl R<u32, Reg<u32, _MCF>>[src]

pub fn mcol(&self) -> MCOL_R[src]

Bits 0:17 - Multiple Collision

impl R<u32, Reg<u32, _EC>>[src]

pub fn xcol(&self) -> XCOL_R[src]

Bits 0:9 - Excessive Collisions

impl R<u32, Reg<u32, _LC>>[src]

pub fn lcol(&self) -> LCOL_R[src]

Bits 0:9 - Late Collisions

impl R<u32, Reg<u32, _DTF>>[src]

pub fn deft(&self) -> DEFT_R[src]

Bits 0:17 - Deferred Transmission

impl R<u32, Reg<u32, _CSE>>[src]

pub fn csr(&self) -> CSR_R[src]

Bits 0:9 - Carrier Sense Error

impl R<u32, Reg<u32, _ORLO>>[src]

pub fn rxo(&self) -> RXO_R[src]

Bits 0:31 - Received Octets

impl R<u32, Reg<u32, _ORHI>>[src]

pub fn rxo(&self) -> RXO_R[src]

Bits 0:15 - Received Octets

impl R<u32, Reg<u32, _FR>>[src]

pub fn frx(&self) -> FRX_R[src]

Bits 0:31 - Frames Received without Error

impl R<u32, Reg<u32, _BCFR>>[src]

pub fn bfrx(&self) -> BFRX_R[src]

Bits 0:31 - Broadcast Frames Received without Error

impl R<u32, Reg<u32, _MFR>>[src]

pub fn mfrx(&self) -> MFRX_R[src]

Bits 0:31 - Multicast Frames Received without Error

impl R<u32, Reg<u32, _PFR>>[src]

pub fn pfrx(&self) -> PFRX_R[src]

Bits 0:15 - Pause Frames Received Register

impl R<u32, Reg<u32, _BFR64>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 64 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR127>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 65 to 127 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR255>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 128 to 255 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR511>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 256 to 511 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR1023>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 512 to 1023 Byte Frames Received without Error

impl R<u32, Reg<u32, _TBFR1518>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 1024 to 1518 Byte Frames Received without Error

impl R<u32, Reg<u32, _TMXBFR>>[src]

pub fn nfrx(&self) -> NFRX_R[src]

Bits 0:31 - 1519 to Maximum Byte Frames Received without Error

impl R<u32, Reg<u32, _UFR>>[src]

pub fn ufrx(&self) -> UFRX_R[src]

Bits 0:9 - Undersize Frames Received

impl R<u32, Reg<u32, _OFR>>[src]

pub fn ofrx(&self) -> OFRX_R[src]

Bits 0:9 - Oversized Frames Received

impl R<u32, Reg<u32, _JR>>[src]

pub fn jrx(&self) -> JRX_R[src]

Bits 0:9 - Jabbers Received

impl R<u32, Reg<u32, _FCSE>>[src]

pub fn fckr(&self) -> FCKR_R[src]

Bits 0:9 - Frame Check Sequence Errors

impl R<u32, Reg<u32, _LFFE>>[src]

pub fn lfer(&self) -> LFER_R[src]

Bits 0:9 - Length Field Frame Errors

impl R<u32, Reg<u32, _RSE>>[src]

pub fn rxse(&self) -> RXSE_R[src]

Bits 0:9 - Receive Symbol Errors

impl R<u32, Reg<u32, _AE>>[src]

pub fn aer(&self) -> AER_R[src]

Bits 0:9 - Alignment Errors

impl R<u32, Reg<u32, _RRE>>[src]

pub fn rxrer(&self) -> RXRER_R[src]

Bits 0:17 - Receive Resource Errors

impl R<u32, Reg<u32, _ROE>>[src]

pub fn rxovr(&self) -> RXOVR_R[src]

Bits 0:9 - Receive Overruns

impl R<u32, Reg<u32, _IHCE>>[src]

pub fn hcker(&self) -> HCKER_R[src]

Bits 0:7 - IP Header Checksum Errors

impl R<u32, Reg<u32, _TCE>>[src]

pub fn tcker(&self) -> TCKER_R[src]

Bits 0:7 - TCP Checksum Errors

impl R<u32, Reg<u32, _UCE>>[src]

pub fn ucker(&self) -> UCKER_R[src]

Bits 0:7 - UDP Checksum Errors

impl R<u32, Reg<u32, _TSSSL>>[src]

pub fn vts(&self) -> VTS_R[src]

Bits 0:31 - Value of Timer Seconds Register Capture

impl R<u32, Reg<u32, _TSSN>>[src]

pub fn vtn(&self) -> VTN_R[src]

Bits 0:29 - Value Timer Nanoseconds Register Capture

impl R<u32, Reg<u32, _TSL>>[src]

pub fn tcs(&self) -> TCS_R[src]

Bits 0:31 - Timer Count in Seconds

impl R<u32, Reg<u32, _TN>>[src]

pub fn tns(&self) -> TNS_R[src]

Bits 0:29 - Timer Count in Nanoseconds

impl R<u32, Reg<u32, _TI>>[src]

pub fn cns(&self) -> CNS_R[src]

Bits 0:7 - Count Nanoseconds

pub fn acns(&self) -> ACNS_R[src]

Bits 8:15 - Alternative Count Nanoseconds

pub fn nit(&self) -> NIT_R[src]

Bits 16:23 - Number of Increments

impl R<u32, Reg<u32, _EFTS>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _EFTN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _EFRS>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _EFRN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _PEFTS>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _PEFTN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u32, Reg<u32, _PEFRS>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:31 - Register Update

impl R<u32, Reg<u32, _PEFRN>>[src]

pub fn rud(&self) -> RUD_R[src]

Bits 0:29 - Register Update

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Mask RXRDY Interrupt

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Disable TXRDY Interrupt

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - Mask End of Receive Transfer Interrupt

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - Mask End of Transmit Interrupt

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Mask Overrun Error Interrupt

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Mask Framing Error Interrupt

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Mask Parity Error Interrupt

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Mask TXEMPTY Interrupt

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Mask TXBUFE Interrupt

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Mask RXBUFF Interrupt

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:7 - Received Character

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divisor

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _MR>>[src]

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 0:7 - Clock Divider

pub fn pwsdiv(&self) -> PWSDIV_R[src]

Bits 8:10 - Power Saving Divider

pub fn rdproof(&self) -> RDPROOF_R[src]

Bit 11 - Read Proof Enable

pub fn wrproof(&self) -> WRPROOF_R[src]

Bit 12 - Write Proof Enable

pub fn fbyte(&self) -> FBYTE_R[src]

Bit 13 - Force Byte Transfer

pub fn padv(&self) -> PADV_R[src]

Bit 14 - Padding Value

pub fn pdcmode(&self) -> PDCMODE_R[src]

Bit 15 - PDC-oriented Mode

pub fn clkodd(&self) -> CLKODD_R[src]

Bit 16 - Clock divider is odd

impl R<u8, DTOMUL_A>[src]

pub fn variant(&self) -> DTOMUL_A[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

pub fn is_4096(&self) -> bool[src]

Checks if the value of the field is _4096

pub fn is_65536(&self) -> bool[src]

Checks if the value of the field is _65536

pub fn is_1048576(&self) -> bool[src]

Checks if the value of the field is _1048576

impl R<u32, Reg<u32, _DTOR>>[src]

pub fn dtocyc(&self) -> DTOCYC_R[src]

Bits 0:3 - Data Timeout Cycle Number

pub fn dtomul(&self) -> DTOMUL_R[src]

Bits 4:6 - Data Timeout Multiplier

impl R<u8, SDCSEL_A>[src]

pub fn variant(&self) -> SDCSEL_A[src]

Get enumerated values variant

pub fn is_slota(&self) -> bool[src]

Checks if the value of the field is SLOTA

pub fn is_slotb(&self) -> bool[src]

Checks if the value of the field is SLOTB

pub fn is_slotc(&self) -> bool[src]

Checks if the value of the field is SLOTC

pub fn is_slotd(&self) -> bool[src]

Checks if the value of the field is SLOTD

impl R<u8, SDCBUS_A>[src]

pub fn variant(&self) -> Variant<u8, SDCBUS_A>[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_4(&self) -> bool[src]

Checks if the value of the field is _4

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

impl R<u32, Reg<u32, _SDCR>>[src]

pub fn sdcsel(&self) -> SDCSEL_R[src]

Bits 0:1 - SDCard/SDIO Slot

pub fn sdcbus(&self) -> SDCBUS_R[src]

Bits 6:7 - SDCard/SDIO Bus Width

impl R<u32, Reg<u32, _ARGR>>[src]

pub fn arg(&self) -> ARG_R[src]

Bits 0:31 - Command Argument

impl R<u32, Reg<u32, _BLKR>>[src]

pub fn bcnt(&self) -> BCNT_R[src]

Bits 0:15 - MMC/SDIO Block Count - SDIO Byte Count

pub fn blklen(&self) -> BLKLEN_R[src]

Bits 16:31 - Data Block Length

impl R<u8, CSTOMUL_A>[src]

pub fn variant(&self) -> CSTOMUL_A[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

pub fn is_4096(&self) -> bool[src]

Checks if the value of the field is _4096

pub fn is_65536(&self) -> bool[src]

Checks if the value of the field is _65536

pub fn is_1048576(&self) -> bool[src]

Checks if the value of the field is _1048576

impl R<u32, Reg<u32, _CSTOR>>[src]

pub fn cstocyc(&self) -> CSTOCYC_R[src]

Bits 0:3 - Completion Signal Timeout Cycle Number

pub fn cstomul(&self) -> CSTOMUL_R[src]

Bits 4:6 - Completion Signal Timeout Multiplier

impl R<u32, Reg<u32, _RSPR>>[src]

pub fn rsp(&self) -> RSP_R[src]

Bits 0:31 - Response

impl R<u32, Reg<u32, _RDR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data to Read

impl R<u32, Reg<u32, _SR>>[src]

pub fn cmdrdy(&self) -> CMDRDY_R[src]

Bit 0 - Command Ready

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Ready

pub fn blke(&self) -> BLKE_R[src]

Bit 3 - Data Block Ended

pub fn dtip(&self) -> DTIP_R[src]

Bit 4 - Data Transfer in Progress

pub fn notbusy(&self) -> NOTBUSY_R[src]

Bit 5 - HSMCI Not Busy

pub fn endrx(&self) -> ENDRX_R[src]

Bit 6 - End of RX Buffer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 7 - End of TX Buffer

pub fn sdioirqa(&self) -> SDIOIRQA_R[src]

Bit 8 - SDIO Interrupt for Slot A

pub fn sdiowait(&self) -> SDIOWAIT_R[src]

Bit 12 - SDIO Read Wait Operation Status

pub fn csrcv(&self) -> CSRCV_R[src]

Bit 13 - CE-ATA Completion Signal Received

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - RX Buffer Full

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - TX Buffer Empty

pub fn rinde(&self) -> RINDE_R[src]

Bit 16 - Response Index Error

pub fn rdire(&self) -> RDIRE_R[src]

Bit 17 - Response Direction Error

pub fn rcrce(&self) -> RCRCE_R[src]

Bit 18 - Response CRC Error

pub fn rende(&self) -> RENDE_R[src]

Bit 19 - Response End Bit Error

pub fn rtoe(&self) -> RTOE_R[src]

Bit 20 - Response Time-out Error

pub fn dcrce(&self) -> DCRCE_R[src]

Bit 21 - Data CRC Error

pub fn dtoe(&self) -> DTOE_R[src]

Bit 22 - Data Time-out Error

pub fn cstoe(&self) -> CSTOE_R[src]

Bit 23 - Completion Signal Time-out Error

pub fn fifoempty(&self) -> FIFOEMPTY_R[src]

Bit 26 - FIFO empty flag

pub fn xfrdone(&self) -> XFRDONE_R[src]

Bit 27 - Transfer Done flag

pub fn ackrcv(&self) -> ACKRCV_R[src]

Bit 28 - Boot Operation Acknowledge Received

pub fn ackrcve(&self) -> ACKRCVE_R[src]

Bit 29 - Boot Operation Acknowledge Error

pub fn ovre(&self) -> OVRE_R[src]

Bit 30 - Overrun

pub fn unre(&self) -> UNRE_R[src]

Bit 31 - Underrun

impl R<u32, Reg<u32, _IMR>>[src]

pub fn cmdrdy(&self) -> CMDRDY_R[src]

Bit 0 - Command Ready Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receiver Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Ready Interrupt Mask

pub fn blke(&self) -> BLKE_R[src]

Bit 3 - Data Block Ended Interrupt Mask

pub fn dtip(&self) -> DTIP_R[src]

Bit 4 - Data Transfer in Progress Interrupt Mask

pub fn notbusy(&self) -> NOTBUSY_R[src]

Bit 5 - Data Not Busy Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 6 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 7 - End of Transmit Buffer Interrupt Mask

pub fn sdioirqa(&self) -> SDIOIRQA_R[src]

Bit 8 - SDIO Interrupt for Slot A Interrupt Mask

pub fn sdiowait(&self) -> SDIOWAIT_R[src]

Bit 12 - SDIO Read Wait Operation Status Interrupt Mask

pub fn csrcv(&self) -> CSRCV_R[src]

Bit 13 - Completion Signal Received Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - Transmit Buffer Empty Interrupt Mask

pub fn rinde(&self) -> RINDE_R[src]

Bit 16 - Response Index Error Interrupt Mask

pub fn rdire(&self) -> RDIRE_R[src]

Bit 17 - Response Direction Error Interrupt Mask

pub fn rcrce(&self) -> RCRCE_R[src]

Bit 18 - Response CRC Error Interrupt Mask

pub fn rende(&self) -> RENDE_R[src]

Bit 19 - Response End Bit Error Interrupt Mask

pub fn rtoe(&self) -> RTOE_R[src]

Bit 20 - Response Time-out Error Interrupt Mask

pub fn dcrce(&self) -> DCRCE_R[src]

Bit 21 - Data CRC Error Interrupt Mask

pub fn dtoe(&self) -> DTOE_R[src]

Bit 22 - Data Time-out Error Interrupt Mask

pub fn cstoe(&self) -> CSTOE_R[src]

Bit 23 - Completion Signal Time-out Error Interrupt Mask

pub fn fifoempty(&self) -> FIFOEMPTY_R[src]

Bit 26 - FIFO Empty Interrupt Mask

pub fn xfrdone(&self) -> XFRDONE_R[src]

Bit 27 - Transfer Done Interrupt Mask

pub fn ackrcv(&self) -> ACKRCV_R[src]

Bit 28 - Boot Operation Acknowledge Received Interrupt Mask

pub fn ackrcve(&self) -> ACKRCVE_R[src]

Bit 29 - Boot Operation Acknowledge Error Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 30 - Overrun Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 31 - Underrun Interrupt Mask

impl R<u32, Reg<u32, _CFG>>[src]

pub fn fifomode(&self) -> FIFOMODE_R[src]

Bit 0 - HSMCI Internal FIFO control mode

pub fn ferrctrl(&self) -> FERRCTRL_R[src]

Bit 4 - Flow Error flag reset control mode

pub fn hsmode(&self) -> HSMODE_R[src]

Bit 8 - High Speed Mode

pub fn lsync(&self) -> LSYNC_R[src]

Bit 12 - Synchronize on the last block

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _FRM_NUM>>[src]

pub fn frm_num(&self) -> FRM_NUM_R[src]

Bits 0:10 - Frame Number as Defined in the Packet Field Formats

pub fn frm_err(&self) -> FRM_ERR_R[src]

Bit 16 - Frame Error

pub fn frm_ok(&self) -> FRM_OK_R[src]

Bit 17 - Frame OK

impl R<u32, Reg<u32, _GLB_STAT>>[src]

pub fn fadden(&self) -> FADDEN_R[src]

Bit 0 - Function Address Enable

pub fn confg(&self) -> CONFG_R[src]

Bit 1 - Configured

pub fn esr(&self) -> ESR_R[src]

Bit 2 - Enable Send Resume

pub fn rsminpr(&self) -> RSMINPR_R[src]

Bit 3

pub fn rmwupe(&self) -> RMWUPE_R[src]

Bit 4 - Remote Wake Up Enable

impl R<u32, Reg<u32, _FADDR>>[src]

pub fn fadd(&self) -> FADD_R[src]

Bits 0:6 - Function Address Value

pub fn fen(&self) -> FEN_R[src]

Bit 8 - Function Enable

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ep0int(&self) -> EP0INT_R[src]

Bit 0 - Mask Endpoint 0 Interrupt

pub fn ep1int(&self) -> EP1INT_R[src]

Bit 1 - Mask Endpoint 1 Interrupt

pub fn ep2int(&self) -> EP2INT_R[src]

Bit 2 - Mask Endpoint 2 Interrupt

pub fn ep3int(&self) -> EP3INT_R[src]

Bit 3 - Mask Endpoint 3 Interrupt

pub fn ep4int(&self) -> EP4INT_R[src]

Bit 4 - Mask Endpoint 4 Interrupt

pub fn ep5int(&self) -> EP5INT_R[src]

Bit 5 - Mask Endpoint 5 Interrupt

pub fn ep6int(&self) -> EP6INT_R[src]

Bit 6 - Mask Endpoint 6 Interrupt

pub fn ep7int(&self) -> EP7INT_R[src]

Bit 7 - Mask Endpoint 7 Interrupt

pub fn rxsusp(&self) -> RXSUSP_R[src]

Bit 8 - Mask UDP Suspend Interrupt

pub fn rxrsm(&self) -> RXRSM_R[src]

Bit 9 - Mask UDP Resume Interrupt.

pub fn extrsm(&self) -> EXTRSM_R[src]

Bit 10

pub fn sofint(&self) -> SOFINT_R[src]

Bit 11 - Mask Start Of Frame Interrupt

pub fn bit12(&self) -> BIT12_R[src]

Bit 12 - UDP_IMR Bit 12

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 13 - USB Bus WAKEUP Interrupt

impl R<u32, Reg<u32, _ISR>>[src]

pub fn ep0int(&self) -> EP0INT_R[src]

Bit 0 - Endpoint 0 Interrupt Status

pub fn ep1int(&self) -> EP1INT_R[src]

Bit 1 - Endpoint 1 Interrupt Status

pub fn ep2int(&self) -> EP2INT_R[src]

Bit 2 - Endpoint 2 Interrupt Status

pub fn ep3int(&self) -> EP3INT_R[src]

Bit 3 - Endpoint 3 Interrupt Status

pub fn ep4int(&self) -> EP4INT_R[src]

Bit 4 - Endpoint 4 Interrupt Status

pub fn ep5int(&self) -> EP5INT_R[src]

Bit 5 - Endpoint 5 Interrupt Status

pub fn ep6int(&self) -> EP6INT_R[src]

Bit 6 - Endpoint 6 Interrupt Status

pub fn ep7int(&self) -> EP7INT_R[src]

Bit 7 - Endpoint 7Interrupt Status

pub fn rxsusp(&self) -> RXSUSP_R[src]

Bit 8 - UDP Suspend Interrupt Status

pub fn rxrsm(&self) -> RXRSM_R[src]

Bit 9 - UDP Resume Interrupt Status

pub fn extrsm(&self) -> EXTRSM_R[src]

Bit 10

pub fn sofint(&self) -> SOFINT_R[src]

Bit 11 - Start of Frame Interrupt Status

pub fn endbusres(&self) -> ENDBUSRES_R[src]

Bit 12 - End of BUS Reset Interrupt Status

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 13 - UDP Resume Interrupt Status

impl R<u32, Reg<u32, _RST_EP>>[src]

pub fn ep0(&self) -> EP0_R[src]

Bit 0 - Reset Endpoint 0

pub fn ep1(&self) -> EP1_R[src]

Bit 1 - Reset Endpoint 1

pub fn ep2(&self) -> EP2_R[src]

Bit 2 - Reset Endpoint 2

pub fn ep3(&self) -> EP3_R[src]

Bit 3 - Reset Endpoint 3

pub fn ep4(&self) -> EP4_R[src]

Bit 4 - Reset Endpoint 4

pub fn ep5(&self) -> EP5_R[src]

Bit 5 - Reset Endpoint 5

pub fn ep6(&self) -> EP6_R[src]

Bit 6 - Reset Endpoint 6

pub fn ep7(&self) -> EP7_R[src]

Bit 7 - Reset Endpoint 7

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, EPTYPE_A>[src]

Get enumerated values variant

pub fn is_ctrl(&self) -> bool[src]

Checks if the value of the field is CTRL

pub fn is_iso_out(&self) -> bool[src]

Checks if the value of the field is ISO_OUT

pub fn is_bulk_out(&self) -> bool[src]

Checks if the value of the field is BULK_OUT

pub fn is_int_out(&self) -> bool[src]

Checks if the value of the field is INT_OUT

pub fn is_iso_in(&self) -> bool[src]

Checks if the value of the field is ISO_IN

pub fn is_bulk_in(&self) -> bool[src]

Checks if the value of the field is BULK_IN

pub fn is_int_in(&self) -> bool[src]

Checks if the value of the field is INT_IN

impl R<u32, Reg<u32, _CSR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Generates an IN Packet with Data Previously Written in the DPR

pub fn rx_data_bk0(&self) -> RX_DATA_BK0_R[src]

Bit 1 - Receive Data Bank 0

pub fn rxsetup(&self) -> RXSETUP_R[src]

Bit 2 - Received Setup

pub fn stallsent(&self) -> STALLSENT_R[src]

Bit 3 - Stall Sent

pub fn txpktrdy(&self) -> TXPKTRDY_R[src]

Bit 4 - Transmit Packet Ready

pub fn forcestall(&self) -> FORCESTALL_R[src]

Bit 5 - Force Stall (used by Control, Bulk and Isochronous Endpoints)

pub fn rx_data_bk1(&self) -> RX_DATA_BK1_R[src]

Bit 6 - Receive Data Bank 1 (only used by endpoints with ping-pong attributes)

pub fn dir(&self) -> DIR_R[src]

Bit 7 - Transfer Direction (only available for control endpoints)

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 8:10 - Endpoint Type

pub fn dtgle(&self) -> DTGLE_R[src]

Bit 11 - Data Toggle

pub fn epeds(&self) -> EPEDS_R[src]

Bit 15 - Endpoint Enable Disable

pub fn rxbytecnt(&self) -> RXBYTECNT_R[src]

Bits 16:26 - Number of Bytes Available in the FIFO

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, EPTYPE_A>[src]

Get enumerated values variant

pub fn is_ctrl(&self) -> bool[src]

Checks if the value of the field is CTRL

pub fn is_iso_out(&self) -> bool[src]

Checks if the value of the field is ISO_OUT

pub fn is_iso_in(&self) -> bool[src]

Checks if the value of the field is ISO_IN

pub fn is_bulk_out(&self) -> bool[src]

Checks if the value of the field is BULK_OUT

pub fn is_bulk_in(&self) -> bool[src]

Checks if the value of the field is BULK_IN

pub fn is_int_out(&self) -> bool[src]

Checks if the value of the field is INT_OUT

pub fn is_int_in(&self) -> bool[src]

Checks if the value of the field is INT_IN

impl R<u32, Reg<u32, _CSR0_ISOCHRONOUS>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Generates an IN Packet with Data Previously Written in the DPR

pub fn rx_data_bk0(&self) -> RX_DATA_BK0_R[src]

Bit 1 - Receive Data Bank 0

pub fn rxsetup(&self) -> RXSETUP_R[src]

Bit 2 - Received Setup

pub fn isoerror(&self) -> ISOERROR_R[src]

Bit 3 - A CRC error has been detected in an isochronous transfer

pub fn txpktrdy(&self) -> TXPKTRDY_R[src]

Bit 4 - Transmit Packet Ready

pub fn forcestall(&self) -> FORCESTALL_R[src]

Bit 5 - Force Stall (used by Control, Bulk and Isochronous Endpoints)

pub fn rx_data_bk1(&self) -> RX_DATA_BK1_R[src]

Bit 6 - Receive Data Bank 1 (only used by endpoints with ping-pong attributes)

pub fn dir(&self) -> DIR_R[src]

Bit 7 - Transfer Direction (only available for control endpoints)

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 8:10 - Endpoint Type

pub fn dtgle(&self) -> DTGLE_R[src]

Bit 11 - Data Toggle

pub fn epeds(&self) -> EPEDS_R[src]

Bit 15 - Endpoint Enable Disable

pub fn rxbytecnt(&self) -> RXBYTECNT_R[src]

Bits 16:26 - Number of Bytes Available in the FIFO

impl R<u32, Reg<u32, _FDR>>[src]

pub fn fifo_data(&self) -> FIFO_DATA_R[src]

Bits 0:7 - FIFO Data Value

impl R<u32, Reg<u32, _TXVC>>[src]

pub fn txvdis(&self) -> TXVDIS_R[src]

Bit 8 - Transceiver Disable

pub fn puon(&self) -> PUON_R[src]

Bit 9 - Pull-up On

impl R<u32, Reg<u32, _MR>>[src]

pub fn mstr(&self) -> MSTR_R[src]

Bit 0 - Master/Slave Mode

pub fn ps(&self) -> PS_R[src]

Bit 1 - Peripheral Select

pub fn pcsdec(&self) -> PCSDEC_R[src]

Bit 2 - Chip Select Decode

pub fn modfdis(&self) -> MODFDIS_R[src]

Bit 4 - Mode Fault Detection

pub fn wdrbt(&self) -> WDRBT_R[src]

Bit 5 - Wait Data Read Before Transfer

pub fn llb(&self) -> LLB_R[src]

Bit 7 - Local Loopback Enable

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

pub fn dlybcs(&self) -> DLYBCS_R[src]

Bits 24:31 - Delay Between Chip Selects

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rd(&self) -> RD_R[src]

Bits 0:15 - Receive Data

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

impl R<u32, Reg<u32, _SR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - Transmit Data Register Empty

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Status

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of RX Buffer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of TX Buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - RX Buffer Full

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - TX Buffer Empty

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Status (Slave mode Only)

pub fn spiens(&self) -> SPIENS_R[src]

Bit 16 - SPI Enable Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full Interrupt Mask

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - SPI Transmit Data Register Empty Interrupt Mask

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error Interrupt Mask

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - Transmit Buffer Empty Interrupt Mask

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty Mask

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Interrupt Mask

impl R<u8, BITS_A>[src]

pub fn variant(&self) -> Variant<u8, BITS_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

pub fn is_9_bit(&self) -> bool[src]

Checks if the value of the field is _9_BIT

pub fn is_10_bit(&self) -> bool[src]

Checks if the value of the field is _10_BIT

pub fn is_11_bit(&self) -> bool[src]

Checks if the value of the field is _11_BIT

pub fn is_12_bit(&self) -> bool[src]

Checks if the value of the field is _12_BIT

pub fn is_13_bit(&self) -> bool[src]

Checks if the value of the field is _13_BIT

pub fn is_14_bit(&self) -> bool[src]

Checks if the value of the field is _14_BIT

pub fn is_15_bit(&self) -> bool[src]

Checks if the value of the field is _15_BIT

pub fn is_16_bit(&self) -> bool[src]

Checks if the value of the field is _16_BIT

impl R<u32, Reg<u32, _CSR>>[src]

pub fn cpol(&self) -> CPOL_R[src]

Bit 0 - Clock Polarity

pub fn ncpha(&self) -> NCPHA_R[src]

Bit 1 - Clock Phase

pub fn csnaat(&self) -> CSNAAT_R[src]

Bit 2 - Chip Select Not Active After Transfer (Ignored if CSAAT = 1)

pub fn csaat(&self) -> CSAAT_R[src]

Bit 3 - Chip Select Active After Transfer

pub fn bits_(&self) -> BITS_R[src]

Bits 4:7 - Bits Per Transfer

pub fn scbr(&self) -> SCBR_R[src]

Bits 8:15 - Serial Clock Baud Rate

pub fn dlybs(&self) -> DLYBS_R[src]

Bits 16:23 - Delay Before SPCK

pub fn dlybct(&self) -> DLYBCT_R[src]

Bits 24:31 - Delay Between Consecutive Transfers

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:15 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, SBSMPLR_A>[src]

pub fn variant(&self) -> Variant<u8, SBSMPLR_A>[src]

Get enumerated values variant

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_fourth(&self) -> bool[src]

Checks if the value of the field is FOURTH

pub fn is_eighth(&self) -> bool[src]

Checks if the value of the field is EIGHTH

pub fn is_sixteenth(&self) -> bool[src]

Checks if the value of the field is SIXTEENTH

impl R<u32, Reg<u32, _CMR0>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

pub fn sbsmplr(&self) -> SBSMPLR_R[src]

Bits 20:22 - Loading Edge Subsampling Ratio

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR0_WAVE_EQ_1>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR0>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _RAB0>>[src]

pub fn rab(&self) -> RAB_R[src]

Bits 0:31 - Register A or Register B

impl R<u32, Reg<u32, _CV0>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA0>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB0>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC0>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR0>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR0>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

impl R<u8, TRIGSRCA_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCA_A>[src]

Get enumerated values variant

pub fn is_external_tioax(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOAX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u8, TRIGSRCB_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCB_A>[src]

Get enumerated values variant

pub fn is_external_tiobx(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOBX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u32, Reg<u32, _EMR0>>[src]

pub fn trigsrca(&self) -> TRIGSRCA_R[src]

Bits 0:1 - Trigger Source for Input A

pub fn trigsrcb(&self) -> TRIGSRCB_R[src]

Bits 4:5 - Trigger Source for Input B

pub fn nodivclk(&self) -> NODIVCLK_R[src]

Bit 8 - No Divided Clock

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, SBSMPLR_A>[src]

pub fn variant(&self) -> Variant<u8, SBSMPLR_A>[src]

Get enumerated values variant

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_fourth(&self) -> bool[src]

Checks if the value of the field is FOURTH

pub fn is_eighth(&self) -> bool[src]

Checks if the value of the field is EIGHTH

pub fn is_sixteenth(&self) -> bool[src]

Checks if the value of the field is SIXTEENTH

impl R<u32, Reg<u32, _CMR1>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

pub fn sbsmplr(&self) -> SBSMPLR_R[src]

Bits 20:22 - Loading Edge Subsampling Ratio

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR1_WAVE_EQ_1>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR1>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _RAB1>>[src]

pub fn rab(&self) -> RAB_R[src]

Bits 0:31 - Register A or Register B

impl R<u32, Reg<u32, _CV1>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA1>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB1>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC1>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR1>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

impl R<u8, TRIGSRCA_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCA_A>[src]

Get enumerated values variant

pub fn is_external_tioax(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOAX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u8, TRIGSRCB_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCB_A>[src]

Get enumerated values variant

pub fn is_external_tiobx(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOBX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u32, Reg<u32, _EMR1>>[src]

pub fn trigsrca(&self) -> TRIGSRCA_R[src]

Bits 0:1 - Trigger Source for Input A

pub fn trigsrcb(&self) -> TRIGSRCB_R[src]

Bits 4:5 - Trigger Source for Input B

pub fn nodivclk(&self) -> NODIVCLK_R[src]

Bit 8 - No Divided Clock

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, SBSMPLR_A>[src]

pub fn variant(&self) -> Variant<u8, SBSMPLR_A>[src]

Get enumerated values variant

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_fourth(&self) -> bool[src]

Checks if the value of the field is FOURTH

pub fn is_eighth(&self) -> bool[src]

Checks if the value of the field is EIGHTH

pub fn is_sixteenth(&self) -> bool[src]

Checks if the value of the field is SIXTEENTH

impl R<u32, Reg<u32, _CMR2>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Edge Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Edge Selection

pub fn sbsmplr(&self) -> SBSMPLR_R[src]

Bits 20:22 - Loading Edge Subsampling Ratio

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob(&self) -> bool[src]

Checks if the value of the field is TIOB

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_updown(&self) -> bool[src]

Checks if the value of the field is UPDOWN

pub fn is_up_rc(&self) -> bool[src]

Checks if the value of the field is UP_RC

pub fn is_updown_rc(&self) -> bool[src]

Checks if the value of the field is UPDOWN_RC

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR2_WAVE_EQ_1>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Waveform Mode

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _SMMR2>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<u32, Reg<u32, _RAB2>>[src]

pub fn rab(&self) -> RAB_R[src]

Bits 0:31 - Register A or Register B

impl R<u32, Reg<u32, _CV2>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:31 - Counter Value

impl R<u32, Reg<u32, _RA2>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:31 - Register A

impl R<u32, Reg<u32, _RB2>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:31 - Register B

impl R<u32, Reg<u32, _RC2>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:31 - Register C

impl R<u32, Reg<u32, _SR2>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

pub fn endrx(&self) -> ENDRX_R[src]

Bit 8 - End of Receiver Transfer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 9 - Reception Buffer Full

impl R<u8, TRIGSRCA_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCA_A>[src]

Get enumerated values variant

pub fn is_external_tioax(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOAX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u8, TRIGSRCB_A>[src]

pub fn variant(&self) -> Variant<u8, TRIGSRCB_A>[src]

Get enumerated values variant

pub fn is_external_tiobx(&self) -> bool[src]

Checks if the value of the field is EXTERNAL_TIOBX

pub fn is_pwmx(&self) -> bool[src]

Checks if the value of the field is PWMX

impl R<u32, Reg<u32, _EMR2>>[src]

pub fn trigsrca(&self) -> TRIGSRCA_R[src]

Bits 0:1 - Trigger Source for Input A

pub fn trigsrcb(&self) -> TRIGSRCB_R[src]

Bits 4:5 - Trigger Source for Input B

pub fn nodivclk(&self) -> NODIVCLK_R[src]

Bit 8 - No Divided Clock

impl R<u8, TC0XC0S_A>[src]

pub fn variant(&self) -> Variant<u8, TC0XC0S_A>[src]

Get enumerated values variant

pub fn is_tclk0(&self) -> bool[src]

Checks if the value of the field is TCLK0

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC1XC1S_A>[src]

pub fn variant(&self) -> Variant<u8, TC1XC1S_A>[src]

Get enumerated values variant

pub fn is_tclk1(&self) -> bool[src]

Checks if the value of the field is TCLK1

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC2XC2S_A>[src]

pub fn variant(&self) -> Variant<u8, TC2XC2S_A>[src]

Get enumerated values variant

pub fn is_tclk2(&self) -> bool[src]

Checks if the value of the field is TCLK2

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

impl R<bool, AUTOC_A>[src]

pub fn variant(&self) -> AUTOC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BMR>>[src]

pub fn tc0xc0s(&self) -> TC0XC0S_R[src]

Bits 0:1 - External Clock Signal 0 Selection

pub fn tc1xc1s(&self) -> TC1XC1S_R[src]

Bits 2:3 - External Clock Signal 1 Selection

pub fn tc2xc2s(&self) -> TC2XC2S_R[src]

Bits 4:5 - External Clock Signal 2 Selection

pub fn qden(&self) -> QDEN_R[src]

Bit 8 - Quadrature Decoder Enabled

pub fn posen(&self) -> POSEN_R[src]

Bit 9 - Position Enabled

pub fn speeden(&self) -> SPEEDEN_R[src]

Bit 10 - Speed Enabled

pub fn qdtrans(&self) -> QDTRANS_R[src]

Bit 11 - Quadrature Decoding Transparent

pub fn edgpha(&self) -> EDGPHA_R[src]

Bit 12 - Edge on PHA Count Mode

pub fn inva(&self) -> INVA_R[src]

Bit 13 - Inverted PHA

pub fn invb(&self) -> INVB_R[src]

Bit 14 - Inverted PHB

pub fn invidx(&self) -> INVIDX_R[src]

Bit 15 - Inverted Index

pub fn swap(&self) -> SWAP_R[src]

Bit 16 - Swap PHA and PHB

pub fn idxphb(&self) -> IDXPHB_R[src]

Bit 17 - Index Pin is PHB Pin

pub fn autoc(&self) -> AUTOC_R[src]

Bit 18 - Auto-Correction of missing pulses

pub fn maxfilt(&self) -> MAXFILT_R[src]

Bits 20:25 - Maximum Filter

impl R<u32, Reg<u32, _QIMR>>[src]

pub fn idx(&self) -> IDX_R[src]

Bit 0 - Index

pub fn dirchg(&self) -> DIRCHG_R[src]

Bit 1 - Direction Change

pub fn qerr(&self) -> QERR_R[src]

Bit 2 - Quadrature Error

impl R<u32, Reg<u32, _QISR>>[src]

pub fn idx(&self) -> IDX_R[src]

Bit 0 - Index

pub fn dirchg(&self) -> DIRCHG_R[src]

Bit 1 - Direction Change

pub fn qerr(&self) -> QERR_R[src]

Bit 2 - Quadrature Error

pub fn dir(&self) -> DIR_R[src]

Bit 8 - Direction

impl R<u32, Reg<u32, _FMR>>[src]

pub fn encf0(&self) -> ENCF0_R[src]

Bit 0 - Enable Compare Fault Channel 0

pub fn encf1(&self) -> ENCF1_R[src]

Bit 1 - Enable Compare Fault Channel 1

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _RPR0>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR0>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR0>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR0>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR0>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _RPR1>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR1>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR1>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR1>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR1>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _RPR2>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR2>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR2>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR2>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR2>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_rs485(&self) -> bool[src]

Checks if the value of the field is RS485

pub fn is_hw_handshaking(&self) -> bool[src]

Checks if the value of the field is HW_HANDSHAKING

pub fn is_modem(&self) -> bool[src]

Checks if the value of the field is MODEM

pub fn is_is07816_t_0(&self) -> bool[src]

Checks if the value of the field is IS07816_T_0

pub fn is_is07816_t_1(&self) -> bool[src]

Checks if the value of the field is IS07816_T_1

pub fn is_irda(&self) -> bool[src]

Checks if the value of the field is IRDA

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> CHRL_A[src]

Get enumerated values variant

pub fn is_5_bit(&self) -> bool[src]

Checks if the value of the field is _5_BIT

pub fn is_6_bit(&self) -> bool[src]

Checks if the value of the field is _6_BIT

pub fn is_7_bit(&self) -> bool[src]

Checks if the value of the field is _7_BIT

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_multidrop(&self) -> bool[src]

Checks if the value of the field is MULTIDROP

impl R<u8, NBSTOP_A>[src]

pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]

Get enumerated values variant

pub fn is_1_bit(&self) -> bool[src]

Checks if the value of the field is _1_BIT

pub fn is_1_5_bit(&self) -> bool[src]

Checks if the value of the field is _1_5_BIT

pub fn is_2_bit(&self) -> bool[src]

Checks if the value of the field is _2_BIT

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn sync(&self) -> SYNC_R[src]

Bit 8 - Synchronous Mode Select

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn nbstop(&self) -> NBSTOP_R[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

pub fn msbf(&self) -> MSBF_R[src]

Bit 16 - Bit Order

pub fn mode9(&self) -> MODE9_R[src]

Bit 17 - 9-bit Character Length

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn over(&self) -> OVER_R[src]

Bit 19 - Oversampling Mode

pub fn inack(&self) -> INACK_R[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 21 - Disable Successive NACK

pub fn var_sync(&self) -> VAR_SYNC_R[src]

Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter

pub fn invdata(&self) -> INVDATA_R[src]

Bit 23 - Inverted Data

pub fn max_iteration(&self) -> MAX_ITERATION_R[src]

Bits 24:26 - Maximum Number of Automatic Iteration

pub fn filter(&self) -> FILTER_R[src]

Bit 28 - Receive Line Filter

pub fn man(&self) -> MAN_R[src]

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&self) -> MODSYNC_R[src]

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 31 - Start Frame Delimiter Selector

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> Variant<u8, CHRL_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u32, Reg<u32, _MR_SPI_MODE>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn cpha(&self) -> CPHA_R[src]

Bit 8 - SPI Clock Phase

pub fn cpol(&self) -> CPOL_R[src]

Bit 16 - SPI Clock Polarity

pub fn wrdbt(&self) -> WRDBT_R[src]

Bit 20 - Wait Read Data Before Transfer

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receive Transfer Interrupt Mask (available in all USART modes of operation)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmit Interrupt Mask (available in all USART modes of operation)

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Buffer Empty Interrupt Mask (available in all USART modes of operation)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Buffer Full Interrupt Mask (available in all USART modes of operation)

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

pub fn mane(&self) -> MANE_R[src]

Bit 24 - Manchester Error Interrupt Mask

impl R<u32, Reg<u32, _IMR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - SPI Underrun Error Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12

impl R<u32, Reg<u32, _CSR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Reception Buffer Full

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn cts(&self) -> CTS_R[src]

Bit 23 - Image of CTS Input

pub fn manerr(&self) -> MANERR_R[src]

Bit 24 - Manchester Error

impl R<u32, Reg<u32, _CSR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - Underrun Error

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:8 - Received Character

pub fn rxsynh(&self) -> RXSYNH_R[src]

Bit 15 - Received Sync

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divider

pub fn fp(&self) -> FP_R[src]

Bits 16:18 - Fractional Part

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn to(&self) -> TO_R[src]

Bits 0:15 - Time-out Value

impl R<u32, Reg<u32, _TTGR>>[src]

pub fn tg(&self) -> TG_R[src]

Bits 0:7 - Timeguard Value

impl R<u32, Reg<u32, _FIDI>>[src]

pub fn fi_di_ratio(&self) -> FI_DI_RATIO_R[src]

Bits 0:10 - FI Over DI Ratio Value

impl R<u32, Reg<u32, _NER>>[src]

pub fn nb_errors(&self) -> NB_ERRORS_R[src]

Bits 0:7 - Number of Errors

impl R<u32, Reg<u32, _IF>>[src]

pub fn irda_filter(&self) -> IRDA_FILTER_R[src]

Bits 0:7 - IrDA Filter

impl R<u8, TX_PP_A>[src]

pub fn variant(&self) -> TX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u8, RX_PP_A>[src]

pub fn variant(&self) -> RX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u32, Reg<u32, _MAN>>[src]

pub fn tx_pl(&self) -> TX_PL_R[src]

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&self) -> TX_PP_R[src]

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&self) -> TX_MPOL_R[src]

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&self) -> RX_PL_R[src]

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&self) -> RX_PP_R[src]

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&self) -> RX_MPOL_R[src]

Bit 28 - Receiver Manchester Polarity

pub fn one(&self) -> ONE_R[src]

Bit 29 - Must Be Set to 1

pub fn drift(&self) -> DRIFT_R[src]

Bit 30 - Drift Compensation

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_rs485(&self) -> bool[src]

Checks if the value of the field is RS485

pub fn is_hw_handshaking(&self) -> bool[src]

Checks if the value of the field is HW_HANDSHAKING

pub fn is_modem(&self) -> bool[src]

Checks if the value of the field is MODEM

pub fn is_is07816_t_0(&self) -> bool[src]

Checks if the value of the field is IS07816_T_0

pub fn is_is07816_t_1(&self) -> bool[src]

Checks if the value of the field is IS07816_T_1

pub fn is_irda(&self) -> bool[src]

Checks if the value of the field is IRDA

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> CHRL_A[src]

Get enumerated values variant

pub fn is_5_bit(&self) -> bool[src]

Checks if the value of the field is _5_BIT

pub fn is_6_bit(&self) -> bool[src]

Checks if the value of the field is _6_BIT

pub fn is_7_bit(&self) -> bool[src]

Checks if the value of the field is _7_BIT

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_multidrop(&self) -> bool[src]

Checks if the value of the field is MULTIDROP

impl R<u8, NBSTOP_A>[src]

pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]

Get enumerated values variant

pub fn is_1_bit(&self) -> bool[src]

Checks if the value of the field is _1_BIT

pub fn is_1_5_bit(&self) -> bool[src]

Checks if the value of the field is _1_5_BIT

pub fn is_2_bit(&self) -> bool[src]

Checks if the value of the field is _2_BIT

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn sync(&self) -> SYNC_R[src]

Bit 8 - Synchronous Mode Select

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn nbstop(&self) -> NBSTOP_R[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

pub fn msbf(&self) -> MSBF_R[src]

Bit 16 - Bit Order

pub fn mode9(&self) -> MODE9_R[src]

Bit 17 - 9-bit Character Length

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn over(&self) -> OVER_R[src]

Bit 19 - Oversampling Mode

pub fn inack(&self) -> INACK_R[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 21 - Disable Successive NACK

pub fn var_sync(&self) -> VAR_SYNC_R[src]

Bit 22 - Variable Synchronization of Command/Data Sync Start Frame Delimiter

pub fn invdata(&self) -> INVDATA_R[src]

Bit 23 - Inverted Data

pub fn max_iteration(&self) -> MAX_ITERATION_R[src]

Bits 24:26 - Maximum Number of Automatic Iteration

pub fn filter(&self) -> FILTER_R[src]

Bit 28 - Receive Line Filter

pub fn man(&self) -> MAN_R[src]

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&self) -> MODSYNC_R[src]

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 31 - Start Frame Delimiter Selector

impl R<u8, USART_MODE_A>[src]

pub fn variant(&self) -> Variant<u8, USART_MODE_A>[src]

Get enumerated values variant

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_div(&self) -> bool[src]

Checks if the value of the field is DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> Variant<u8, CHRL_A>[src]

Get enumerated values variant

pub fn is_8_bit(&self) -> bool[src]

Checks if the value of the field is _8_BIT

impl R<u32, Reg<u32, _MR_SPI_MODE>>[src]

pub fn usart_mode(&self) -> USART_MODE_R[src]

Bits 0:3 - USART Mode of Operation

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length

pub fn cpha(&self) -> CPHA_R[src]

Bit 8 - SPI Clock Phase

pub fn cpol(&self) -> CPOL_R[src]

Bit 16 - SPI Clock Polarity

pub fn wrdbt(&self) -> WRDBT_R[src]

Bit 20 - Wait Read Data Before Transfer

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receive Transfer Interrupt Mask (available in all USART modes of operation)

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmit Interrupt Mask (available in all USART modes of operation)

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Buffer Empty Interrupt Mask (available in all USART modes of operation)

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Buffer Full Interrupt Mask (available in all USART modes of operation)

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

pub fn mane(&self) -> MANE_R[src]

Bit 24 - Manchester Error Interrupt Mask

impl R<u32, Reg<u32, _IMR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - SPI Underrun Error Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12

impl R<u32, Reg<u32, _CSR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max Number of Repetitions Reached

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Reception Buffer Full

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn cts(&self) -> CTS_R[src]

Bit 23 - Image of CTS Input

pub fn manerr(&self) -> MANERR_R[src]

Bit 24 - Manchester Error

impl R<u32, Reg<u32, _CSR_SPI_MODE>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - Underrun Error

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:8 - Received Character

pub fn rxsynh(&self) -> RXSYNH_R[src]

Bit 15 - Received Sync

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divider

pub fn fp(&self) -> FP_R[src]

Bits 16:18 - Fractional Part

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn to(&self) -> TO_R[src]

Bits 0:15 - Time-out Value

impl R<u32, Reg<u32, _TTGR>>[src]

pub fn tg(&self) -> TG_R[src]

Bits 0:7 - Timeguard Value

impl R<u32, Reg<u32, _FIDI>>[src]

pub fn fi_di_ratio(&self) -> FI_DI_RATIO_R[src]

Bits 0:10 - FI Over DI Ratio Value

impl R<u32, Reg<u32, _NER>>[src]

pub fn nb_errors(&self) -> NB_ERRORS_R[src]

Bits 0:7 - Number of Errors

impl R<u32, Reg<u32, _IF>>[src]

pub fn irda_filter(&self) -> IRDA_FILTER_R[src]

Bits 0:7 - IrDA Filter

impl R<u8, TX_PP_A>[src]

pub fn variant(&self) -> TX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u8, RX_PP_A>[src]

pub fn variant(&self) -> RX_PP_A[src]

Get enumerated values variant

pub fn is_all_one(&self) -> bool[src]

Checks if the value of the field is ALL_ONE

pub fn is_all_zero(&self) -> bool[src]

Checks if the value of the field is ALL_ZERO

pub fn is_zero_one(&self) -> bool[src]

Checks if the value of the field is ZERO_ONE

pub fn is_one_zero(&self) -> bool[src]

Checks if the value of the field is ONE_ZERO

impl R<u32, Reg<u32, _MAN>>[src]

pub fn tx_pl(&self) -> TX_PL_R[src]

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&self) -> TX_PP_R[src]

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&self) -> TX_MPOL_R[src]

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&self) -> RX_PL_R[src]

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&self) -> RX_PP_R[src]

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&self) -> RX_MPOL_R[src]

Bit 28 - Receiver Manchester Polarity

pub fn one(&self) -> ONE_R[src]

Bit 29 - Must Be Set to 1

pub fn drift(&self) -> DRIFT_R[src]

Bit 30 - Drift Compensation

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, IADRSZ_A>[src]

pub fn variant(&self) -> IADRSZ_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_1_byte(&self) -> bool[src]

Checks if the value of the field is _1_BYTE

pub fn is_2_byte(&self) -> bool[src]

Checks if the value of the field is _2_BYTE

pub fn is_3_byte(&self) -> bool[src]

Checks if the value of the field is _3_BYTE

impl R<u32, Reg<u32, _MMR>>[src]

pub fn iadrsz(&self) -> IADRSZ_R[src]

Bits 8:9 - Internal Device Address Size

pub fn mread(&self) -> MREAD_R[src]

Bit 12 - Master Read Direction

pub fn dadr(&self) -> DADR_R[src]

Bits 16:22 - Device Address

impl R<u32, Reg<u32, _SMR>>[src]

pub fn sadr(&self) -> SADR_R[src]

Bits 16:22 - Slave Address

impl R<u32, Reg<u32, _IADR>>[src]

pub fn iadr(&self) -> IADR_R[src]

Bits 0:23 - Internal Address

impl R<u32, Reg<u32, _CWGR>>[src]

pub fn cldiv(&self) -> CLDIV_R[src]

Bits 0:7 - Clock Low Divider

pub fn chdiv(&self) -> CHDIV_R[src]

Bits 8:15 - Clock High Divider

pub fn ckdiv(&self) -> CKDIV_R[src]

Bits 16:18 - Clock Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed (automatically set / reset)

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready (automatically set / reset)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready (automatically set / reset)

pub fn svread(&self) -> SVREAD_R[src]

Bit 3 - Slave Read (automatically set / reset)

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access (automatically set / reset)

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access (clear on read)

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error (clear on read)

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledged (clear on read)

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost (clear on read)

pub fn sclws(&self) -> SCLWS_R[src]

Bit 10 - Clock Wait State (automatically set / reset)

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access (clear on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of RX buffer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of TX buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - RX Buffer Full

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - TX Buffer Empty

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready Interrupt Mask

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access Interrupt Mask

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledge Interrupt Mask

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost Interrupt Mask

pub fn scl_ws(&self) -> SCL_WS_R[src]

Bit 10 - Clock Wait State Interrupt Mask

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - Transmit Buffer Empty Interrupt Mask

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Master or Slave Receive Holding Data

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:31 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, IADRSZ_A>[src]

pub fn variant(&self) -> IADRSZ_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_1_byte(&self) -> bool[src]

Checks if the value of the field is _1_BYTE

pub fn is_2_byte(&self) -> bool[src]

Checks if the value of the field is _2_BYTE

pub fn is_3_byte(&self) -> bool[src]

Checks if the value of the field is _3_BYTE

impl R<u32, Reg<u32, _MMR>>[src]

pub fn iadrsz(&self) -> IADRSZ_R[src]

Bits 8:9 - Internal Device Address Size

pub fn mread(&self) -> MREAD_R[src]

Bit 12 - Master Read Direction

pub fn dadr(&self) -> DADR_R[src]

Bits 16:22 - Device Address

impl R<u32, Reg<u32, _SMR>>[src]

pub fn sadr(&self) -> SADR_R[src]

Bits 16:22 - Slave Address

impl R<u32, Reg<u32, _IADR>>[src]

pub fn iadr(&self) -> IADR_R[src]

Bits 0:23 - Internal Address

impl R<u32, Reg<u32, _CWGR>>[src]

pub fn cldiv(&self) -> CLDIV_R[src]

Bits 0:7 - Clock Low Divider

pub fn chdiv(&self) -> CHDIV_R[src]

Bits 8:15 - Clock High Divider

pub fn ckdiv(&self) -> CKDIV_R[src]

Bits 16:18 - Clock Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed (automatically set / reset)

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready (automatically set / reset)

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready (automatically set / reset)

pub fn svread(&self) -> SVREAD_R[src]

Bit 3 - Slave Read (automatically set / reset)

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access (automatically set / reset)

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access (clear on read)

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error (clear on read)

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledged (clear on read)

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost (clear on read)

pub fn sclws(&self) -> SCLWS_R[src]

Bit 10 - Clock Wait State (automatically set / reset)

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access (clear on read)

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of RX buffer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of TX buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - RX Buffer Full

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - TX Buffer Empty

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txcomp(&self) -> TXCOMP_R[src]

Bit 0 - Transmission Completed Interrupt Mask

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Holding Register Ready Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 2 - Transmit Holding Register Ready Interrupt Mask

pub fn svacc(&self) -> SVACC_R[src]

Bit 4 - Slave Access Interrupt Mask

pub fn gacc(&self) -> GACC_R[src]

Bit 5 - General Call Access Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 6 - Overrun Error Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 8 - Not Acknowledge Interrupt Mask

pub fn arblst(&self) -> ARBLST_R[src]

Bit 9 - Arbitration Lost Interrupt Mask

pub fn scl_ws(&self) -> SCL_WS_R[src]

Bit 10 - Clock Wait State Interrupt Mask

pub fn eosacc(&self) -> EOSACC_R[src]

Bit 11 - End Of Slave Access Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 12 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 13 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 14 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 15 - Transmit Buffer Empty Interrupt Mask

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Master or Slave Receive Holding Data

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:31 - Write Protection Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<bool, TRGEN_A>[src]

pub fn variant(&self) -> TRGEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, TRGSEL_A>[src]

pub fn variant(&self) -> Variant<u8, TRGSEL_A>[src]

Get enumerated values variant

pub fn is_afec_trig0(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG0

pub fn is_afec_trig1(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG1

pub fn is_afec_trig2(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG2

pub fn is_afec_trig3(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG3

pub fn is_afec_trig4(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG4

pub fn is_afec_trig5(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG5

impl R<bool, SLEEP_A>[src]

pub fn variant(&self) -> SLEEP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_sleep(&self) -> bool[src]

Checks if the value of the field is SLEEP

impl R<bool, FWUP_A>[src]

pub fn variant(&self) -> FWUP_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, FREERUN_A>[src]

pub fn variant(&self) -> FREERUN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> STARTUP_A[src]

Get enumerated values variant

pub fn is_sut0(&self) -> bool[src]

Checks if the value of the field is SUT0

pub fn is_sut8(&self) -> bool[src]

Checks if the value of the field is SUT8

pub fn is_sut16(&self) -> bool[src]

Checks if the value of the field is SUT16

pub fn is_sut24(&self) -> bool[src]

Checks if the value of the field is SUT24

pub fn is_sut64(&self) -> bool[src]

Checks if the value of the field is SUT64

pub fn is_sut80(&self) -> bool[src]

Checks if the value of the field is SUT80

pub fn is_sut96(&self) -> bool[src]

Checks if the value of the field is SUT96

pub fn is_sut112(&self) -> bool[src]

Checks if the value of the field is SUT112

pub fn is_sut512(&self) -> bool[src]

Checks if the value of the field is SUT512

pub fn is_sut576(&self) -> bool[src]

Checks if the value of the field is SUT576

pub fn is_sut640(&self) -> bool[src]

Checks if the value of the field is SUT640

pub fn is_sut704(&self) -> bool[src]

Checks if the value of the field is SUT704

pub fn is_sut768(&self) -> bool[src]

Checks if the value of the field is SUT768

pub fn is_sut832(&self) -> bool[src]

Checks if the value of the field is SUT832

pub fn is_sut896(&self) -> bool[src]

Checks if the value of the field is SUT896

pub fn is_sut960(&self) -> bool[src]

Checks if the value of the field is SUT960

impl R<u8, SETTLING_A>[src]

pub fn variant(&self) -> SETTLING_A[src]

Get enumerated values variant

pub fn is_ast3(&self) -> bool[src]

Checks if the value of the field is AST3

pub fn is_ast5(&self) -> bool[src]

Checks if the value of the field is AST5

pub fn is_ast9(&self) -> bool[src]

Checks if the value of the field is AST9

pub fn is_ast17(&self) -> bool[src]

Checks if the value of the field is AST17

impl R<bool, ANACH_A>[src]

pub fn variant(&self) -> ANACH_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_allowed(&self) -> bool[src]

Checks if the value of the field is ALLOWED

impl R<bool, USEQ_A>[src]

pub fn variant(&self) -> USEQ_A[src]

Get enumerated values variant

pub fn is_num_order(&self) -> bool[src]

Checks if the value of the field is NUM_ORDER

pub fn is_reg_order(&self) -> bool[src]

Checks if the value of the field is REG_ORDER

impl R<u32, Reg<u32, _MR>>[src]

pub fn trgen(&self) -> TRGEN_R[src]

Bit 0 - Trigger Enable

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 1:3 - Trigger Selection

pub fn sleep(&self) -> SLEEP_R[src]

Bit 5 - Sleep Mode

pub fn fwup(&self) -> FWUP_R[src]

Bit 6 - Fast Wake-up

pub fn freerun(&self) -> FREERUN_R[src]

Bit 7 - Free Run Mode

pub fn prescal(&self) -> PRESCAL_R[src]

Bits 8:15 - Prescaler Rate Selection

pub fn startup(&self) -> STARTUP_R[src]

Bits 16:19 - Start-up Time

pub fn settling(&self) -> SETTLING_R[src]

Bits 20:21 - Analog Settling Time

pub fn anach(&self) -> ANACH_R[src]

Bit 23 - Analog Change

pub fn tracktim(&self) -> TRACKTIM_R[src]

Bits 24:27 - Tracking Time

pub fn transfer(&self) -> TRANSFER_R[src]

Bits 28:29 - Transfer Period

pub fn useq(&self) -> USEQ_R[src]

Bit 31 - Use Sequence Enable

impl R<u8, CMPMODE_A>[src]

pub fn variant(&self) -> CMPMODE_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, RES_A>[src]

pub fn variant(&self) -> Variant<u8, RES_A>[src]

Get enumerated values variant

pub fn is_no_average(&self) -> bool[src]

Checks if the value of the field is NO_AVERAGE

pub fn is_low_res(&self) -> bool[src]

Checks if the value of the field is LOW_RES

pub fn is_osr4(&self) -> bool[src]

Checks if the value of the field is OSR4

pub fn is_osr16(&self) -> bool[src]

Checks if the value of the field is OSR16

pub fn is_osr64(&self) -> bool[src]

Checks if the value of the field is OSR64

pub fn is_osr256(&self) -> bool[src]

Checks if the value of the field is OSR256

impl R<u8, AFEMODE_A>[src]

pub fn variant(&self) -> AFEMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_offset_error(&self) -> bool[src]

Checks if the value of the field is OFFSET_ERROR

pub fn is_gain_error_high(&self) -> bool[src]

Checks if the value of the field is GAIN_ERROR_HIGH

pub fn is_gain_error_low(&self) -> bool[src]

Checks if the value of the field is GAIN_ERROR_LOW

impl R<u8, SIGNMODE_A>[src]

pub fn variant(&self) -> SIGNMODE_A[src]

Get enumerated values variant

pub fn is_se_unsg_df_sign(&self) -> bool[src]

Checks if the value of the field is SE_UNSG_DF_SIGN

pub fn is_se_sign_df_unsg(&self) -> bool[src]

Checks if the value of the field is SE_SIGN_DF_UNSG

pub fn is_all_unsigned(&self) -> bool[src]

Checks if the value of the field is ALL_UNSIGNED

pub fn is_all_signed(&self) -> bool[src]

Checks if the value of the field is ALL_SIGNED

impl R<u32, Reg<u32, _EMR>>[src]

pub fn cmpmode(&self) -> CMPMODE_R[src]

Bits 0:1 - Comparison Mode

pub fn cmpsel(&self) -> CMPSEL_R[src]

Bits 3:7 - Comparison Selected Channel

pub fn cmpall(&self) -> CMPALL_R[src]

Bit 9 - Compare All Channels

pub fn cmpfilter(&self) -> CMPFILTER_R[src]

Bits 12:13 - Compare Event Filtering

pub fn res(&self) -> RES_R[src]

Bits 16:18 - Resolution

pub fn afemode(&self) -> AFEMODE_R[src]

Bits 20:21 - AFE Running Mode

pub fn tag(&self) -> TAG_R[src]

Bit 24 - TAG of the AFEC_LDCR

pub fn stm(&self) -> STM_R[src]

Bit 25 - Single Trigger Mode

pub fn signmode(&self) -> SIGNMODE_R[src]

Bits 28:29 - Sign Mode

impl R<u32, Reg<u32, _SEQ1R>>[src]

pub fn usch0(&self) -> USCH0_R[src]

Bits 0:3 - User Sequence Number 0

pub fn usch1(&self) -> USCH1_R[src]

Bits 4:7 - User Sequence Number 1

pub fn usch2(&self) -> USCH2_R[src]

Bits 8:11 - User Sequence Number 2

pub fn usch3(&self) -> USCH3_R[src]

Bits 12:15 - User Sequence Number 3

pub fn usch4(&self) -> USCH4_R[src]

Bits 16:19 - User Sequence Number 4

pub fn usch5(&self) -> USCH5_R[src]

Bits 20:23 - User Sequence Number 5

pub fn usch6(&self) -> USCH6_R[src]

Bits 24:27 - User Sequence Number 6

pub fn usch7(&self) -> USCH7_R[src]

Bits 28:31 - User Sequence Number 7

impl R<u32, Reg<u32, _SEQ2R>>[src]

pub fn usch8(&self) -> USCH8_R[src]

Bits 0:3 - User Sequence Number 8

pub fn usch9(&self) -> USCH9_R[src]

Bits 4:7 - User Sequence Number 9

pub fn usch10(&self) -> USCH10_R[src]

Bits 8:11 - User Sequence Number 10

pub fn usch11(&self) -> USCH11_R[src]

Bits 12:15 - User Sequence Number 11

pub fn usch12(&self) -> USCH12_R[src]

Bits 16:19 - User Sequence Number 12

pub fn usch13(&self) -> USCH13_R[src]

Bits 20:23 - User Sequence Number 13

pub fn usch14(&self) -> USCH14_R[src]

Bits 24:27 - User Sequence Number 14

pub fn usch15(&self) -> USCH15_R[src]

Bits 28:31 - User Sequence Number 15

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn ch0(&self) -> CH0_R[src]

Bit 0 - Channel 0 Status

pub fn ch1(&self) -> CH1_R[src]

Bit 1 - Channel 1 Status

pub fn ch2(&self) -> CH2_R[src]

Bit 2 - Channel 2 Status

pub fn ch3(&self) -> CH3_R[src]

Bit 3 - Channel 3 Status

pub fn ch4(&self) -> CH4_R[src]

Bit 4 - Channel 4 Status

pub fn ch5(&self) -> CH5_R[src]

Bit 5 - Channel 5 Status

pub fn ch6(&self) -> CH6_R[src]

Bit 6 - Channel 6 Status

pub fn ch7(&self) -> CH7_R[src]

Bit 7 - Channel 7 Status

pub fn ch8(&self) -> CH8_R[src]

Bit 8 - Channel 8 Status

pub fn ch9(&self) -> CH9_R[src]

Bit 9 - Channel 9 Status

pub fn ch10(&self) -> CH10_R[src]

Bit 10 - Channel 10 Status

pub fn ch11(&self) -> CH11_R[src]

Bit 11 - Channel 11 Status

pub fn ch12(&self) -> CH12_R[src]

Bit 12 - Channel 12 Status

pub fn ch13(&self) -> CH13_R[src]

Bit 13 - Channel 13 Status

pub fn ch14(&self) -> CH14_R[src]

Bit 14 - Channel 14 Status

pub fn ch15(&self) -> CH15_R[src]

Bit 15 - Channel 15 Status

impl R<u32, Reg<u32, _LCDR>>[src]

pub fn ldata(&self) -> LDATA_R[src]

Bits 0:15 - Last Data Converted

pub fn chnb(&self) -> CHNB_R[src]

Bits 24:27 - Channel Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion Interrupt Mask 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion Interrupt Mask 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion Interrupt Mask 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion Interrupt Mask 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion Interrupt Mask 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion Interrupt Mask 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion Interrupt Mask 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion Interrupt Mask 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion Interrupt Mask 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion Interrupt Mask 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion Interrupt Mask 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion Interrupt Mask 11

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion Interrupt Mask 12

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion Interrupt Mask 13

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion Interrupt Mask 14

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion Interrupt Mask 15

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready Interrupt Mask

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error Interrupt Mask

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Event Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of Receive Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - Receive Buffer Full Interrupt Mask

pub fn tempchg(&self) -> TEMPCHG_R[src]

Bit 30 - Temperature Change Interrupt Mask

pub fn eocal(&self) -> EOCAL_R[src]

Bit 31 - End of Calibration Sequence Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion 11

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion 12

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion 13

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion 14

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion 15

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Error

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of RX Buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - RX Buffer Full

pub fn tempchg(&self) -> TEMPCHG_R[src]

Bit 30 - Temperature Change

pub fn eocal(&self) -> EOCAL_R[src]

Bit 31 - End of Calibration Sequence

impl R<u32, Reg<u32, _OVER>>[src]

pub fn ovre0(&self) -> OVRE0_R[src]

Bit 0 - Overrun Error 0

pub fn ovre1(&self) -> OVRE1_R[src]

Bit 1 - Overrun Error 1

pub fn ovre2(&self) -> OVRE2_R[src]

Bit 2 - Overrun Error 2

pub fn ovre3(&self) -> OVRE3_R[src]

Bit 3 - Overrun Error 3

pub fn ovre4(&self) -> OVRE4_R[src]

Bit 4 - Overrun Error 4

pub fn ovre5(&self) -> OVRE5_R[src]

Bit 5 - Overrun Error 5

pub fn ovre6(&self) -> OVRE6_R[src]

Bit 6 - Overrun Error 6

pub fn ovre7(&self) -> OVRE7_R[src]

Bit 7 - Overrun Error 7

pub fn ovre8(&self) -> OVRE8_R[src]

Bit 8 - Overrun Error 8

pub fn ovre9(&self) -> OVRE9_R[src]

Bit 9 - Overrun Error 9

pub fn ovre10(&self) -> OVRE10_R[src]

Bit 10 - Overrun Error 10

pub fn ovre11(&self) -> OVRE11_R[src]

Bit 11 - Overrun Error 11

pub fn ovre12(&self) -> OVRE12_R[src]

Bit 12 - Overrun Error 12

pub fn ovre13(&self) -> OVRE13_R[src]

Bit 13 - Overrun Error 13

pub fn ovre14(&self) -> OVRE14_R[src]

Bit 14 - Overrun Error 14

pub fn ovre15(&self) -> OVRE15_R[src]

Bit 15 - Overrun Error 15

impl R<u32, Reg<u32, _CWR>>[src]

pub fn lowthres(&self) -> LOWTHRES_R[src]

Bits 0:15 - Low Threshold

pub fn highthres(&self) -> HIGHTHRES_R[src]

Bits 16:31 - High Threshold

impl R<u32, Reg<u32, _CGR>>[src]

pub fn gain0(&self) -> GAIN0_R[src]

Bits 0:1 - Gain for channel 0

pub fn gain1(&self) -> GAIN1_R[src]

Bits 2:3 - Gain for channel 1

pub fn gain2(&self) -> GAIN2_R[src]

Bits 4:5 - Gain for channel 2

pub fn gain3(&self) -> GAIN3_R[src]

Bits 6:7 - Gain for channel 3

pub fn gain4(&self) -> GAIN4_R[src]

Bits 8:9 - Gain for channel 4

pub fn gain5(&self) -> GAIN5_R[src]

Bits 10:11 - Gain for channel 5

pub fn gain6(&self) -> GAIN6_R[src]

Bits 12:13 - Gain for channel 6

pub fn gain7(&self) -> GAIN7_R[src]

Bits 14:15 - Gain for channel 7

pub fn gain8(&self) -> GAIN8_R[src]

Bits 16:17 - Gain for channel 8

pub fn gain9(&self) -> GAIN9_R[src]

Bits 18:19 - Gain for channel 9

pub fn gain10(&self) -> GAIN10_R[src]

Bits 20:21 - Gain for channel 10

pub fn gain11(&self) -> GAIN11_R[src]

Bits 22:23 - Gain for channel 11

pub fn gain12(&self) -> GAIN12_R[src]

Bits 24:25 - Gain for channel 12

pub fn gain13(&self) -> GAIN13_R[src]

Bits 26:27 - Gain for channel 13

pub fn gain14(&self) -> GAIN14_R[src]

Bits 28:29 - Gain for channel 14

pub fn gain15(&self) -> GAIN15_R[src]

Bits 30:31 - Gain for channel 15

impl R<u32, Reg<u32, _CDOR>>[src]

pub fn off0(&self) -> OFF0_R[src]

Bit 0 - Offset for Channel 0, used in Automatic Calibration Procedure

pub fn off1(&self) -> OFF1_R[src]

Bit 1 - Offset for Channel 1, used in Automatic Calibration Procedure

pub fn off2(&self) -> OFF2_R[src]

Bit 2 - Offset for Channel 2, used in Automatic Calibration Procedure

pub fn off3(&self) -> OFF3_R[src]

Bit 3 - Offset for Channel 3, used in Automatic Calibration Procedure

pub fn off4(&self) -> OFF4_R[src]

Bit 4 - Offset for Channel 4, used in Automatic Calibration Procedure

pub fn off5(&self) -> OFF5_R[src]

Bit 5 - Offset for Channel 5, used in Automatic Calibration Procedure

pub fn off6(&self) -> OFF6_R[src]

Bit 6 - Offset for Channel 6, used in Automatic Calibration Procedure

pub fn off7(&self) -> OFF7_R[src]

Bit 7 - Offset for Channel 7, used in Automatic Calibration Procedure

pub fn off8(&self) -> OFF8_R[src]

Bit 8 - Offset for Channel 8, used in Automatic Calibration Procedure

pub fn off9(&self) -> OFF9_R[src]

Bit 9 - Offset for Channel 9, used in Automatic Calibration Procedure

pub fn off10(&self) -> OFF10_R[src]

Bit 10 - Offset for Channel 10, used in Automatic Calibration Procedure

pub fn off11(&self) -> OFF11_R[src]

Bit 11 - Offset for Channel 11, used in Automatic Calibration Procedure

pub fn off12(&self) -> OFF12_R[src]

Bit 12 - Offset for Channel 12, used in Automatic Calibration Procedure

pub fn off13(&self) -> OFF13_R[src]

Bit 13 - Offset for Channel 13, used in Automatic Calibration Procedure

pub fn off14(&self) -> OFF14_R[src]

Bit 14 - Offset for Channel 14, used in Automatic Calibration Procedure

pub fn off15(&self) -> OFF15_R[src]

Bit 15 - Offset for Channel 15, used in Automatic Calibration Procedure

impl R<u32, Reg<u32, _DIFFR>>[src]

pub fn diff0(&self) -> DIFF0_R[src]

Bit 0 - Differential inputs for channel 0

pub fn diff1(&self) -> DIFF1_R[src]

Bit 1 - Differential inputs for channel 1

pub fn diff2(&self) -> DIFF2_R[src]

Bit 2 - Differential inputs for channel 2

pub fn diff3(&self) -> DIFF3_R[src]

Bit 3 - Differential inputs for channel 3

pub fn diff4(&self) -> DIFF4_R[src]

Bit 4 - Differential inputs for channel 4

pub fn diff5(&self) -> DIFF5_R[src]

Bit 5 - Differential inputs for channel 5

pub fn diff6(&self) -> DIFF6_R[src]

Bit 6 - Differential inputs for channel 6

pub fn diff7(&self) -> DIFF7_R[src]

Bit 7 - Differential inputs for channel 7

pub fn diff8(&self) -> DIFF8_R[src]

Bit 8 - Differential inputs for channel 8

pub fn diff9(&self) -> DIFF9_R[src]

Bit 9 - Differential inputs for channel 9

pub fn diff10(&self) -> DIFF10_R[src]

Bit 10 - Differential inputs for channel 10

pub fn diff11(&self) -> DIFF11_R[src]

Bit 11 - Differential inputs for channel 11

pub fn diff12(&self) -> DIFF12_R[src]

Bit 12 - Differential inputs for channel 12

pub fn diff13(&self) -> DIFF13_R[src]

Bit 13 - Differential inputs for channel 13

pub fn diff14(&self) -> DIFF14_R[src]

Bit 14 - Differential inputs for channel 14

pub fn diff15(&self) -> DIFF15_R[src]

Bit 15 - Differential inputs for channel 15

impl R<u32, Reg<u32, _CSELR>>[src]

pub fn csel(&self) -> CSEL_R[src]

Bits 0:3 - Channel Selection

impl R<u32, Reg<u32, _CDR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:11 - Converted Data

impl R<u32, Reg<u32, _COCR>>[src]

pub fn aoff(&self) -> AOFF_R[src]

Bits 0:11 - Analog Offset

impl R<u8, TEMPCMPMOD_A>[src]

pub fn variant(&self) -> TEMPCMPMOD_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u32, Reg<u32, _TEMPMR>>[src]

pub fn rtct(&self) -> RTCT_R[src]

Bit 0 - Temperature Sensor RTC Trigger mode

pub fn tempcmpmod(&self) -> TEMPCMPMOD_R[src]

Bits 4:5 - Temperature Comparison Mode

impl R<u32, Reg<u32, _TEMPCWR>>[src]

pub fn tlowthres(&self) -> TLOWTHRES_R[src]

Bits 0:15 - Temperature Low Threshold

pub fn thighthres(&self) -> THIGHTHRES_R[src]

Bits 16:31 - Temperature High Threshold

impl R<u32, Reg<u32, _ACR>>[src]

pub fn ibctl(&self) -> IBCTL_R[src]

Bits 8:9 - AFEC Bias Current Control

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect KEY

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protect Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<bool, TRGEN_A>[src]

pub fn variant(&self) -> TRGEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, TRGSEL_A>[src]

pub fn variant(&self) -> Variant<u8, TRGSEL_A>[src]

Get enumerated values variant

pub fn is_afec_trig0(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG0

pub fn is_afec_trig1(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG1

pub fn is_afec_trig2(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG2

pub fn is_afec_trig3(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG3

pub fn is_afec_trig4(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG4

pub fn is_afec_trig5(&self) -> bool[src]

Checks if the value of the field is AFEC_TRIG5

impl R<bool, SLEEP_A>[src]

pub fn variant(&self) -> SLEEP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_sleep(&self) -> bool[src]

Checks if the value of the field is SLEEP

impl R<bool, FWUP_A>[src]

pub fn variant(&self) -> FWUP_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, FREERUN_A>[src]

pub fn variant(&self) -> FREERUN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> STARTUP_A[src]

Get enumerated values variant

pub fn is_sut0(&self) -> bool[src]

Checks if the value of the field is SUT0

pub fn is_sut8(&self) -> bool[src]

Checks if the value of the field is SUT8

pub fn is_sut16(&self) -> bool[src]

Checks if the value of the field is SUT16

pub fn is_sut24(&self) -> bool[src]

Checks if the value of the field is SUT24

pub fn is_sut64(&self) -> bool[src]

Checks if the value of the field is SUT64

pub fn is_sut80(&self) -> bool[src]

Checks if the value of the field is SUT80

pub fn is_sut96(&self) -> bool[src]

Checks if the value of the field is SUT96

pub fn is_sut112(&self) -> bool[src]

Checks if the value of the field is SUT112

pub fn is_sut512(&self) -> bool[src]

Checks if the value of the field is SUT512

pub fn is_sut576(&self) -> bool[src]

Checks if the value of the field is SUT576

pub fn is_sut640(&self) -> bool[src]

Checks if the value of the field is SUT640

pub fn is_sut704(&self) -> bool[src]

Checks if the value of the field is SUT704

pub fn is_sut768(&self) -> bool[src]

Checks if the value of the field is SUT768

pub fn is_sut832(&self) -> bool[src]

Checks if the value of the field is SUT832

pub fn is_sut896(&self) -> bool[src]

Checks if the value of the field is SUT896

pub fn is_sut960(&self) -> bool[src]

Checks if the value of the field is SUT960

impl R<u8, SETTLING_A>[src]

pub fn variant(&self) -> SETTLING_A[src]

Get enumerated values variant

pub fn is_ast3(&self) -> bool[src]

Checks if the value of the field is AST3

pub fn is_ast5(&self) -> bool[src]

Checks if the value of the field is AST5

pub fn is_ast9(&self) -> bool[src]

Checks if the value of the field is AST9

pub fn is_ast17(&self) -> bool[src]

Checks if the value of the field is AST17

impl R<bool, ANACH_A>[src]

pub fn variant(&self) -> ANACH_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_allowed(&self) -> bool[src]

Checks if the value of the field is ALLOWED

impl R<bool, USEQ_A>[src]

pub fn variant(&self) -> USEQ_A[src]

Get enumerated values variant

pub fn is_num_order(&self) -> bool[src]

Checks if the value of the field is NUM_ORDER

pub fn is_reg_order(&self) -> bool[src]

Checks if the value of the field is REG_ORDER

impl R<u32, Reg<u32, _MR>>[src]

pub fn trgen(&self) -> TRGEN_R[src]

Bit 0 - Trigger Enable

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 1:3 - Trigger Selection

pub fn sleep(&self) -> SLEEP_R[src]

Bit 5 - Sleep Mode

pub fn fwup(&self) -> FWUP_R[src]

Bit 6 - Fast Wake-up

pub fn freerun(&self) -> FREERUN_R[src]

Bit 7 - Free Run Mode

pub fn prescal(&self) -> PRESCAL_R[src]

Bits 8:15 - Prescaler Rate Selection

pub fn startup(&self) -> STARTUP_R[src]

Bits 16:19 - Start-up Time

pub fn settling(&self) -> SETTLING_R[src]

Bits 20:21 - Analog Settling Time

pub fn anach(&self) -> ANACH_R[src]

Bit 23 - Analog Change

pub fn tracktim(&self) -> TRACKTIM_R[src]

Bits 24:27 - Tracking Time

pub fn transfer(&self) -> TRANSFER_R[src]

Bits 28:29 - Transfer Period

pub fn useq(&self) -> USEQ_R[src]

Bit 31 - Use Sequence Enable

impl R<u8, CMPMODE_A>[src]

pub fn variant(&self) -> CMPMODE_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, RES_A>[src]

pub fn variant(&self) -> Variant<u8, RES_A>[src]

Get enumerated values variant

pub fn is_no_average(&self) -> bool[src]

Checks if the value of the field is NO_AVERAGE

pub fn is_low_res(&self) -> bool[src]

Checks if the value of the field is LOW_RES

pub fn is_osr4(&self) -> bool[src]

Checks if the value of the field is OSR4

pub fn is_osr16(&self) -> bool[src]

Checks if the value of the field is OSR16

pub fn is_osr64(&self) -> bool[src]

Checks if the value of the field is OSR64

pub fn is_osr256(&self) -> bool[src]

Checks if the value of the field is OSR256

impl R<u8, AFEMODE_A>[src]

pub fn variant(&self) -> AFEMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_offset_error(&self) -> bool[src]

Checks if the value of the field is OFFSET_ERROR

pub fn is_gain_error_high(&self) -> bool[src]

Checks if the value of the field is GAIN_ERROR_HIGH

pub fn is_gain_error_low(&self) -> bool[src]

Checks if the value of the field is GAIN_ERROR_LOW

impl R<u8, SIGNMODE_A>[src]

pub fn variant(&self) -> SIGNMODE_A[src]

Get enumerated values variant

pub fn is_se_unsg_df_sign(&self) -> bool[src]

Checks if the value of the field is SE_UNSG_DF_SIGN

pub fn is_se_sign_df_unsg(&self) -> bool[src]

Checks if the value of the field is SE_SIGN_DF_UNSG

pub fn is_all_unsigned(&self) -> bool[src]

Checks if the value of the field is ALL_UNSIGNED

pub fn is_all_signed(&self) -> bool[src]

Checks if the value of the field is ALL_SIGNED

impl R<u32, Reg<u32, _EMR>>[src]

pub fn cmpmode(&self) -> CMPMODE_R[src]

Bits 0:1 - Comparison Mode

pub fn cmpsel(&self) -> CMPSEL_R[src]

Bits 3:7 - Comparison Selected Channel

pub fn cmpall(&self) -> CMPALL_R[src]

Bit 9 - Compare All Channels

pub fn cmpfilter(&self) -> CMPFILTER_R[src]

Bits 12:13 - Compare Event Filtering

pub fn res(&self) -> RES_R[src]

Bits 16:18 - Resolution

pub fn afemode(&self) -> AFEMODE_R[src]

Bits 20:21 - AFE Running Mode

pub fn tag(&self) -> TAG_R[src]

Bit 24 - TAG of the AFEC_LDCR

pub fn stm(&self) -> STM_R[src]

Bit 25 - Single Trigger Mode

pub fn signmode(&self) -> SIGNMODE_R[src]

Bits 28:29 - Sign Mode

impl R<u32, Reg<u32, _SEQ1R>>[src]

pub fn usch0(&self) -> USCH0_R[src]

Bits 0:3 - User Sequence Number 0

pub fn usch1(&self) -> USCH1_R[src]

Bits 4:7 - User Sequence Number 1

pub fn usch2(&self) -> USCH2_R[src]

Bits 8:11 - User Sequence Number 2

pub fn usch3(&self) -> USCH3_R[src]

Bits 12:15 - User Sequence Number 3

pub fn usch4(&self) -> USCH4_R[src]

Bits 16:19 - User Sequence Number 4

pub fn usch5(&self) -> USCH5_R[src]

Bits 20:23 - User Sequence Number 5

pub fn usch6(&self) -> USCH6_R[src]

Bits 24:27 - User Sequence Number 6

pub fn usch7(&self) -> USCH7_R[src]

Bits 28:31 - User Sequence Number 7

impl R<u32, Reg<u32, _SEQ2R>>[src]

pub fn usch8(&self) -> USCH8_R[src]

Bits 0:3 - User Sequence Number 8

pub fn usch9(&self) -> USCH9_R[src]

Bits 4:7 - User Sequence Number 9

pub fn usch10(&self) -> USCH10_R[src]

Bits 8:11 - User Sequence Number 10

pub fn usch11(&self) -> USCH11_R[src]

Bits 12:15 - User Sequence Number 11

pub fn usch12(&self) -> USCH12_R[src]

Bits 16:19 - User Sequence Number 12

pub fn usch13(&self) -> USCH13_R[src]

Bits 20:23 - User Sequence Number 13

pub fn usch14(&self) -> USCH14_R[src]

Bits 24:27 - User Sequence Number 14

pub fn usch15(&self) -> USCH15_R[src]

Bits 28:31 - User Sequence Number 15

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn ch0(&self) -> CH0_R[src]

Bit 0 - Channel 0 Status

pub fn ch1(&self) -> CH1_R[src]

Bit 1 - Channel 1 Status

pub fn ch2(&self) -> CH2_R[src]

Bit 2 - Channel 2 Status

pub fn ch3(&self) -> CH3_R[src]

Bit 3 - Channel 3 Status

pub fn ch4(&self) -> CH4_R[src]

Bit 4 - Channel 4 Status

pub fn ch5(&self) -> CH5_R[src]

Bit 5 - Channel 5 Status

pub fn ch6(&self) -> CH6_R[src]

Bit 6 - Channel 6 Status

pub fn ch7(&self) -> CH7_R[src]

Bit 7 - Channel 7 Status

pub fn ch8(&self) -> CH8_R[src]

Bit 8 - Channel 8 Status

pub fn ch9(&self) -> CH9_R[src]

Bit 9 - Channel 9 Status

pub fn ch10(&self) -> CH10_R[src]

Bit 10 - Channel 10 Status

pub fn ch11(&self) -> CH11_R[src]

Bit 11 - Channel 11 Status

pub fn ch12(&self) -> CH12_R[src]

Bit 12 - Channel 12 Status

pub fn ch13(&self) -> CH13_R[src]

Bit 13 - Channel 13 Status

pub fn ch14(&self) -> CH14_R[src]

Bit 14 - Channel 14 Status

pub fn ch15(&self) -> CH15_R[src]

Bit 15 - Channel 15 Status

impl R<u32, Reg<u32, _LCDR>>[src]

pub fn ldata(&self) -> LDATA_R[src]

Bits 0:15 - Last Data Converted

pub fn chnb(&self) -> CHNB_R[src]

Bits 24:27 - Channel Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion Interrupt Mask 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion Interrupt Mask 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion Interrupt Mask 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion Interrupt Mask 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion Interrupt Mask 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion Interrupt Mask 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion Interrupt Mask 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion Interrupt Mask 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion Interrupt Mask 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion Interrupt Mask 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion Interrupt Mask 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion Interrupt Mask 11

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion Interrupt Mask 12

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion Interrupt Mask 13

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion Interrupt Mask 14

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion Interrupt Mask 15

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready Interrupt Mask

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error Interrupt Mask

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Event Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of Receive Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - Receive Buffer Full Interrupt Mask

pub fn tempchg(&self) -> TEMPCHG_R[src]

Bit 30 - Temperature Change Interrupt Mask

pub fn eocal(&self) -> EOCAL_R[src]

Bit 31 - End of Calibration Sequence Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn eoc0(&self) -> EOC0_R[src]

Bit 0 - End of Conversion 0

pub fn eoc1(&self) -> EOC1_R[src]

Bit 1 - End of Conversion 1

pub fn eoc2(&self) -> EOC2_R[src]

Bit 2 - End of Conversion 2

pub fn eoc3(&self) -> EOC3_R[src]

Bit 3 - End of Conversion 3

pub fn eoc4(&self) -> EOC4_R[src]

Bit 4 - End of Conversion 4

pub fn eoc5(&self) -> EOC5_R[src]

Bit 5 - End of Conversion 5

pub fn eoc6(&self) -> EOC6_R[src]

Bit 6 - End of Conversion 6

pub fn eoc7(&self) -> EOC7_R[src]

Bit 7 - End of Conversion 7

pub fn eoc8(&self) -> EOC8_R[src]

Bit 8 - End of Conversion 8

pub fn eoc9(&self) -> EOC9_R[src]

Bit 9 - End of Conversion 9

pub fn eoc10(&self) -> EOC10_R[src]

Bit 10 - End of Conversion 10

pub fn eoc11(&self) -> EOC11_R[src]

Bit 11 - End of Conversion 11

pub fn eoc12(&self) -> EOC12_R[src]

Bit 12 - End of Conversion 12

pub fn eoc13(&self) -> EOC13_R[src]

Bit 13 - End of Conversion 13

pub fn eoc14(&self) -> EOC14_R[src]

Bit 14 - End of Conversion 14

pub fn eoc15(&self) -> EOC15_R[src]

Bit 15 - End of Conversion 15

pub fn drdy(&self) -> DRDY_R[src]

Bit 24 - Data Ready

pub fn govre(&self) -> GOVRE_R[src]

Bit 25 - General Overrun Error

pub fn compe(&self) -> COMPE_R[src]

Bit 26 - Comparison Error

pub fn endrx(&self) -> ENDRX_R[src]

Bit 27 - End of RX Buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 28 - RX Buffer Full

pub fn tempchg(&self) -> TEMPCHG_R[src]

Bit 30 - Temperature Change

pub fn eocal(&self) -> EOCAL_R[src]

Bit 31 - End of Calibration Sequence

impl R<u32, Reg<u32, _OVER>>[src]

pub fn ovre0(&self) -> OVRE0_R[src]

Bit 0 - Overrun Error 0

pub fn ovre1(&self) -> OVRE1_R[src]

Bit 1 - Overrun Error 1

pub fn ovre2(&self) -> OVRE2_R[src]

Bit 2 - Overrun Error 2

pub fn ovre3(&self) -> OVRE3_R[src]

Bit 3 - Overrun Error 3

pub fn ovre4(&self) -> OVRE4_R[src]

Bit 4 - Overrun Error 4

pub fn ovre5(&self) -> OVRE5_R[src]

Bit 5 - Overrun Error 5

pub fn ovre6(&self) -> OVRE6_R[src]

Bit 6 - Overrun Error 6

pub fn ovre7(&self) -> OVRE7_R[src]

Bit 7 - Overrun Error 7

pub fn ovre8(&self) -> OVRE8_R[src]

Bit 8 - Overrun Error 8

pub fn ovre9(&self) -> OVRE9_R[src]

Bit 9 - Overrun Error 9

pub fn ovre10(&self) -> OVRE10_R[src]

Bit 10 - Overrun Error 10

pub fn ovre11(&self) -> OVRE11_R[src]

Bit 11 - Overrun Error 11

pub fn ovre12(&self) -> OVRE12_R[src]

Bit 12 - Overrun Error 12

pub fn ovre13(&self) -> OVRE13_R[src]

Bit 13 - Overrun Error 13

pub fn ovre14(&self) -> OVRE14_R[src]

Bit 14 - Overrun Error 14

pub fn ovre15(&self) -> OVRE15_R[src]

Bit 15 - Overrun Error 15

impl R<u32, Reg<u32, _CWR>>[src]

pub fn lowthres(&self) -> LOWTHRES_R[src]

Bits 0:15 - Low Threshold

pub fn highthres(&self) -> HIGHTHRES_R[src]

Bits 16:31 - High Threshold

impl R<u32, Reg<u32, _CGR>>[src]

pub fn gain0(&self) -> GAIN0_R[src]

Bits 0:1 - Gain for channel 0

pub fn gain1(&self) -> GAIN1_R[src]

Bits 2:3 - Gain for channel 1

pub fn gain2(&self) -> GAIN2_R[src]

Bits 4:5 - Gain for channel 2

pub fn gain3(&self) -> GAIN3_R[src]

Bits 6:7 - Gain for channel 3

pub fn gain4(&self) -> GAIN4_R[src]

Bits 8:9 - Gain for channel 4

pub fn gain5(&self) -> GAIN5_R[src]

Bits 10:11 - Gain for channel 5

pub fn gain6(&self) -> GAIN6_R[src]

Bits 12:13 - Gain for channel 6

pub fn gain7(&self) -> GAIN7_R[src]

Bits 14:15 - Gain for channel 7

pub fn gain8(&self) -> GAIN8_R[src]

Bits 16:17 - Gain for channel 8

pub fn gain9(&self) -> GAIN9_R[src]

Bits 18:19 - Gain for channel 9

pub fn gain10(&self) -> GAIN10_R[src]

Bits 20:21 - Gain for channel 10

pub fn gain11(&self) -> GAIN11_R[src]

Bits 22:23 - Gain for channel 11

pub fn gain12(&self) -> GAIN12_R[src]

Bits 24:25 - Gain for channel 12

pub fn gain13(&self) -> GAIN13_R[src]

Bits 26:27 - Gain for channel 13

pub fn gain14(&self) -> GAIN14_R[src]

Bits 28:29 - Gain for channel 14

pub fn gain15(&self) -> GAIN15_R[src]

Bits 30:31 - Gain for channel 15

impl R<u32, Reg<u32, _CDOR>>[src]

pub fn off0(&self) -> OFF0_R[src]

Bit 0 - Offset for Channel 0, used in Automatic Calibration Procedure

pub fn off1(&self) -> OFF1_R[src]

Bit 1 - Offset for Channel 1, used in Automatic Calibration Procedure

pub fn off2(&self) -> OFF2_R[src]

Bit 2 - Offset for Channel 2, used in Automatic Calibration Procedure

pub fn off3(&self) -> OFF3_R[src]

Bit 3 - Offset for Channel 3, used in Automatic Calibration Procedure

pub fn off4(&self) -> OFF4_R[src]

Bit 4 - Offset for Channel 4, used in Automatic Calibration Procedure

pub fn off5(&self) -> OFF5_R[src]

Bit 5 - Offset for Channel 5, used in Automatic Calibration Procedure

pub fn off6(&self) -> OFF6_R[src]

Bit 6 - Offset for Channel 6, used in Automatic Calibration Procedure

pub fn off7(&self) -> OFF7_R[src]

Bit 7 - Offset for Channel 7, used in Automatic Calibration Procedure

pub fn off8(&self) -> OFF8_R[src]

Bit 8 - Offset for Channel 8, used in Automatic Calibration Procedure

pub fn off9(&self) -> OFF9_R[src]

Bit 9 - Offset for Channel 9, used in Automatic Calibration Procedure

pub fn off10(&self) -> OFF10_R[src]

Bit 10 - Offset for Channel 10, used in Automatic Calibration Procedure

pub fn off11(&self) -> OFF11_R[src]

Bit 11 - Offset for Channel 11, used in Automatic Calibration Procedure

pub fn off12(&self) -> OFF12_R[src]

Bit 12 - Offset for Channel 12, used in Automatic Calibration Procedure

pub fn off13(&self) -> OFF13_R[src]

Bit 13 - Offset for Channel 13, used in Automatic Calibration Procedure

pub fn off14(&self) -> OFF14_R[src]

Bit 14 - Offset for Channel 14, used in Automatic Calibration Procedure

pub fn off15(&self) -> OFF15_R[src]

Bit 15 - Offset for Channel 15, used in Automatic Calibration Procedure

impl R<u32, Reg<u32, _DIFFR>>[src]

pub fn diff0(&self) -> DIFF0_R[src]

Bit 0 - Differential inputs for channel 0

pub fn diff1(&self) -> DIFF1_R[src]

Bit 1 - Differential inputs for channel 1

pub fn diff2(&self) -> DIFF2_R[src]

Bit 2 - Differential inputs for channel 2

pub fn diff3(&self) -> DIFF3_R[src]

Bit 3 - Differential inputs for channel 3

pub fn diff4(&self) -> DIFF4_R[src]

Bit 4 - Differential inputs for channel 4

pub fn diff5(&self) -> DIFF5_R[src]

Bit 5 - Differential inputs for channel 5

pub fn diff6(&self) -> DIFF6_R[src]

Bit 6 - Differential inputs for channel 6

pub fn diff7(&self) -> DIFF7_R[src]

Bit 7 - Differential inputs for channel 7

pub fn diff8(&self) -> DIFF8_R[src]

Bit 8 - Differential inputs for channel 8

pub fn diff9(&self) -> DIFF9_R[src]

Bit 9 - Differential inputs for channel 9

pub fn diff10(&self) -> DIFF10_R[src]

Bit 10 - Differential inputs for channel 10

pub fn diff11(&self) -> DIFF11_R[src]

Bit 11 - Differential inputs for channel 11

pub fn diff12(&self) -> DIFF12_R[src]

Bit 12 - Differential inputs for channel 12

pub fn diff13(&self) -> DIFF13_R[src]

Bit 13 - Differential inputs for channel 13

pub fn diff14(&self) -> DIFF14_R[src]

Bit 14 - Differential inputs for channel 14

pub fn diff15(&self) -> DIFF15_R[src]

Bit 15 - Differential inputs for channel 15

impl R<u32, Reg<u32, _CSELR>>[src]

pub fn csel(&self) -> CSEL_R[src]

Bits 0:3 - Channel Selection

impl R<u32, Reg<u32, _CDR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:11 - Converted Data

impl R<u32, Reg<u32, _COCR>>[src]

pub fn aoff(&self) -> AOFF_R[src]

Bits 0:11 - Analog Offset

impl R<u8, TEMPCMPMOD_A>[src]

pub fn variant(&self) -> TEMPCMPMOD_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u32, Reg<u32, _TEMPMR>>[src]

pub fn rtct(&self) -> RTCT_R[src]

Bit 0 - Temperature Sensor RTC Trigger mode

pub fn tempcmpmod(&self) -> TEMPCMPMOD_R[src]

Bits 4:5 - Temperature Comparison Mode

impl R<u32, Reg<u32, _TEMPCWR>>[src]

pub fn tlowthres(&self) -> TLOWTHRES_R[src]

Bits 0:15 - Temperature Low Threshold

pub fn thighthres(&self) -> THIGHTHRES_R[src]

Bits 16:31 - Temperature High Threshold

impl R<u32, Reg<u32, _ACR>>[src]

pub fn ibctl(&self) -> IBCTL_R[src]

Bits 8:9 - AFEC Bias Current Control

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect KEY

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protect Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<bool, TRGEN_A>[src]

pub fn variant(&self) -> TRGEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, TRGSEL_A>[src]

pub fn variant(&self) -> Variant<u8, TRGSEL_A>[src]

Get enumerated values variant

pub fn is_trgsel0(&self) -> bool[src]

Checks if the value of the field is TRGSEL0

pub fn is_trgsel1(&self) -> bool[src]

Checks if the value of the field is TRGSEL1

pub fn is_trgsel2(&self) -> bool[src]

Checks if the value of the field is TRGSEL2

pub fn is_trgsel3(&self) -> bool[src]

Checks if the value of the field is TRGSEL3

pub fn is_trgsel4(&self) -> bool[src]

Checks if the value of the field is TRGSEL4

pub fn is_trgsel5(&self) -> bool[src]

Checks if the value of the field is TRGSEL5

impl R<bool, WORD_A>[src]

pub fn variant(&self) -> WORD_A[src]

Get enumerated values variant

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, USER_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, USER_SEL_A>[src]

Get enumerated values variant

pub fn is_channel0(&self) -> bool[src]

Checks if the value of the field is CHANNEL0

pub fn is_channel1(&self) -> bool[src]

Checks if the value of the field is CHANNEL1

impl R<bool, TAG_A>[src]

pub fn variant(&self) -> TAG_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, MAXS_A>[src]

pub fn variant(&self) -> MAXS_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_maximum(&self) -> bool[src]

Checks if the value of the field is MAXIMUM

impl R<bool, CLKDIV_A>[src]

pub fn variant(&self) -> CLKDIV_A[src]

Get enumerated values variant

pub fn is_div_2(&self) -> bool[src]

Checks if the value of the field is DIV_2

pub fn is_div_4(&self) -> bool[src]

Checks if the value of the field is DIV_4

impl R<u8, STARTUP_A>[src]

pub fn variant(&self) -> STARTUP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_80(&self) -> bool[src]

Checks if the value of the field is _80

pub fn is_96(&self) -> bool[src]

Checks if the value of the field is _96

pub fn is_112(&self) -> bool[src]

Checks if the value of the field is _112

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_576(&self) -> bool[src]

Checks if the value of the field is _576

pub fn is_640(&self) -> bool[src]

Checks if the value of the field is _640

pub fn is_704(&self) -> bool[src]

Checks if the value of the field is _704

pub fn is_768(&self) -> bool[src]

Checks if the value of the field is _768

pub fn is_832(&self) -> bool[src]

Checks if the value of the field is _832

pub fn is_896(&self) -> bool[src]

Checks if the value of the field is _896

pub fn is_960(&self) -> bool[src]

Checks if the value of the field is _960

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

pub fn is_1088(&self) -> bool[src]

Checks if the value of the field is _1088

pub fn is_1152(&self) -> bool[src]

Checks if the value of the field is _1152

pub fn is_1216(&self) -> bool[src]

Checks if the value of the field is _1216

pub fn is_1280(&self) -> bool[src]

Checks if the value of the field is _1280

pub fn is_1344(&self) -> bool[src]

Checks if the value of the field is _1344

pub fn is_1408(&self) -> bool[src]

Checks if the value of the field is _1408

pub fn is_1472(&self) -> bool[src]

Checks if the value of the field is _1472

pub fn is_1536(&self) -> bool[src]

Checks if the value of the field is _1536

pub fn is_1600(&self) -> bool[src]

Checks if the value of the field is _1600

pub fn is_1664(&self) -> bool[src]

Checks if the value of the field is _1664

pub fn is_1728(&self) -> bool[src]

Checks if the value of the field is _1728

pub fn is_1792(&self) -> bool[src]

Checks if the value of the field is _1792

pub fn is_1856(&self) -> bool[src]

Checks if the value of the field is _1856

pub fn is_1920(&self) -> bool[src]

Checks if the value of the field is _1920

pub fn is_1984(&self) -> bool[src]

Checks if the value of the field is _1984

pub fn is_2048(&self) -> bool[src]

Checks if the value of the field is _2048

pub fn is_2112(&self) -> bool[src]

Checks if the value of the field is _2112

pub fn is_2176(&self) -> bool[src]

Checks if the value of the field is _2176

pub fn is_2240(&self) -> bool[src]

Checks if the value of the field is _2240

pub fn is_2304(&self) -> bool[src]

Checks if the value of the field is _2304

pub fn is_2368(&self) -> bool[src]

Checks if the value of the field is _2368

pub fn is_2432(&self) -> bool[src]

Checks if the value of the field is _2432

pub fn is_2496(&self) -> bool[src]

Checks if the value of the field is _2496

pub fn is_2560(&self) -> bool[src]

Checks if the value of the field is _2560

pub fn is_2624(&self) -> bool[src]

Checks if the value of the field is _2624

pub fn is_2688(&self) -> bool[src]

Checks if the value of the field is _2688

pub fn is_2752(&self) -> bool[src]

Checks if the value of the field is _2752

pub fn is_2816(&self) -> bool[src]

Checks if the value of the field is _2816

pub fn is_2880(&self) -> bool[src]

Checks if the value of the field is _2880

pub fn is_2944(&self) -> bool[src]

Checks if the value of the field is _2944

pub fn is_3008(&self) -> bool[src]

Checks if the value of the field is _3008

pub fn is_3072(&self) -> bool[src]

Checks if the value of the field is _3072

pub fn is_3136(&self) -> bool[src]

Checks if the value of the field is _3136

pub fn is_3200(&self) -> bool[src]

Checks if the value of the field is _3200

pub fn is_3264(&self) -> bool[src]

Checks if the value of the field is _3264

pub fn is_3328(&self) -> bool[src]

Checks if the value of the field is _3328

pub fn is_3392(&self) -> bool[src]

Checks if the value of the field is _3392

pub fn is_3456(&self) -> bool[src]

Checks if the value of the field is _3456

pub fn is_3520(&self) -> bool[src]

Checks if the value of the field is _3520

pub fn is_3584(&self) -> bool[src]

Checks if the value of the field is _3584

pub fn is_3648(&self) -> bool[src]

Checks if the value of the field is _3648

pub fn is_3712(&self) -> bool[src]

Checks if the value of the field is _3712

pub fn is_3776(&self) -> bool[src]

Checks if the value of the field is _3776

pub fn is_3840(&self) -> bool[src]

Checks if the value of the field is _3840

pub fn is_3904(&self) -> bool[src]

Checks if the value of the field is _3904

pub fn is_3968(&self) -> bool[src]

Checks if the value of the field is _3968

pub fn is_4032(&self) -> bool[src]

Checks if the value of the field is _4032

impl R<u32, Reg<u32, _MR>>[src]

pub fn trgen(&self) -> TRGEN_R[src]

Bit 0 - Trigger Enable

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 1:3 - Trigger Selection

pub fn word(&self) -> WORD_R[src]

Bit 4 - Word Transfer

pub fn one(&self) -> ONE_R[src]

Bit 8 - Must Be Set to 1

pub fn user_sel(&self) -> USER_SEL_R[src]

Bits 16:17 - User Channel Selection

pub fn tag(&self) -> TAG_R[src]

Bit 20 - Tag Selection Mode

pub fn maxs(&self) -> MAXS_R[src]

Bit 21 - Maximum Speed Mode

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bit 22 - Clock Divider

pub fn startup(&self) -> STARTUP_R[src]

Bits 24:29 - Startup Time Selection

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn ch0(&self) -> CH0_R[src]

Bit 0 - Channel 0 Status

pub fn ch1(&self) -> CH1_R[src]

Bit 1 - Channel 1 Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready Interrupt Mask

pub fn eoc(&self) -> EOC_R[src]

Bit 1 - End of Conversion Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 2 - End of Transmit Buffer Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 3 - Transmit Buffer Empty Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready Interrupt Flag

pub fn eoc(&self) -> EOC_R[src]

Bit 1 - End of Conversion Interrupt Flag

pub fn endtx(&self) -> ENDTX_R[src]

Bit 2 - End of DMA Interrupt Flag

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 3 - Transmit Buffer Empty

impl R<u32, Reg<u32, _ACR>>[src]

pub fn ibctlch0(&self) -> IBCTLCH0_R[src]

Bits 0:1 - Analog Output Current Control

pub fn ibctlch1(&self) -> IBCTLCH1_R[src]

Bits 2:3 - Analog Output Current Control

pub fn ibctldaccore(&self) -> IBCTLDACCORE_R[src]

Bits 8:9 - Bias Current Control for DAC Core

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:15 - Write Protection Violation Source

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, SELMINUS_A>[src]

pub fn variant(&self) -> SELMINUS_A[src]

Get enumerated values variant

pub fn is_ts(&self) -> bool[src]

Checks if the value of the field is TS

pub fn is_advref(&self) -> bool[src]

Checks if the value of the field is ADVREF

pub fn is_dac0(&self) -> bool[src]

Checks if the value of the field is DAC0

pub fn is_dac1(&self) -> bool[src]

Checks if the value of the field is DAC1

pub fn is_ad0(&self) -> bool[src]

Checks if the value of the field is AD0

pub fn is_ad1(&self) -> bool[src]

Checks if the value of the field is AD1

pub fn is_ad2(&self) -> bool[src]

Checks if the value of the field is AD2

pub fn is_ad3(&self) -> bool[src]

Checks if the value of the field is AD3

impl R<u8, SELPLUS_A>[src]

pub fn variant(&self) -> SELPLUS_A[src]

Get enumerated values variant

pub fn is_ad0(&self) -> bool[src]

Checks if the value of the field is AD0

pub fn is_ad1(&self) -> bool[src]

Checks if the value of the field is AD1

pub fn is_ad2(&self) -> bool[src]

Checks if the value of the field is AD2

pub fn is_ad3(&self) -> bool[src]

Checks if the value of the field is AD3

pub fn is_ad4(&self) -> bool[src]

Checks if the value of the field is AD4

pub fn is_ad5(&self) -> bool[src]

Checks if the value of the field is AD5

pub fn is_ad6(&self) -> bool[src]

Checks if the value of the field is AD6

pub fn is_ad7(&self) -> bool[src]

Checks if the value of the field is AD7

impl R<bool, ACEN_A>[src]

pub fn variant(&self) -> ACEN_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u8, EDGETYP_A>[src]

pub fn variant(&self) -> Variant<u8, EDGETYP_A>[src]

Get enumerated values variant

pub fn is_rising(&self) -> bool[src]

Checks if the value of the field is RISING

pub fn is_falling(&self) -> bool[src]

Checks if the value of the field is FALLING

pub fn is_any(&self) -> bool[src]

Checks if the value of the field is ANY

impl R<bool, INV_A>[src]

pub fn variant(&self) -> INV_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, SELFS_A>[src]

pub fn variant(&self) -> SELFS_A[src]

Get enumerated values variant

pub fn is_cf(&self) -> bool[src]

Checks if the value of the field is CF

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, FE_A>[src]

pub fn variant(&self) -> FE_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u32, Reg<u32, _MR>>[src]

pub fn selminus(&self) -> SELMINUS_R[src]

Bits 0:2 - Selection for Minus Comparator Input

pub fn selplus(&self) -> SELPLUS_R[src]

Bits 4:6 - Selection For Plus Comparator Input

pub fn acen(&self) -> ACEN_R[src]

Bit 8 - Analog Comparator Enable

pub fn edgetyp(&self) -> EDGETYP_R[src]

Bits 9:10 - Edge Type

pub fn inv(&self) -> INV_R[src]

Bit 12 - Invert Comparator Output

pub fn selfs(&self) -> SELFS_R[src]

Bit 13 - Selection Of Fault Source

pub fn fe(&self) -> FE_R[src]

Bit 14 - Fault Enable

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ce(&self) -> CE_R[src]

Bit 0 - Comparison Edge

impl R<u32, Reg<u32, _ISR>>[src]

pub fn ce(&self) -> CE_R[src]

Bit 0 - Comparison Edge

pub fn sco(&self) -> SCO_R[src]

Bit 1 - Synchronized Comparator Output

pub fn mask(&self) -> MASK_R[src]

Bit 31 - Flag Mask

impl R<bool, ISEL_A>[src]

pub fn variant(&self) -> ISEL_A[src]

Get enumerated values variant

pub fn is_lopw(&self) -> bool[src]

Checks if the value of the field is LOPW

pub fn is_hisp(&self) -> bool[src]

Checks if the value of the field is HISP

impl R<u32, Reg<u32, _ACR>>[src]

pub fn isel(&self) -> ISEL_R[src]

Bit 0 - Current Selection

pub fn hyst(&self) -> HYST_R[src]

Bits 1:2 - Hysteresis Selection

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

impl R<bool, ARB_CFG_A>[src]

pub fn variant(&self) -> ARB_CFG_A[src]

Get enumerated values variant

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

pub fn is_round_robin(&self) -> bool[src]

Checks if the value of the field is ROUND_ROBIN

impl R<u32, Reg<u32, _GCFG>>[src]

pub fn arb_cfg(&self) -> ARB_CFG_R[src]

Bit 4 - Arbiter Configuration

impl R<u32, Reg<u32, _EN>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - General Enable of DMA

impl R<u32, Reg<u32, _SREQ>>[src]

pub fn ssreq0(&self) -> SSREQ0_R[src]

Bit 0 - Source Request

pub fn dsreq0(&self) -> DSREQ0_R[src]

Bit 1 - Destination Request

pub fn ssreq1(&self) -> SSREQ1_R[src]

Bit 2 - Source Request

pub fn dsreq1(&self) -> DSREQ1_R[src]

Bit 3 - Destination Request

pub fn ssreq2(&self) -> SSREQ2_R[src]

Bit 4 - Source Request

pub fn dsreq2(&self) -> DSREQ2_R[src]

Bit 5 - Destination Request

pub fn ssreq3(&self) -> SSREQ3_R[src]

Bit 6 - Source Request

pub fn dsreq3(&self) -> DSREQ3_R[src]

Bit 7 - Destination Request

impl R<u32, Reg<u32, _CREQ>>[src]

pub fn screq0(&self) -> SCREQ0_R[src]

Bit 0 - Source Chunk Request

pub fn dcreq0(&self) -> DCREQ0_R[src]

Bit 1 - Destination Chunk Request

pub fn screq1(&self) -> SCREQ1_R[src]

Bit 2 - Source Chunk Request

pub fn dcreq1(&self) -> DCREQ1_R[src]

Bit 3 - Destination Chunk Request

pub fn screq2(&self) -> SCREQ2_R[src]

Bit 4 - Source Chunk Request

pub fn dcreq2(&self) -> DCREQ2_R[src]

Bit 5 - Destination Chunk Request

pub fn screq3(&self) -> SCREQ3_R[src]

Bit 6 - Source Chunk Request

pub fn dcreq3(&self) -> DCREQ3_R[src]

Bit 7 - Destination Chunk Request

impl R<u32, Reg<u32, _LAST>>[src]

pub fn slast0(&self) -> SLAST0_R[src]

Bit 0 - Source Last

pub fn dlast0(&self) -> DLAST0_R[src]

Bit 1 - Destination Last

pub fn slast1(&self) -> SLAST1_R[src]

Bit 2 - Source Last

pub fn dlast1(&self) -> DLAST1_R[src]

Bit 3 - Destination Last

pub fn slast2(&self) -> SLAST2_R[src]

Bit 4 - Source Last

pub fn dlast2(&self) -> DLAST2_R[src]

Bit 5 - Destination Last

pub fn slast3(&self) -> SLAST3_R[src]

Bit 6 - Source Last

pub fn dlast3(&self) -> DLAST3_R[src]

Bit 7 - Destination Last

impl R<u32, Reg<u32, _EBCIMR>>[src]

pub fn btc0(&self) -> BTC0_R[src]

Bit 0 - Buffer Transfer Completed [3:0]

pub fn btc1(&self) -> BTC1_R[src]

Bit 1 - Buffer Transfer Completed [3:0]

pub fn btc2(&self) -> BTC2_R[src]

Bit 2 - Buffer Transfer Completed [3:0]

pub fn btc3(&self) -> BTC3_R[src]

Bit 3 - Buffer Transfer Completed [3:0]

pub fn cbtc0(&self) -> CBTC0_R[src]

Bit 8 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc1(&self) -> CBTC1_R[src]

Bit 9 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc2(&self) -> CBTC2_R[src]

Bit 10 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc3(&self) -> CBTC3_R[src]

Bit 11 - Chained Buffer Transfer Completed [3:0]

pub fn err0(&self) -> ERR0_R[src]

Bit 16 - Access Error [3:0]

pub fn err1(&self) -> ERR1_R[src]

Bit 17 - Access Error [3:0]

pub fn err2(&self) -> ERR2_R[src]

Bit 18 - Access Error [3:0]

pub fn err3(&self) -> ERR3_R[src]

Bit 19 - Access Error [3:0]

impl R<u32, Reg<u32, _EBCISR>>[src]

pub fn btc0(&self) -> BTC0_R[src]

Bit 0 - Buffer Transfer Completed [3:0]

pub fn btc1(&self) -> BTC1_R[src]

Bit 1 - Buffer Transfer Completed [3:0]

pub fn btc2(&self) -> BTC2_R[src]

Bit 2 - Buffer Transfer Completed [3:0]

pub fn btc3(&self) -> BTC3_R[src]

Bit 3 - Buffer Transfer Completed [3:0]

pub fn cbtc0(&self) -> CBTC0_R[src]

Bit 8 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc1(&self) -> CBTC1_R[src]

Bit 9 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc2(&self) -> CBTC2_R[src]

Bit 10 - Chained Buffer Transfer Completed [3:0]

pub fn cbtc3(&self) -> CBTC3_R[src]

Bit 11 - Chained Buffer Transfer Completed [3:0]

pub fn err0(&self) -> ERR0_R[src]

Bit 16 - Access Error [3:0]

pub fn err1(&self) -> ERR1_R[src]

Bit 17 - Access Error [3:0]

pub fn err2(&self) -> ERR2_R[src]

Bit 18 - Access Error [3:0]

pub fn err3(&self) -> ERR3_R[src]

Bit 19 - Access Error [3:0]

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn ena0(&self) -> ENA0_R[src]

Bit 0 - Enable [3:0]

pub fn ena1(&self) -> ENA1_R[src]

Bit 1 - Enable [3:0]

pub fn ena2(&self) -> ENA2_R[src]

Bit 2 - Enable [3:0]

pub fn ena3(&self) -> ENA3_R[src]

Bit 3 - Enable [3:0]

pub fn susp0(&self) -> SUSP0_R[src]

Bit 8 - Suspend [3:0]

pub fn susp1(&self) -> SUSP1_R[src]

Bit 9 - Suspend [3:0]

pub fn susp2(&self) -> SUSP2_R[src]

Bit 10 - Suspend [3:0]

pub fn susp3(&self) -> SUSP3_R[src]

Bit 11 - Suspend [3:0]

pub fn empt0(&self) -> EMPT0_R[src]

Bit 16 - Empty [3:0]

pub fn empt1(&self) -> EMPT1_R[src]

Bit 17 - Empty [3:0]

pub fn empt2(&self) -> EMPT2_R[src]

Bit 18 - Empty [3:0]

pub fn empt3(&self) -> EMPT3_R[src]

Bit 19 - Empty [3:0]

pub fn stal0(&self) -> STAL0_R[src]

Bit 24 - Stalled [3:0]

pub fn stal1(&self) -> STAL1_R[src]

Bit 25 - Stalled [3:0]

pub fn stal2(&self) -> STAL2_R[src]

Bit 26 - Stalled [3:0]

pub fn stal3(&self) -> STAL3_R[src]

Bit 27 - Stalled [3:0]

impl R<u32, Reg<u32, _SADDR0>>[src]

pub fn saddr(&self) -> SADDR_R[src]

Bits 0:31 - Channel x Source Address

impl R<u32, Reg<u32, _DADDR0>>[src]

pub fn daddr(&self) -> DADDR_R[src]

Bits 0:31 - Channel x Destination Address

impl R<u32, Reg<u32, _DSCR0>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 2:31 - Buffer Transfer Descriptor Address

impl R<u8, SRC_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, DST_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, DST_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _CTRLA0>>[src]

pub fn btsize(&self) -> BTSIZE_R[src]

Bits 0:15 - Buffer Transfer Size

pub fn src_width(&self) -> SRC_WIDTH_R[src]

Bits 24:25 - Transfer Width for the Source

pub fn dst_width(&self) -> DST_WIDTH_R[src]

Bits 28:29 - Transfer Width for the Destination

pub fn done(&self) -> DONE_R[src]

Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator

impl R<bool, SRC_DSCR_A>[src]

pub fn variant(&self) -> SRC_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<bool, DST_DSCR_A>[src]

pub fn variant(&self) -> DST_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<u8, FC_A>[src]

pub fn variant(&self) -> FC_A[src]

Get enumerated values variant

pub fn is_mem2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2MEM_DMA_FC

pub fn is_mem2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2PER_DMA_FC

pub fn is_per2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2MEM_DMA_FC

pub fn is_per2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2PER_DMA_FC

impl R<u8, SRC_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u8, DST_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, DST_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u32, Reg<u32, _CTRLB0>>[src]

pub fn src_dscr(&self) -> SRC_DSCR_R[src]

Bit 16 - Source Address Descriptor

pub fn dst_dscr(&self) -> DST_DSCR_R[src]

Bit 20 - Destination Address Descriptor

pub fn fc(&self) -> FC_R[src]

Bits 21:22 - Flow Control

pub fn src_incr(&self) -> SRC_INCR_R[src]

Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source

pub fn dst_incr(&self) -> DST_INCR_R[src]

Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination

pub fn ien(&self) -> IEN_R[src]

Bit 30 - Interrupt Enable Not

impl R<bool, SRC_H2SEL_A>[src]

pub fn variant(&self) -> SRC_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, DST_H2SEL_A>[src]

pub fn variant(&self) -> DST_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, SOD_A>[src]

pub fn variant(&self) -> SOD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_IF_A>[src]

pub fn variant(&self) -> LOCK_IF_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_B_A>[src]

pub fn variant(&self) -> Variant<bool, LOCK_B_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, LOCK_IF_L_A>[src]

pub fn variant(&self) -> LOCK_IF_L_A[src]

Get enumerated values variant

pub fn is_chunk(&self) -> bool[src]

Checks if the value of the field is CHUNK

pub fn is_buffer(&self) -> bool[src]

Checks if the value of the field is BUFFER

impl R<u8, FIFOCFG_A>[src]

pub fn variant(&self) -> Variant<u8, FIFOCFG_A>[src]

Get enumerated values variant

pub fn is_alap_cfg(&self) -> bool[src]

Checks if the value of the field is ALAP_CFG

pub fn is_half_cfg(&self) -> bool[src]

Checks if the value of the field is HALF_CFG

pub fn is_asap_cfg(&self) -> bool[src]

Checks if the value of the field is ASAP_CFG

impl R<u32, Reg<u32, _CFG0>>[src]

pub fn src_per(&self) -> SRC_PER_R[src]

Bits 0:3 - Source with Peripheral identifier

pub fn dst_per(&self) -> DST_PER_R[src]

Bits 4:7 - Destination with Peripheral identifier

pub fn src_h2sel(&self) -> SRC_H2SEL_R[src]

Bit 9 - Software or Hardware Selection for the Source

pub fn dst_h2sel(&self) -> DST_H2SEL_R[src]

Bit 13 - Software or Hardware Selection for the Destination

pub fn sod(&self) -> SOD_R[src]

Bit 16 - Stop On Done

pub fn lock_if(&self) -> LOCK_IF_R[src]

Bit 20 - Interface Lock

pub fn lock_b(&self) -> LOCK_B_R[src]

Bit 21 - Bus Lock

pub fn lock_if_l(&self) -> LOCK_IF_L_R[src]

Bit 22 - Master Interface Arbiter Lock

pub fn ahb_prot(&self) -> AHB_PROT_R[src]

Bits 24:26 - AHB Protection

pub fn fifocfg(&self) -> FIFOCFG_R[src]

Bits 28:29 - FIFO Configuration

impl R<u32, Reg<u32, _SADDR1>>[src]

pub fn saddr(&self) -> SADDR_R[src]

Bits 0:31 - Channel x Source Address

impl R<u32, Reg<u32, _DADDR1>>[src]

pub fn daddr(&self) -> DADDR_R[src]

Bits 0:31 - Channel x Destination Address

impl R<u32, Reg<u32, _DSCR1>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 2:31 - Buffer Transfer Descriptor Address

impl R<u8, SRC_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, DST_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, DST_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _CTRLA1>>[src]

pub fn btsize(&self) -> BTSIZE_R[src]

Bits 0:15 - Buffer Transfer Size

pub fn src_width(&self) -> SRC_WIDTH_R[src]

Bits 24:25 - Transfer Width for the Source

pub fn dst_width(&self) -> DST_WIDTH_R[src]

Bits 28:29 - Transfer Width for the Destination

pub fn done(&self) -> DONE_R[src]

Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator

impl R<bool, SRC_DSCR_A>[src]

pub fn variant(&self) -> SRC_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<bool, DST_DSCR_A>[src]

pub fn variant(&self) -> DST_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<u8, FC_A>[src]

pub fn variant(&self) -> FC_A[src]

Get enumerated values variant

pub fn is_mem2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2MEM_DMA_FC

pub fn is_mem2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2PER_DMA_FC

pub fn is_per2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2MEM_DMA_FC

pub fn is_per2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2PER_DMA_FC

impl R<u8, SRC_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u8, DST_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, DST_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u32, Reg<u32, _CTRLB1>>[src]

pub fn src_dscr(&self) -> SRC_DSCR_R[src]

Bit 16 - Source Address Descriptor

pub fn dst_dscr(&self) -> DST_DSCR_R[src]

Bit 20 - Destination Address Descriptor

pub fn fc(&self) -> FC_R[src]

Bits 21:22 - Flow Control

pub fn src_incr(&self) -> SRC_INCR_R[src]

Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source

pub fn dst_incr(&self) -> DST_INCR_R[src]

Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination

pub fn ien(&self) -> IEN_R[src]

Bit 30 - Interrupt Enable Not

impl R<bool, SRC_H2SEL_A>[src]

pub fn variant(&self) -> SRC_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, DST_H2SEL_A>[src]

pub fn variant(&self) -> DST_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, SOD_A>[src]

pub fn variant(&self) -> SOD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_IF_A>[src]

pub fn variant(&self) -> LOCK_IF_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_B_A>[src]

pub fn variant(&self) -> Variant<bool, LOCK_B_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, LOCK_IF_L_A>[src]

pub fn variant(&self) -> LOCK_IF_L_A[src]

Get enumerated values variant

pub fn is_chunk(&self) -> bool[src]

Checks if the value of the field is CHUNK

pub fn is_buffer(&self) -> bool[src]

Checks if the value of the field is BUFFER

impl R<u8, FIFOCFG_A>[src]

pub fn variant(&self) -> Variant<u8, FIFOCFG_A>[src]

Get enumerated values variant

pub fn is_alap_cfg(&self) -> bool[src]

Checks if the value of the field is ALAP_CFG

pub fn is_half_cfg(&self) -> bool[src]

Checks if the value of the field is HALF_CFG

pub fn is_asap_cfg(&self) -> bool[src]

Checks if the value of the field is ASAP_CFG

impl R<u32, Reg<u32, _CFG1>>[src]

pub fn src_per(&self) -> SRC_PER_R[src]

Bits 0:3 - Source with Peripheral identifier

pub fn dst_per(&self) -> DST_PER_R[src]

Bits 4:7 - Destination with Peripheral identifier

pub fn src_h2sel(&self) -> SRC_H2SEL_R[src]

Bit 9 - Software or Hardware Selection for the Source

pub fn dst_h2sel(&self) -> DST_H2SEL_R[src]

Bit 13 - Software or Hardware Selection for the Destination

pub fn sod(&self) -> SOD_R[src]

Bit 16 - Stop On Done

pub fn lock_if(&self) -> LOCK_IF_R[src]

Bit 20 - Interface Lock

pub fn lock_b(&self) -> LOCK_B_R[src]

Bit 21 - Bus Lock

pub fn lock_if_l(&self) -> LOCK_IF_L_R[src]

Bit 22 - Master Interface Arbiter Lock

pub fn ahb_prot(&self) -> AHB_PROT_R[src]

Bits 24:26 - AHB Protection

pub fn fifocfg(&self) -> FIFOCFG_R[src]

Bits 28:29 - FIFO Configuration

impl R<u32, Reg<u32, _SADDR2>>[src]

pub fn saddr(&self) -> SADDR_R[src]

Bits 0:31 - Channel x Source Address

impl R<u32, Reg<u32, _DADDR2>>[src]

pub fn daddr(&self) -> DADDR_R[src]

Bits 0:31 - Channel x Destination Address

impl R<u32, Reg<u32, _DSCR2>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 2:31 - Buffer Transfer Descriptor Address

impl R<u8, SRC_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, DST_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, DST_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _CTRLA2>>[src]

pub fn btsize(&self) -> BTSIZE_R[src]

Bits 0:15 - Buffer Transfer Size

pub fn src_width(&self) -> SRC_WIDTH_R[src]

Bits 24:25 - Transfer Width for the Source

pub fn dst_width(&self) -> DST_WIDTH_R[src]

Bits 28:29 - Transfer Width for the Destination

pub fn done(&self) -> DONE_R[src]

Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator

impl R<bool, SRC_DSCR_A>[src]

pub fn variant(&self) -> SRC_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<bool, DST_DSCR_A>[src]

pub fn variant(&self) -> DST_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<u8, FC_A>[src]

pub fn variant(&self) -> FC_A[src]

Get enumerated values variant

pub fn is_mem2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2MEM_DMA_FC

pub fn is_mem2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2PER_DMA_FC

pub fn is_per2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2MEM_DMA_FC

pub fn is_per2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2PER_DMA_FC

impl R<u8, SRC_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u8, DST_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, DST_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u32, Reg<u32, _CTRLB2>>[src]

pub fn src_dscr(&self) -> SRC_DSCR_R[src]

Bit 16 - Source Address Descriptor

pub fn dst_dscr(&self) -> DST_DSCR_R[src]

Bit 20 - Destination Address Descriptor

pub fn fc(&self) -> FC_R[src]

Bits 21:22 - Flow Control

pub fn src_incr(&self) -> SRC_INCR_R[src]

Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source

pub fn dst_incr(&self) -> DST_INCR_R[src]

Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination

pub fn ien(&self) -> IEN_R[src]

Bit 30 - Interrupt Enable Not

impl R<bool, SRC_H2SEL_A>[src]

pub fn variant(&self) -> SRC_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, DST_H2SEL_A>[src]

pub fn variant(&self) -> DST_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, SOD_A>[src]

pub fn variant(&self) -> SOD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_IF_A>[src]

pub fn variant(&self) -> LOCK_IF_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_B_A>[src]

pub fn variant(&self) -> Variant<bool, LOCK_B_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, LOCK_IF_L_A>[src]

pub fn variant(&self) -> LOCK_IF_L_A[src]

Get enumerated values variant

pub fn is_chunk(&self) -> bool[src]

Checks if the value of the field is CHUNK

pub fn is_buffer(&self) -> bool[src]

Checks if the value of the field is BUFFER

impl R<u8, FIFOCFG_A>[src]

pub fn variant(&self) -> Variant<u8, FIFOCFG_A>[src]

Get enumerated values variant

pub fn is_alap_cfg(&self) -> bool[src]

Checks if the value of the field is ALAP_CFG

pub fn is_half_cfg(&self) -> bool[src]

Checks if the value of the field is HALF_CFG

pub fn is_asap_cfg(&self) -> bool[src]

Checks if the value of the field is ASAP_CFG

impl R<u32, Reg<u32, _CFG2>>[src]

pub fn src_per(&self) -> SRC_PER_R[src]

Bits 0:3 - Source with Peripheral identifier

pub fn dst_per(&self) -> DST_PER_R[src]

Bits 4:7 - Destination with Peripheral identifier

pub fn src_h2sel(&self) -> SRC_H2SEL_R[src]

Bit 9 - Software or Hardware Selection for the Source

pub fn dst_h2sel(&self) -> DST_H2SEL_R[src]

Bit 13 - Software or Hardware Selection for the Destination

pub fn sod(&self) -> SOD_R[src]

Bit 16 - Stop On Done

pub fn lock_if(&self) -> LOCK_IF_R[src]

Bit 20 - Interface Lock

pub fn lock_b(&self) -> LOCK_B_R[src]

Bit 21 - Bus Lock

pub fn lock_if_l(&self) -> LOCK_IF_L_R[src]

Bit 22 - Master Interface Arbiter Lock

pub fn ahb_prot(&self) -> AHB_PROT_R[src]

Bits 24:26 - AHB Protection

pub fn fifocfg(&self) -> FIFOCFG_R[src]

Bits 28:29 - FIFO Configuration

impl R<u32, Reg<u32, _SADDR3>>[src]

pub fn saddr(&self) -> SADDR_R[src]

Bits 0:31 - Channel x Source Address

impl R<u32, Reg<u32, _DADDR3>>[src]

pub fn daddr(&self) -> DADDR_R[src]

Bits 0:31 - Channel x Destination Address

impl R<u32, Reg<u32, _DSCR3>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 2:31 - Buffer Transfer Descriptor Address

impl R<u8, SRC_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u8, DST_WIDTH_A>[src]

pub fn variant(&self) -> Variant<u8, DST_WIDTH_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _CTRLA3>>[src]

pub fn btsize(&self) -> BTSIZE_R[src]

Bits 0:15 - Buffer Transfer Size

pub fn src_width(&self) -> SRC_WIDTH_R[src]

Bits 24:25 - Transfer Width for the Source

pub fn dst_width(&self) -> DST_WIDTH_R[src]

Bits 28:29 - Transfer Width for the Destination

pub fn done(&self) -> DONE_R[src]

Bit 31 - Current Descriptor Stop Command and Transfer Completed Memory Indicator

impl R<bool, SRC_DSCR_A>[src]

pub fn variant(&self) -> SRC_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<bool, DST_DSCR_A>[src]

pub fn variant(&self) -> DST_DSCR_A[src]

Get enumerated values variant

pub fn is_fetch_from_mem(&self) -> bool[src]

Checks if the value of the field is FETCH_FROM_MEM

pub fn is_fetch_disable(&self) -> bool[src]

Checks if the value of the field is FETCH_DISABLE

impl R<u8, FC_A>[src]

pub fn variant(&self) -> FC_A[src]

Get enumerated values variant

pub fn is_mem2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2MEM_DMA_FC

pub fn is_mem2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is MEM2PER_DMA_FC

pub fn is_per2mem_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2MEM_DMA_FC

pub fn is_per2per_dma_fc(&self) -> bool[src]

Checks if the value of the field is PER2PER_DMA_FC

impl R<u8, SRC_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, SRC_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u8, DST_INCR_A>[src]

pub fn variant(&self) -> Variant<u8, DST_INCR_A>[src]

Get enumerated values variant

pub fn is_incrementing(&self) -> bool[src]

Checks if the value of the field is INCREMENTING

pub fn is_decrementing(&self) -> bool[src]

Checks if the value of the field is DECREMENTING

pub fn is_fixed(&self) -> bool[src]

Checks if the value of the field is FIXED

impl R<u32, Reg<u32, _CTRLB3>>[src]

pub fn src_dscr(&self) -> SRC_DSCR_R[src]

Bit 16 - Source Address Descriptor

pub fn dst_dscr(&self) -> DST_DSCR_R[src]

Bit 20 - Destination Address Descriptor

pub fn fc(&self) -> FC_R[src]

Bits 21:22 - Flow Control

pub fn src_incr(&self) -> SRC_INCR_R[src]

Bits 24:25 - Incrementing, Decrementing or Fixed Address for the Source

pub fn dst_incr(&self) -> DST_INCR_R[src]

Bits 28:29 - Incrementing, Decrementing or Fixed Address for the Destination

pub fn ien(&self) -> IEN_R[src]

Bit 30 - Interrupt Enable Not

impl R<bool, SRC_H2SEL_A>[src]

pub fn variant(&self) -> SRC_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, DST_H2SEL_A>[src]

pub fn variant(&self) -> DST_H2SEL_A[src]

Get enumerated values variant

pub fn is_sw(&self) -> bool[src]

Checks if the value of the field is SW

pub fn is_hw(&self) -> bool[src]

Checks if the value of the field is HW

impl R<bool, SOD_A>[src]

pub fn variant(&self) -> SOD_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_IF_A>[src]

pub fn variant(&self) -> LOCK_IF_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LOCK_B_A>[src]

pub fn variant(&self) -> Variant<bool, LOCK_B_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, LOCK_IF_L_A>[src]

pub fn variant(&self) -> LOCK_IF_L_A[src]

Get enumerated values variant

pub fn is_chunk(&self) -> bool[src]

Checks if the value of the field is CHUNK

pub fn is_buffer(&self) -> bool[src]

Checks if the value of the field is BUFFER

impl R<u8, FIFOCFG_A>[src]

pub fn variant(&self) -> Variant<u8, FIFOCFG_A>[src]

Get enumerated values variant

pub fn is_alap_cfg(&self) -> bool[src]

Checks if the value of the field is ALAP_CFG

pub fn is_half_cfg(&self) -> bool[src]

Checks if the value of the field is HALF_CFG

pub fn is_asap_cfg(&self) -> bool[src]

Checks if the value of the field is ASAP_CFG

impl R<u32, Reg<u32, _CFG3>>[src]

pub fn src_per(&self) -> SRC_PER_R[src]

Bits 0:3 - Source with Peripheral identifier

pub fn dst_per(&self) -> DST_PER_R[src]

Bits 4:7 - Destination with Peripheral identifier

pub fn src_h2sel(&self) -> SRC_H2SEL_R[src]

Bit 9 - Software or Hardware Selection for the Source

pub fn dst_h2sel(&self) -> DST_H2SEL_R[src]

Bit 13 - Software or Hardware Selection for the Destination

pub fn sod(&self) -> SOD_R[src]

Bit 16 - Stop On Done

pub fn lock_if(&self) -> LOCK_IF_R[src]

Bit 20 - Interface Lock

pub fn lock_b(&self) -> LOCK_B_R[src]

Bit 21 - Bus Lock

pub fn lock_if_l(&self) -> LOCK_IF_L_R[src]

Bit 22 - Master Interface Arbiter Lock

pub fn ahb_prot(&self) -> AHB_PROT_R[src]

Bits 24:26 - AHB Protection

pub fn fifocfg(&self) -> FIFOCFG_R[src]

Bits 28:29 - FIFO Configuration

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect KEY

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protect Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u8, WAYNUM_A>[src]

pub fn variant(&self) -> WAYNUM_A[src]

Get enumerated values variant

pub fn is_dmapped(&self) -> bool[src]

Checks if the value of the field is DMAPPED

pub fn is_arch2way(&self) -> bool[src]

Checks if the value of the field is ARCH2WAY

pub fn is_arch4way(&self) -> bool[src]

Checks if the value of the field is ARCH4WAY

pub fn is_arch8way(&self) -> bool[src]

Checks if the value of the field is ARCH8WAY

impl R<u8, CSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CSIZE_A>[src]

Get enumerated values variant

pub fn is_csize_1kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_1KB

pub fn is_csize_2kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_2KB

pub fn is_csize_4kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_4KB

pub fn is_csize_8kb(&self) -> bool[src]

Checks if the value of the field is CSIZE_8KB

impl R<u8, CLSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, CLSIZE_A>[src]

Get enumerated values variant

pub fn is_clsize_1kb(&self) -> bool[src]

Checks if the value of the field is CLSIZE_1KB

pub fn is_clsize_2kb(&self) -> bool[src]

Checks if the value of the field is CLSIZE_2KB

pub fn is_clsize_4kb(&self) -> bool[src]

Checks if the value of the field is CLSIZE_4KB

pub fn is_clsize_8kb(&self) -> bool[src]

Checks if the value of the field is CLSIZE_8KB

impl R<u32, Reg<u32, _TYPE>>[src]

pub fn ap(&self) -> AP_R[src]

Bit 0 - Access Port Access Allowed

pub fn gclk(&self) -> GCLK_R[src]

Bit 1 - Dynamic Clock Gating Supported

pub fn randp(&self) -> RANDP_R[src]

Bit 2 - Random Selection Policy Supported

pub fn lrup(&self) -> LRUP_R[src]

Bit 3 - Least Recently Used Policy Supported

pub fn rrp(&self) -> RRP_R[src]

Bit 4 - Random Selection Policy Supported

pub fn waynum(&self) -> WAYNUM_R[src]

Bits 5:6 - Number of Way

pub fn lckdown(&self) -> LCKDOWN_R[src]

Bit 7 - Lock Down Supported

pub fn csize(&self) -> CSIZE_R[src]

Bits 8:10 - Cache Size

pub fn clsize(&self) -> CLSIZE_R[src]

Bits 11:13 - Cache Size

impl R<u32, Reg<u32, _CFG>>[src]

pub fn gclkdis(&self) -> GCLKDIS_R[src]

Bit 0 - Disable Clock Gating

impl R<u32, Reg<u32, _SR>>[src]

pub fn csts(&self) -> CSTS_R[src]

Bit 0 - Cache Controller Status

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_cycle_count(&self) -> bool[src]

Checks if the value of the field is CYCLE_COUNT

pub fn is_ihit_count(&self) -> bool[src]

Checks if the value of the field is IHIT_COUNT

pub fn is_dhit_count(&self) -> bool[src]

Checks if the value of the field is DHIT_COUNT

impl R<u32, Reg<u32, _MCFG>>[src]

pub fn mode(&self) -> MODE_R[src]

Bits 0:1 - Cache Controller Monitor Counter Mode

impl R<u32, Reg<u32, _MEN>>[src]

pub fn menable(&self) -> MENABLE_R[src]

Bit 0 - Cache Controller Monitor Enable

impl R<u32, Reg<u32, _MSR>>[src]

pub fn event_cnt(&self) -> EVENT_CNT_R[src]

Bits 0:31 - Monitor Event Counter

impl R<u32, Reg<u32, _MATRIX_MCFG>>[src]

pub fn ulbt(&self) -> ULBT_R[src]

Bits 0:2 - Undefined Length Burst Type

impl R<u32, Reg<u32, _MATRIX_SCFG>>[src]

pub fn slot_cycle(&self) -> SLOT_CYCLE_R[src]

Bits 0:8 - Maximum Bus Grant Duration for Masters

pub fn defmstr_type(&self) -> DEFMSTR_TYPE_R[src]

Bits 16:17 - Default Master Type

pub fn fixed_defmstr(&self) -> FIXED_DEFMSTR_R[src]

Bits 18:21 - Fixed Default Master

impl R<u32, Reg<u32, _MATRIX_PRAS0>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS1>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS2>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS3>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS4>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_PRAS5>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:1 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:5 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:9 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:13 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:17 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:21 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:25 - Master 6 Priority

impl R<u32, Reg<u32, _MATRIX_MRCR>>[src]

pub fn rcb0(&self) -> RCB0_R[src]

Bit 0 - Remap Command Bit for Master 0

pub fn rcb1(&self) -> RCB1_R[src]

Bit 1 - Remap Command Bit for Master 1

pub fn rcb2(&self) -> RCB2_R[src]

Bit 2 - Remap Command Bit for Master 2

pub fn rcb3(&self) -> RCB3_R[src]

Bit 3 - Remap Command Bit for Master 3

pub fn rcb4(&self) -> RCB4_R[src]

Bit 4 - Remap Command Bit for Master 4

pub fn rcb5(&self) -> RCB5_R[src]

Bit 5 - Remap Command Bit for Master 5

pub fn rcb6(&self) -> RCB6_R[src]

Bit 6 - Remap Command Bit for Master 6

impl R<u32, Reg<u32, _CCFG_SYSIO>>[src]

pub fn sysio4(&self) -> SYSIO4_R[src]

Bit 4 - PB4 or TDI Assignment

pub fn sysio5(&self) -> SYSIO5_R[src]

Bit 5 - PB5 or TDO/TRACESWO Assignment

pub fn sysio6(&self) -> SYSIO6_R[src]

Bit 6 - PB6 or TMS/SWDIO Assignment

pub fn sysio7(&self) -> SYSIO7_R[src]

Bit 7 - PB7 or TCK/SWCLK Assignment

pub fn sysio10(&self) -> SYSIO10_R[src]

Bit 10 - PB10 or DDM Assignment

pub fn sysio11(&self) -> SYSIO11_R[src]

Bit 11 - PB11 or DDP Assignment

pub fn sysio12(&self) -> SYSIO12_R[src]

Bit 12 - PB12 or ERASE Assignment

impl R<u32, Reg<u32, _CCFG_SMCNFCS>>[src]

pub fn smc_nfcs0(&self) -> SMC_NFCS0_R[src]

Bit 0 - SMC NAND Flash Chip Select 0 Assignment

pub fn smc_nfcs1(&self) -> SMC_NFCS1_R[src]

Bit 1 - SMC NAND Flash Chip Select 1 Assignment

pub fn smc_nfcs2(&self) -> SMC_NFCS2_R[src]

Bit 2 - SMC NAND Flash Chip Select 2 Assignment

pub fn smc_nfcs3(&self) -> SMC_NFCS3_R[src]

Bit 3 - SMC NAND Flash Chip Select 3 Assignment

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MATRIX_WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect KEY (Write-only)

impl R<u32, Reg<u32, _MATRIX_WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protect Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u32, Reg<u32, _PMC_SCSR>>[src]

pub fn udp(&self) -> UDP_R[src]

Bit 7 - USB Device Port Clock Status

pub fn pck0(&self) -> PCK0_R[src]

Bit 8 - Programmable Clock 0 Output Status

pub fn pck1(&self) -> PCK1_R[src]

Bit 9 - Programmable Clock 1 Output Status

pub fn pck2(&self) -> PCK2_R[src]

Bit 10 - Programmable Clock 2 Output Status

impl R<u32, Reg<u32, _PMC_PCSR0>>[src]

pub fn pid7(&self) -> PID7_R[src]

Bit 7 - Peripheral Clock 7 Status

pub fn pid8(&self) -> PID8_R[src]

Bit 8 - Peripheral Clock 8 Status

pub fn pid9(&self) -> PID9_R[src]

Bit 9 - Peripheral Clock 9 Status

pub fn pid10(&self) -> PID10_R[src]

Bit 10 - Peripheral Clock 10 Status

pub fn pid11(&self) -> PID11_R[src]

Bit 11 - Peripheral Clock 11 Status

pub fn pid12(&self) -> PID12_R[src]

Bit 12 - Peripheral Clock 12 Status

pub fn pid13(&self) -> PID13_R[src]

Bit 13 - Peripheral Clock 13 Status

pub fn pid14(&self) -> PID14_R[src]

Bit 14 - Peripheral Clock 14 Status

pub fn pid15(&self) -> PID15_R[src]

Bit 15 - Peripheral Clock 15 Status

pub fn pid16(&self) -> PID16_R[src]

Bit 16 - Peripheral Clock 16 Status

pub fn pid17(&self) -> PID17_R[src]

Bit 17 - Peripheral Clock 17 Status

pub fn pid18(&self) -> PID18_R[src]

Bit 18 - Peripheral Clock 18 Status

pub fn pid19(&self) -> PID19_R[src]

Bit 19 - Peripheral Clock 19 Status

pub fn pid20(&self) -> PID20_R[src]

Bit 20 - Peripheral Clock 20 Status

pub fn pid21(&self) -> PID21_R[src]

Bit 21 - Peripheral Clock 21 Status

pub fn pid22(&self) -> PID22_R[src]

Bit 22 - Peripheral Clock 22 Status

pub fn pid23(&self) -> PID23_R[src]

Bit 23 - Peripheral Clock 23 Status

pub fn pid24(&self) -> PID24_R[src]

Bit 24 - Peripheral Clock 24 Status

pub fn pid25(&self) -> PID25_R[src]

Bit 25 - Peripheral Clock 25 Status

pub fn pid26(&self) -> PID26_R[src]

Bit 26 - Peripheral Clock 26 Status

pub fn pid27(&self) -> PID27_R[src]

Bit 27 - Peripheral Clock 27 Status

pub fn pid28(&self) -> PID28_R[src]

Bit 28 - Peripheral Clock 28 Status

pub fn pid29(&self) -> PID29_R[src]

Bit 29 - Peripheral Clock 29 Status

pub fn pid30(&self) -> PID30_R[src]

Bit 30 - Peripheral Clock 30 Status

pub fn pid31(&self) -> PID31_R[src]

Bit 31 - Peripheral Clock 31 Status

impl R<u8, MOSCRCF_A>[src]

pub fn variant(&self) -> Variant<u8, MOSCRCF_A>[src]

Get enumerated values variant

pub fn is_4_mhz(&self) -> bool[src]

Checks if the value of the field is _4_MHZ

pub fn is_8_mhz(&self) -> bool[src]

Checks if the value of the field is _8_MHZ

pub fn is_12_mhz(&self) -> bool[src]

Checks if the value of the field is _12_MHZ

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _CKGR_MOR>>[src]

pub fn moscxten(&self) -> MOSCXTEN_R[src]

Bit 0 - Main Crystal Oscillator Enable

pub fn moscxtby(&self) -> MOSCXTBY_R[src]

Bit 1 - Main Crystal Oscillator Bypass

pub fn waitmode(&self) -> WAITMODE_R[src]

Bit 2 - Wait Mode Command

pub fn moscrcen(&self) -> MOSCRCEN_R[src]

Bit 3 - Main On-Chip RC Oscillator Enable

pub fn moscrcf(&self) -> MOSCRCF_R[src]

Bits 4:6 - Main On-Chip RC Oscillator Frequency Selection

pub fn moscxtst(&self) -> MOSCXTST_R[src]

Bits 8:15 - Main Crystal Oscillator Start-up Time

pub fn key(&self) -> KEY_R[src]

Bits 16:23 - Write Access Password

pub fn moscsel(&self) -> MOSCSEL_R[src]

Bit 24 - Main Oscillator Selection

pub fn cfden(&self) -> CFDEN_R[src]

Bit 25 - Clock Failure Detector Enable

impl R<u32, Reg<u32, _CKGR_MCFR>>[src]

pub fn mainf(&self) -> MAINF_R[src]

Bits 0:15 - Main Clock Frequency

pub fn mainfrdy(&self) -> MAINFRDY_R[src]

Bit 16 - Main Clock Ready

pub fn rcmeas(&self) -> RCMEAS_R[src]

Bit 20 - RC Oscillator Frequency Measure (write-only)

impl R<u32, Reg<u32, _CKGR_PLLAR>>[src]

pub fn diva(&self) -> DIVA_R[src]

Bits 0:7 - PLLA Front_End Divider

pub fn pllacount(&self) -> PLLACOUNT_R[src]

Bits 8:13 - PLLA Counter

pub fn mula(&self) -> MULA_R[src]

Bits 16:26 - PLLA Multiplier

pub fn one(&self) -> ONE_R[src]

Bit 29 - Must Be Set to 1

impl R<u8, CSS_A>[src]

pub fn variant(&self) -> Variant<u8, CSS_A>[src]

Get enumerated values variant

pub fn is_slow_clk(&self) -> bool[src]

Checks if the value of the field is SLOW_CLK

pub fn is_main_clk(&self) -> bool[src]

Checks if the value of the field is MAIN_CLK

pub fn is_plla_clk(&self) -> bool[src]

Checks if the value of the field is PLLA_CLK

impl R<u8, PRES_A>[src]

pub fn variant(&self) -> PRES_A[src]

Get enumerated values variant

pub fn is_clk_1(&self) -> bool[src]

Checks if the value of the field is CLK_1

pub fn is_clk_2(&self) -> bool[src]

Checks if the value of the field is CLK_2

pub fn is_clk_4(&self) -> bool[src]

Checks if the value of the field is CLK_4

pub fn is_clk_8(&self) -> bool[src]

Checks if the value of the field is CLK_8

pub fn is_clk_16(&self) -> bool[src]

Checks if the value of the field is CLK_16

pub fn is_clk_32(&self) -> bool[src]

Checks if the value of the field is CLK_32

pub fn is_clk_64(&self) -> bool[src]

Checks if the value of the field is CLK_64

pub fn is_clk_3(&self) -> bool[src]

Checks if the value of the field is CLK_3

impl R<u32, Reg<u32, _PMC_MCKR>>[src]

pub fn css(&self) -> CSS_R[src]

Bits 0:1 - Master Clock Source Selection

pub fn pres(&self) -> PRES_R[src]

Bits 4:6 - Processor Clock Prescaler

pub fn plladiv2(&self) -> PLLADIV2_R[src]

Bit 12 - PLLA Divisor by 2

impl R<u32, Reg<u32, _PMC_USB>>[src]

pub fn usbdiv(&self) -> USBDIV_R[src]

Bits 8:11 - Divider for USB Clock

impl R<u8, CSS_A>[src]

pub fn variant(&self) -> Variant<u8, CSS_A>[src]

Get enumerated values variant

pub fn is_slow_clk(&self) -> bool[src]

Checks if the value of the field is SLOW_CLK

pub fn is_main_clk(&self) -> bool[src]

Checks if the value of the field is MAIN_CLK

pub fn is_plla_clk(&self) -> bool[src]

Checks if the value of the field is PLLA_CLK

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

impl R<u8, PRES_A>[src]

pub fn variant(&self) -> Variant<u8, PRES_A>[src]

Get enumerated values variant

pub fn is_clk_1(&self) -> bool[src]

Checks if the value of the field is CLK_1

pub fn is_clk_2(&self) -> bool[src]

Checks if the value of the field is CLK_2

pub fn is_clk_4(&self) -> bool[src]

Checks if the value of the field is CLK_4

pub fn is_clk_8(&self) -> bool[src]

Checks if the value of the field is CLK_8

pub fn is_clk_16(&self) -> bool[src]

Checks if the value of the field is CLK_16

pub fn is_clk_32(&self) -> bool[src]

Checks if the value of the field is CLK_32

pub fn is_clk_64(&self) -> bool[src]

Checks if the value of the field is CLK_64

impl R<u32, Reg<u32, _PMC_PCK>>[src]

pub fn css(&self) -> CSS_R[src]

Bits 0:2 - Master Clock Source Selection

pub fn pres(&self) -> PRES_R[src]

Bits 4:6 - Programmable Clock Prescaler

impl R<u32, Reg<u32, _PMC_SR>>[src]

pub fn moscxts(&self) -> MOSCXTS_R[src]

Bit 0 - Main XTAL Oscillator Status

pub fn locka(&self) -> LOCKA_R[src]

Bit 1 - PLLA Lock Status

pub fn mckrdy(&self) -> MCKRDY_R[src]

Bit 3 - Master Clock Status

pub fn oscsels(&self) -> OSCSELS_R[src]

Bit 7 - Slow Clock Oscillator Selection

pub fn pckrdy0(&self) -> PCKRDY0_R[src]

Bit 8 - Programmable Clock Ready Status

pub fn pckrdy1(&self) -> PCKRDY1_R[src]

Bit 9 - Programmable Clock Ready Status

pub fn pckrdy2(&self) -> PCKRDY2_R[src]

Bit 10 - Programmable Clock Ready Status

pub fn moscsels(&self) -> MOSCSELS_R[src]

Bit 16 - Main Oscillator Selection Status

pub fn moscrcs(&self) -> MOSCRCS_R[src]

Bit 17 - Main On-Chip RC Oscillator Status

pub fn cfdev(&self) -> CFDEV_R[src]

Bit 18 - Clock Failure Detector Event

pub fn cfds(&self) -> CFDS_R[src]

Bit 19 - Clock Failure Detector Status

pub fn fos(&self) -> FOS_R[src]

Bit 20 - Clock Failure Detector Fault Output Status

impl R<u32, Reg<u32, _PMC_IMR>>[src]

pub fn moscxts(&self) -> MOSCXTS_R[src]

Bit 0 - Main Crystal Oscillator Status Interrupt Mask

pub fn locka(&self) -> LOCKA_R[src]

Bit 1 - PLLA Lock Interrupt Mask

pub fn mckrdy(&self) -> MCKRDY_R[src]

Bit 3 - Master Clock Ready Interrupt Mask

pub fn pckrdy0(&self) -> PCKRDY0_R[src]

Bit 8 - Programmable Clock Ready 0 Interrupt Mask

pub fn pckrdy1(&self) -> PCKRDY1_R[src]

Bit 9 - Programmable Clock Ready 1 Interrupt Mask

pub fn pckrdy2(&self) -> PCKRDY2_R[src]

Bit 10 - Programmable Clock Ready 2 Interrupt Mask

pub fn moscsels(&self) -> MOSCSELS_R[src]

Bit 16 - Main Oscillator Selection Status Interrupt Mask

pub fn moscrcs(&self) -> MOSCRCS_R[src]

Bit 17 - Main On-Chip RC Status Interrupt Mask

pub fn cfdev(&self) -> CFDEV_R[src]

Bit 18 - Clock Failure Detector Event Interrupt Mask

impl R<u8, FLPM_A>[src]

pub fn variant(&self) -> Variant<u8, FLPM_A>[src]

Get enumerated values variant

pub fn is_flash_standby(&self) -> bool[src]

Checks if the value of the field is FLASH_STANDBY

pub fn is_flash_deep_powerdown(&self) -> bool[src]

Checks if the value of the field is FLASH_DEEP_POWERDOWN

pub fn is_flash_idle(&self) -> bool[src]

Checks if the value of the field is FLASH_IDLE

impl R<u32, Reg<u32, _PMC_FSMR>>[src]

pub fn fstt0(&self) -> FSTT0_R[src]

Bit 0 - Fast Startup Input Enable 0

pub fn fstt1(&self) -> FSTT1_R[src]

Bit 1 - Fast Startup Input Enable 1

pub fn fstt2(&self) -> FSTT2_R[src]

Bit 2 - Fast Startup Input Enable 2

pub fn fstt3(&self) -> FSTT3_R[src]

Bit 3 - Fast Startup Input Enable 3

pub fn fstt4(&self) -> FSTT4_R[src]

Bit 4 - Fast Startup Input Enable 4

pub fn fstt5(&self) -> FSTT5_R[src]

Bit 5 - Fast Startup Input Enable 5

pub fn fstt6(&self) -> FSTT6_R[src]

Bit 6 - Fast Startup Input Enable 6

pub fn fstt7(&self) -> FSTT7_R[src]

Bit 7 - Fast Startup Input Enable 7

pub fn fstt8(&self) -> FSTT8_R[src]

Bit 8 - Fast Startup Input Enable 8

pub fn fstt9(&self) -> FSTT9_R[src]

Bit 9 - Fast Startup Input Enable 9

pub fn fstt10(&self) -> FSTT10_R[src]

Bit 10 - Fast Startup Input Enable 10

pub fn fstt11(&self) -> FSTT11_R[src]

Bit 11 - Fast Startup Input Enable 11

pub fn fstt12(&self) -> FSTT12_R[src]

Bit 12 - Fast Startup Input Enable 12

pub fn fstt13(&self) -> FSTT13_R[src]

Bit 13 - Fast Startup Input Enable 13

pub fn fstt14(&self) -> FSTT14_R[src]

Bit 14 - Fast Startup Input Enable 14

pub fn fstt15(&self) -> FSTT15_R[src]

Bit 15 - Fast Startup Input Enable 15

pub fn rttal(&self) -> RTTAL_R[src]

Bit 16 - RTT Alarm Enable

pub fn rtcal(&self) -> RTCAL_R[src]

Bit 17 - RTC Alarm Enable

pub fn usbal(&self) -> USBAL_R[src]

Bit 18 - USB Alarm Enable

pub fn lpm(&self) -> LPM_R[src]

Bit 20 - Low-power Mode

pub fn flpm(&self) -> FLPM_R[src]

Bits 21:22 - Flash Low-power Mode

impl R<u32, Reg<u32, _PMC_FSPR>>[src]

pub fn fstp0(&self) -> FSTP0_R[src]

Bit 0 - Fast Startup Input Polarityx

pub fn fstp1(&self) -> FSTP1_R[src]

Bit 1 - Fast Startup Input Polarityx

pub fn fstp2(&self) -> FSTP2_R[src]

Bit 2 - Fast Startup Input Polarityx

pub fn fstp3(&self) -> FSTP3_R[src]

Bit 3 - Fast Startup Input Polarityx

pub fn fstp4(&self) -> FSTP4_R[src]

Bit 4 - Fast Startup Input Polarityx

pub fn fstp5(&self) -> FSTP5_R[src]

Bit 5 - Fast Startup Input Polarityx

pub fn fstp6(&self) -> FSTP6_R[src]

Bit 6 - Fast Startup Input Polarityx

pub fn fstp7(&self) -> FSTP7_R[src]

Bit 7 - Fast Startup Input Polarityx

pub fn fstp8(&self) -> FSTP8_R[src]

Bit 8 - Fast Startup Input Polarityx

pub fn fstp9(&self) -> FSTP9_R[src]

Bit 9 - Fast Startup Input Polarityx

pub fn fstp10(&self) -> FSTP10_R[src]

Bit 10 - Fast Startup Input Polarityx

pub fn fstp11(&self) -> FSTP11_R[src]

Bit 11 - Fast Startup Input Polarityx

pub fn fstp12(&self) -> FSTP12_R[src]

Bit 12 - Fast Startup Input Polarityx

pub fn fstp13(&self) -> FSTP13_R[src]

Bit 13 - Fast Startup Input Polarityx

pub fn fstp14(&self) -> FSTP14_R[src]

Bit 14 - Fast Startup Input Polarityx

pub fn fstp15(&self) -> FSTP15_R[src]

Bit 15 - Fast Startup Input Polarityx

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _PMC_WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _PMC_WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _PMC_PCSR1>>[src]

pub fn pid32(&self) -> PID32_R[src]

Bit 0 - Peripheral Clock 32 Status

pub fn pid33(&self) -> PID33_R[src]

Bit 1 - Peripheral Clock 33 Status

pub fn pid34(&self) -> PID34_R[src]

Bit 2 - Peripheral Clock 34 Status

pub fn pid35(&self) -> PID35_R[src]

Bit 3 - Peripheral Clock 35 Status

pub fn pid36(&self) -> PID36_R[src]

Bit 4 - Peripheral Clock 36 Status

pub fn pid37(&self) -> PID37_R[src]

Bit 5 - Peripheral Clock 37 Status

pub fn pid38(&self) -> PID38_R[src]

Bit 6 - Peripheral Clock 38 Status

pub fn pid39(&self) -> PID39_R[src]

Bit 7 - Peripheral Clock 39 Status

pub fn pid40(&self) -> PID40_R[src]

Bit 8 - Peripheral Clock 40 Status

pub fn pid41(&self) -> PID41_R[src]

Bit 9 - Peripheral Clock 41 Status

pub fn pid42(&self) -> PID42_R[src]

Bit 10 - Peripheral Clock 42 Status

pub fn pid43(&self) -> PID43_R[src]

Bit 11 - Peripheral Clock 43 Status

pub fn pid44(&self) -> PID44_R[src]

Bit 12 - Peripheral Clock 44 Status

pub fn pid45(&self) -> PID45_R[src]

Bit 13 - Peripheral Clock 45 Status

pub fn pid46(&self) -> PID46_R[src]

Bit 14 - Peripheral Clock 46 Status

pub fn pid47(&self) -> PID47_R[src]

Bit 15 - Peripheral Clock 47 Status

impl R<u32, Reg<u32, _PMC_OCR>>[src]

pub fn cal4(&self) -> CAL4_R[src]

Bits 0:6 - RC Oscillator Calibration bits for 4 MHz

pub fn sel4(&self) -> SEL4_R[src]

Bit 7 - Selection of RC Oscillator Calibration bits for 4 MHz

pub fn cal8(&self) -> CAL8_R[src]

Bits 8:14 - RC Oscillator Calibration bits for 8 MHz

pub fn sel8(&self) -> SEL8_R[src]

Bit 15 - Selection of RC Oscillator Calibration bits for 8 MHz

pub fn cal12(&self) -> CAL12_R[src]

Bits 16:22 - RC Oscillator Calibration bits for 12 MHz

pub fn sel12(&self) -> SEL12_R[src]

Bit 23 - Selection of RC Oscillator Calibration bits for 12 MHz

impl R<u32, Reg<u32, _PMC_PMMR>>[src]

pub fn plla_mmax(&self) -> PLLA_MMAX_R[src]

Bits 0:10 - PLLA Maximum Allowed Multiplier Value

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> Variant<u8, PAR_A>[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

pub fn is_local_loopback(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOPBACK

pub fn is_remote_loopback(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOPBACK

impl R<u32, Reg<u32, _MR>>[src]

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Mask RXRDY Interrupt

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Disable TXRDY Interrupt

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - Mask End of Receive Transfer Interrupt

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - Mask End of Transmit Interrupt

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Mask Overrun Error Interrupt

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Mask Framing Error Interrupt

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Mask Parity Error Interrupt

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Mask TXEMPTY Interrupt

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Mask TXBUFE Interrupt

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Mask RXBUFF Interrupt

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn endrx(&self) -> ENDRX_R[src]

Bit 3 - End of Receiver Transfer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 4 - End of Transmitter Transfer

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Receive Buffer Full

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:7 - Received Character

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divisor

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _TPR>>[src]

pub fn txptr(&self) -> TXPTR_R[src]

Bits 0:31 - Transmit Counter Register

impl R<u32, Reg<u32, _TCR>>[src]

pub fn txctr(&self) -> TXCTR_R[src]

Bits 0:15 - Transmit Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _TNPR>>[src]

pub fn txnptr(&self) -> TXNPTR_R[src]

Bits 0:31 - Transmit Next Pointer

impl R<u32, Reg<u32, _TNCR>>[src]

pub fn txnctr(&self) -> TXNCTR_R[src]

Bits 0:15 - Transmit Counter Next

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u8, EPROC_A>[src]

pub fn variant(&self) -> Variant<u8, EPROC_A>[src]

Get enumerated values variant

pub fn is_arm946es(&self) -> bool[src]

Checks if the value of the field is ARM946ES

pub fn is_arm7tdmi(&self) -> bool[src]

Checks if the value of the field is ARM7TDMI

pub fn is_cm3(&self) -> bool[src]

Checks if the value of the field is CM3

pub fn is_arm920t(&self) -> bool[src]

Checks if the value of the field is ARM920T

pub fn is_arm926ejs(&self) -> bool[src]

Checks if the value of the field is ARM926EJS

pub fn is_ca5(&self) -> bool[src]

Checks if the value of the field is CA5

pub fn is_cm4(&self) -> bool[src]

Checks if the value of the field is CM4

impl R<u8, NVPSIZ_A>[src]

pub fn variant(&self) -> Variant<u8, NVPSIZ_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

pub fn is_1024k(&self) -> bool[src]

Checks if the value of the field is _1024K

pub fn is_2048k(&self) -> bool[src]

Checks if the value of the field is _2048K

impl R<u8, NVPSIZ2_A>[src]

pub fn variant(&self) -> Variant<u8, NVPSIZ2_A>[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

pub fn is_1024k(&self) -> bool[src]

Checks if the value of the field is _1024K

pub fn is_2048k(&self) -> bool[src]

Checks if the value of the field is _2048K

impl R<u8, SRAMSIZ_A>[src]

pub fn variant(&self) -> SRAMSIZ_A[src]

Get enumerated values variant

pub fn is_48k(&self) -> bool[src]

Checks if the value of the field is _48K

pub fn is_192k(&self) -> bool[src]

Checks if the value of the field is _192K

pub fn is_2k(&self) -> bool[src]

Checks if the value of the field is _2K

pub fn is_6k(&self) -> bool[src]

Checks if the value of the field is _6K

pub fn is_24k(&self) -> bool[src]

Checks if the value of the field is _24K

pub fn is_4k(&self) -> bool[src]

Checks if the value of the field is _4K

pub fn is_80k(&self) -> bool[src]

Checks if the value of the field is _80K

pub fn is_160k(&self) -> bool[src]

Checks if the value of the field is _160K

pub fn is_8k(&self) -> bool[src]

Checks if the value of the field is _8K

pub fn is_16k(&self) -> bool[src]

Checks if the value of the field is _16K

pub fn is_32k(&self) -> bool[src]

Checks if the value of the field is _32K

pub fn is_64k(&self) -> bool[src]

Checks if the value of the field is _64K

pub fn is_128k(&self) -> bool[src]

Checks if the value of the field is _128K

pub fn is_256k(&self) -> bool[src]

Checks if the value of the field is _256K

pub fn is_96k(&self) -> bool[src]

Checks if the value of the field is _96K

pub fn is_512k(&self) -> bool[src]

Checks if the value of the field is _512K

impl R<u8, ARCH_A>[src]

pub fn variant(&self) -> Variant<u8, ARCH_A>[src]

Get enumerated values variant

pub fn is_sam4e(&self) -> bool[src]

Checks if the value of the field is SAM4E

impl R<u8, NVPTYP_A>[src]

pub fn variant(&self) -> Variant<u8, NVPTYP_A>[src]

Get enumerated values variant

pub fn is_rom(&self) -> bool[src]

Checks if the value of the field is ROM

pub fn is_romless(&self) -> bool[src]

Checks if the value of the field is ROMLESS

pub fn is_flash(&self) -> bool[src]

Checks if the value of the field is FLASH

pub fn is_rom_flash(&self) -> bool[src]

Checks if the value of the field is ROM_FLASH

pub fn is_sram(&self) -> bool[src]

Checks if the value of the field is SRAM

impl R<u32, Reg<u32, _CIDR>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:4 - Version of the Device

pub fn eproc(&self) -> EPROC_R[src]

Bits 5:7 - Embedded Processor

pub fn nvpsiz(&self) -> NVPSIZ_R[src]

Bits 8:11 - Nonvolatile Program Memory Size

pub fn nvpsiz2(&self) -> NVPSIZ2_R[src]

Bits 12:15 - Second Nonvolatile Program Memory Size

pub fn sramsiz(&self) -> SRAMSIZ_R[src]

Bits 16:19 - Internal SRAM Size

pub fn arch(&self) -> ARCH_R[src]

Bits 20:27 - Architecture Identifier

pub fn nvptyp(&self) -> NVPTYP_R[src]

Bits 28:30 - Nonvolatile Program Memory Type

pub fn ext(&self) -> EXT_R[src]

Bit 31 - Extension Flag

impl R<u32, Reg<u32, _EXID>>[src]

pub fn exid(&self) -> EXID_R[src]

Bits 0:31 - Chip ID Extension

impl R<u32, Reg<u32, _FMR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Ready Interrupt Enable

pub fn fws(&self) -> FWS_R[src]

Bits 8:11 - Flash Wait State

pub fn scod(&self) -> SCOD_R[src]

Bit 16 - Sequential Code Optimization Disable

pub fn fam(&self) -> FAM_R[src]

Bit 24 - Flash Access Mode

pub fn cloe(&self) -> CLOE_R[src]

Bit 26 - Code Loop Optimization Enable

impl R<u32, Reg<u32, _FSR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Flash Ready Status

pub fn fcmde(&self) -> FCMDE_R[src]

Bit 1 - Flash Command Error Status

pub fn flocke(&self) -> FLOCKE_R[src]

Bit 2 - Flash Lock Error Status

pub fn flerr(&self) -> FLERR_R[src]

Bit 3 - Flash Error Status

impl R<u32, Reg<u32, _FRR>>[src]

pub fn fvalue(&self) -> FVALUE_R[src]

Bits 0:31 - Flash Result Value

impl R<u32, Reg<u32, _PSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - PIO Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - PIO Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - PIO Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - PIO Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - PIO Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - PIO Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - PIO Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - PIO Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - PIO Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - PIO Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - PIO Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - PIO Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - PIO Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - PIO Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - PIO Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - PIO Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - PIO Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - PIO Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - PIO Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - PIO Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - PIO Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - PIO Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - PIO Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - PIO Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - PIO Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - PIO Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - PIO Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - PIO Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - PIO Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - PIO Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - PIO Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - PIO Status

impl R<u32, Reg<u32, _OSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Status

impl R<u32, Reg<u32, _IFSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Filer Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Filer Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Filer Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Filer Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Filer Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Filer Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Filer Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Filer Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Filer Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Filer Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Filer Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Filer Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Filer Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Filer Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Filer Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Filer Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Filer Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Filer Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Filer Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Filer Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Filer Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Filer Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Filer Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Filer Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Filer Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Filer Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Filer Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Filer Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Filer Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Filer Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Filer Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Filer Status

impl R<u32, Reg<u32, _ODSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _PDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Mask

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Mask

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Mask

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Mask

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Mask

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Mask

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Mask

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Mask

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Mask

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Mask

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Mask

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Mask

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Mask

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Mask

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Mask

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Mask

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Mask

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Mask

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Mask

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Mask

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Mask

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Mask

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Mask

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Mask

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Mask

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Mask

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Mask

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Mask

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Mask

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Mask

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Mask

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Status

impl R<u32, Reg<u32, _MDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Multi-drive Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Multi-drive Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Multi-drive Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Multi-drive Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Multi-drive Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Multi-drive Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Multi-drive Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Multi-drive Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Multi-drive Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Multi-drive Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Multi-drive Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Multi-drive Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Multi-drive Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Multi-drive Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Multi-drive Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Multi-drive Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Multi-drive Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Multi-drive Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Multi-drive Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Multi-drive Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Multi-drive Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Multi-drive Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Multi-drive Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Multi-drive Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Multi-drive Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Multi-drive Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Multi-drive Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Multi-drive Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Multi-drive Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Multi-drive Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Multi-drive Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Multi-drive Status

impl R<u32, Reg<u32, _PUSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Up Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Up Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Up Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Up Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Up Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Up Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Up Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Up Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Up Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Up Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Up Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Up Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Up Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Up Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Up Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Up Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Up Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Up Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Up Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Up Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Up Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Up Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Up Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Up Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Up Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Up Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Up Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Up Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Up Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Up Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Up Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Up Status

impl R<u32, Reg<u32, _ABCDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Select

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Select

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Select

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Select

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Select

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Select

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Select

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Select

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Select

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Select

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Select

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Select

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Select

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Select

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Select

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Select

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Select

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Select

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Select

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Select

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Select

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Select

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Select

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Select

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Select

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Select

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Select

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Select

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Select

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Select

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Select

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Select

impl R<u32, Reg<u32, _IFSCSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch or Debouncing Filter Selection Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch or Debouncing Filter Selection Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch or Debouncing Filter Selection Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch or Debouncing Filter Selection Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch or Debouncing Filter Selection Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch or Debouncing Filter Selection Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch or Debouncing Filter Selection Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch or Debouncing Filter Selection Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch or Debouncing Filter Selection Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch or Debouncing Filter Selection Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch or Debouncing Filter Selection Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch or Debouncing Filter Selection Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch or Debouncing Filter Selection Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch or Debouncing Filter Selection Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch or Debouncing Filter Selection Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch or Debouncing Filter Selection Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch or Debouncing Filter Selection Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch or Debouncing Filter Selection Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch or Debouncing Filter Selection Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch or Debouncing Filter Selection Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch or Debouncing Filter Selection Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch or Debouncing Filter Selection Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch or Debouncing Filter Selection Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch or Debouncing Filter Selection Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch or Debouncing Filter Selection Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch or Debouncing Filter Selection Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch or Debouncing Filter Selection Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch or Debouncing Filter Selection Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch or Debouncing Filter Selection Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch or Debouncing Filter Selection Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch or Debouncing Filter Selection Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch or Debouncing Filter Selection Status

impl R<u32, Reg<u32, _SCDR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl R<u32, Reg<u32, _PPDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Down Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Down Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Down Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Down Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Down Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Down Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Down Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Down Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Down Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Down Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Down Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Down Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Down Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Down Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Down Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Down Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Down Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Down Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Down Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Down Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Down Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Down Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Down Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Down Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Down Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Down Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Down Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Down Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Down Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Down Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Down Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Down Status

impl R<u32, Reg<u32, _OWSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Write Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Write Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Write Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Write Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Write Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Write Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Write Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Write Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Write Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Write Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Write Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Write Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Write Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Write Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Write Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Write Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Write Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Write Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Write Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Write Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Write Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Write Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Write Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Write Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Write Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Write Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Write Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Write Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Write Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Write Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Write Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Write Status

impl R<u32, Reg<u32, _AIMMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral CD Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral CD Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral CD Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral CD Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral CD Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral CD Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral CD Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral CD Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral CD Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral CD Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral CD Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral CD Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral CD Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral CD Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral CD Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral CD Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral CD Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral CD Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral CD Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral CD Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral CD Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral CD Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral CD Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral CD Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral CD Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral CD Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral CD Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral CD Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral CD Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral CD Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral CD Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral CD Status

impl R<u32, Reg<u32, _ELSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _FRLHSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _LOCKSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock Status

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _SCHMITT>>[src]

pub fn schmitt0(&self) -> SCHMITT0_R[src]

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&self) -> SCHMITT1_R[src]

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&self) -> SCHMITT2_R[src]

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&self) -> SCHMITT3_R[src]

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&self) -> SCHMITT4_R[src]

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&self) -> SCHMITT5_R[src]

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&self) -> SCHMITT6_R[src]

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&self) -> SCHMITT7_R[src]

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&self) -> SCHMITT8_R[src]

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&self) -> SCHMITT9_R[src]

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&self) -> SCHMITT10_R[src]

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&self) -> SCHMITT11_R[src]

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&self) -> SCHMITT12_R[src]

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&self) -> SCHMITT13_R[src]

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&self) -> SCHMITT14_R[src]

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&self) -> SCHMITT15_R[src]

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&self) -> SCHMITT16_R[src]

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&self) -> SCHMITT17_R[src]

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&self) -> SCHMITT18_R[src]

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&self) -> SCHMITT19_R[src]

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&self) -> SCHMITT20_R[src]

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&self) -> SCHMITT21_R[src]

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&self) -> SCHMITT22_R[src]

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&self) -> SCHMITT23_R[src]

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&self) -> SCHMITT24_R[src]

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&self) -> SCHMITT25_R[src]

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&self) -> SCHMITT26_R[src]

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&self) -> SCHMITT27_R[src]

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&self) -> SCHMITT28_R[src]

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&self) -> SCHMITT29_R[src]

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&self) -> SCHMITT30_R[src]

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&self) -> SCHMITT31_R[src]

Bit 31 - Schmitt Trigger Control

impl R<u32, Reg<u32, _DELAYR>>[src]

pub fn delay0(&self) -> DELAY0_R[src]

Bits 0:3 - Delay Control for Simultaneous Switch Reduction

pub fn delay1(&self) -> DELAY1_R[src]

Bits 4:7 - Delay Control for Simultaneous Switch Reduction

pub fn delay2(&self) -> DELAY2_R[src]

Bits 8:11 - Delay Control for Simultaneous Switch Reduction

pub fn delay3(&self) -> DELAY3_R[src]

Bits 12:15 - Delay Control for Simultaneous Switch Reduction

pub fn delay4(&self) -> DELAY4_R[src]

Bits 16:19 - Delay Control for Simultaneous Switch Reduction

pub fn delay5(&self) -> DELAY5_R[src]

Bits 20:23 - Delay Control for Simultaneous Switch Reduction

pub fn delay6(&self) -> DELAY6_R[src]

Bits 24:27 - Delay Control for Simultaneous Switch Reduction

pub fn delay7(&self) -> DELAY7_R[src]

Bits 28:31 - Delay Control for Simultaneous Switch Reduction

impl R<u8, DSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_halfword(&self) -> bool[src]

Checks if the value of the field is HALFWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _PCMR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - Parallel Capture Mode First Sample

impl R<u32, Reg<u32, _PCIMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _PCISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error.

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer.

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full

impl R<u32, Reg<u32, _PCRHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Parallel Capture Mode Reception Data.

impl R<u32, Reg<u32, _RPR>>[src]

pub fn rxptr(&self) -> RXPTR_R[src]

Bits 0:31 - Receive Pointer Register

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rxctr(&self) -> RXCTR_R[src]

Bits 0:15 - Receive Counter Register

impl R<u32, Reg<u32, _RNPR>>[src]

pub fn rxnptr(&self) -> RXNPTR_R[src]

Bits 0:31 - Receive Next Pointer

impl R<u32, Reg<u32, _RNCR>>[src]

pub fn rxnctr(&self) -> RXNCTR_R[src]

Bits 0:15 - Receive Next Counter

impl R<u32, Reg<u32, _PTSR>>[src]

pub fn rxten(&self) -> RXTEN_R[src]

Bit 0 - Receiver Transfer Enable

pub fn txten(&self) -> TXTEN_R[src]

Bit 8 - Transmitter Transfer Enable

impl R<u32, Reg<u32, _PSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - PIO Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - PIO Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - PIO Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - PIO Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - PIO Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - PIO Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - PIO Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - PIO Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - PIO Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - PIO Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - PIO Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - PIO Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - PIO Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - PIO Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - PIO Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - PIO Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - PIO Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - PIO Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - PIO Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - PIO Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - PIO Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - PIO Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - PIO Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - PIO Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - PIO Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - PIO Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - PIO Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - PIO Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - PIO Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - PIO Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - PIO Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - PIO Status

impl R<u32, Reg<u32, _OSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Status

impl R<u32, Reg<u32, _IFSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Filer Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Filer Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Filer Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Filer Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Filer Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Filer Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Filer Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Filer Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Filer Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Filer Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Filer Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Filer Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Filer Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Filer Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Filer Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Filer Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Filer Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Filer Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Filer Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Filer Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Filer Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Filer Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Filer Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Filer Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Filer Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Filer Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Filer Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Filer Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Filer Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Filer Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Filer Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Filer Status

impl R<u32, Reg<u32, _ODSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _PDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Mask

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Mask

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Mask

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Mask

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Mask

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Mask

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Mask

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Mask

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Mask

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Mask

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Mask

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Mask

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Mask

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Mask

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Mask

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Mask

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Mask

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Mask

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Mask

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Mask

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Mask

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Mask

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Mask

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Mask

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Mask

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Mask

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Mask

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Mask

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Mask

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Mask

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Mask

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Status

impl R<u32, Reg<u32, _MDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Multi-drive Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Multi-drive Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Multi-drive Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Multi-drive Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Multi-drive Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Multi-drive Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Multi-drive Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Multi-drive Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Multi-drive Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Multi-drive Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Multi-drive Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Multi-drive Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Multi-drive Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Multi-drive Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Multi-drive Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Multi-drive Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Multi-drive Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Multi-drive Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Multi-drive Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Multi-drive Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Multi-drive Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Multi-drive Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Multi-drive Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Multi-drive Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Multi-drive Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Multi-drive Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Multi-drive Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Multi-drive Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Multi-drive Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Multi-drive Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Multi-drive Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Multi-drive Status

impl R<u32, Reg<u32, _PUSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Up Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Up Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Up Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Up Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Up Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Up Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Up Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Up Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Up Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Up Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Up Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Up Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Up Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Up Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Up Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Up Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Up Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Up Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Up Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Up Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Up Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Up Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Up Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Up Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Up Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Up Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Up Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Up Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Up Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Up Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Up Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Up Status

impl R<u32, Reg<u32, _ABCDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Select

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Select

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Select

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Select

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Select

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Select

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Select

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Select

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Select

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Select

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Select

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Select

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Select

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Select

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Select

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Select

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Select

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Select

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Select

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Select

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Select

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Select

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Select

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Select

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Select

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Select

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Select

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Select

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Select

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Select

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Select

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Select

impl R<u32, Reg<u32, _IFSCSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch or Debouncing Filter Selection Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch or Debouncing Filter Selection Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch or Debouncing Filter Selection Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch or Debouncing Filter Selection Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch or Debouncing Filter Selection Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch or Debouncing Filter Selection Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch or Debouncing Filter Selection Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch or Debouncing Filter Selection Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch or Debouncing Filter Selection Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch or Debouncing Filter Selection Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch or Debouncing Filter Selection Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch or Debouncing Filter Selection Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch or Debouncing Filter Selection Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch or Debouncing Filter Selection Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch or Debouncing Filter Selection Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch or Debouncing Filter Selection Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch or Debouncing Filter Selection Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch or Debouncing Filter Selection Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch or Debouncing Filter Selection Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch or Debouncing Filter Selection Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch or Debouncing Filter Selection Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch or Debouncing Filter Selection Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch or Debouncing Filter Selection Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch or Debouncing Filter Selection Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch or Debouncing Filter Selection Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch or Debouncing Filter Selection Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch or Debouncing Filter Selection Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch or Debouncing Filter Selection Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch or Debouncing Filter Selection Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch or Debouncing Filter Selection Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch or Debouncing Filter Selection Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch or Debouncing Filter Selection Status

impl R<u32, Reg<u32, _SCDR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl R<u32, Reg<u32, _PPDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Down Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Down Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Down Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Down Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Down Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Down Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Down Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Down Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Down Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Down Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Down Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Down Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Down Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Down Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Down Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Down Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Down Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Down Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Down Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Down Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Down Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Down Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Down Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Down Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Down Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Down Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Down Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Down Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Down Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Down Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Down Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Down Status

impl R<u32, Reg<u32, _OWSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Write Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Write Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Write Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Write Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Write Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Write Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Write Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Write Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Write Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Write Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Write Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Write Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Write Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Write Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Write Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Write Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Write Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Write Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Write Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Write Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Write Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Write Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Write Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Write Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Write Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Write Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Write Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Write Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Write Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Write Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Write Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Write Status

impl R<u32, Reg<u32, _AIMMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral CD Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral CD Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral CD Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral CD Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral CD Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral CD Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral CD Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral CD Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral CD Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral CD Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral CD Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral CD Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral CD Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral CD Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral CD Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral CD Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral CD Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral CD Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral CD Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral CD Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral CD Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral CD Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral CD Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral CD Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral CD Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral CD Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral CD Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral CD Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral CD Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral CD Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral CD Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral CD Status

impl R<u32, Reg<u32, _ELSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _FRLHSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _LOCKSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock Status

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _SCHMITT>>[src]

pub fn schmitt0(&self) -> SCHMITT0_R[src]

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&self) -> SCHMITT1_R[src]

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&self) -> SCHMITT2_R[src]

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&self) -> SCHMITT3_R[src]

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&self) -> SCHMITT4_R[src]

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&self) -> SCHMITT5_R[src]

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&self) -> SCHMITT6_R[src]

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&self) -> SCHMITT7_R[src]

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&self) -> SCHMITT8_R[src]

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&self) -> SCHMITT9_R[src]

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&self) -> SCHMITT10_R[src]

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&self) -> SCHMITT11_R[src]

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&self) -> SCHMITT12_R[src]

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&self) -> SCHMITT13_R[src]

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&self) -> SCHMITT14_R[src]

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&self) -> SCHMITT15_R[src]

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&self) -> SCHMITT16_R[src]

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&self) -> SCHMITT17_R[src]

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&self) -> SCHMITT18_R[src]

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&self) -> SCHMITT19_R[src]

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&self) -> SCHMITT20_R[src]

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&self) -> SCHMITT21_R[src]

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&self) -> SCHMITT22_R[src]

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&self) -> SCHMITT23_R[src]

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&self) -> SCHMITT24_R[src]

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&self) -> SCHMITT25_R[src]

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&self) -> SCHMITT26_R[src]

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&self) -> SCHMITT27_R[src]

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&self) -> SCHMITT28_R[src]

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&self) -> SCHMITT29_R[src]

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&self) -> SCHMITT30_R[src]

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&self) -> SCHMITT31_R[src]

Bit 31 - Schmitt Trigger Control

impl R<u32, Reg<u32, _DELAYR>>[src]

pub fn delay0(&self) -> DELAY0_R[src]

Bits 0:3 - Delay Control for Simultaneous Switch Reduction

pub fn delay1(&self) -> DELAY1_R[src]

Bits 4:7 - Delay Control for Simultaneous Switch Reduction

pub fn delay2(&self) -> DELAY2_R[src]

Bits 8:11 - Delay Control for Simultaneous Switch Reduction

pub fn delay3(&self) -> DELAY3_R[src]

Bits 12:15 - Delay Control for Simultaneous Switch Reduction

pub fn delay4(&self) -> DELAY4_R[src]

Bits 16:19 - Delay Control for Simultaneous Switch Reduction

pub fn delay5(&self) -> DELAY5_R[src]

Bits 20:23 - Delay Control for Simultaneous Switch Reduction

pub fn delay6(&self) -> DELAY6_R[src]

Bits 24:27 - Delay Control for Simultaneous Switch Reduction

pub fn delay7(&self) -> DELAY7_R[src]

Bits 28:31 - Delay Control for Simultaneous Switch Reduction

impl R<u8, DSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_halfword(&self) -> bool[src]

Checks if the value of the field is HALFWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _PCMR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - Parallel Capture Mode First Sample

impl R<u32, Reg<u32, _PCIMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _PCISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error.

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer.

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full

impl R<u32, Reg<u32, _PCRHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Parallel Capture Mode Reception Data.

impl R<u32, Reg<u32, _PSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - PIO Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - PIO Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - PIO Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - PIO Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - PIO Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - PIO Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - PIO Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - PIO Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - PIO Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - PIO Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - PIO Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - PIO Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - PIO Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - PIO Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - PIO Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - PIO Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - PIO Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - PIO Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - PIO Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - PIO Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - PIO Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - PIO Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - PIO Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - PIO Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - PIO Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - PIO Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - PIO Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - PIO Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - PIO Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - PIO Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - PIO Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - PIO Status

impl R<u32, Reg<u32, _OSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Status

impl R<u32, Reg<u32, _IFSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Filer Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Filer Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Filer Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Filer Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Filer Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Filer Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Filer Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Filer Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Filer Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Filer Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Filer Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Filer Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Filer Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Filer Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Filer Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Filer Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Filer Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Filer Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Filer Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Filer Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Filer Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Filer Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Filer Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Filer Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Filer Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Filer Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Filer Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Filer Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Filer Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Filer Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Filer Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Filer Status

impl R<u32, Reg<u32, _ODSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _PDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Data Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Data Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Data Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Data Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Data Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Data Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Data Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Data Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Data Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Data Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Data Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Data Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Data Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Data Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Data Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Data Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Data Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Data Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Data Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Data Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Data Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Data Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Data Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Data Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Data Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Data Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Data Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Data Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Data Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Data Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Data Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Data Status

impl R<u32, Reg<u32, _IMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Mask

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Mask

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Mask

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Mask

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Mask

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Mask

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Mask

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Mask

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Mask

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Mask

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Mask

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Mask

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Mask

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Mask

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Mask

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Mask

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Mask

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Mask

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Mask

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Mask

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Mask

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Mask

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Mask

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Mask

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Mask

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Mask

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Mask

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Mask

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Mask

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Mask

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Mask

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Input Change Interrupt Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Input Change Interrupt Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Input Change Interrupt Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Input Change Interrupt Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Input Change Interrupt Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Input Change Interrupt Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Input Change Interrupt Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Input Change Interrupt Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Input Change Interrupt Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Input Change Interrupt Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Input Change Interrupt Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Input Change Interrupt Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Input Change Interrupt Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Input Change Interrupt Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Input Change Interrupt Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Input Change Interrupt Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Input Change Interrupt Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Input Change Interrupt Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Input Change Interrupt Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Input Change Interrupt Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Input Change Interrupt Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Input Change Interrupt Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Input Change Interrupt Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Input Change Interrupt Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Input Change Interrupt Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Input Change Interrupt Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Input Change Interrupt Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Input Change Interrupt Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Input Change Interrupt Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Input Change Interrupt Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Input Change Interrupt Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Input Change Interrupt Status

impl R<u32, Reg<u32, _MDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Multi-drive Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Multi-drive Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Multi-drive Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Multi-drive Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Multi-drive Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Multi-drive Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Multi-drive Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Multi-drive Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Multi-drive Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Multi-drive Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Multi-drive Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Multi-drive Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Multi-drive Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Multi-drive Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Multi-drive Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Multi-drive Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Multi-drive Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Multi-drive Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Multi-drive Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Multi-drive Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Multi-drive Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Multi-drive Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Multi-drive Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Multi-drive Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Multi-drive Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Multi-drive Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Multi-drive Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Multi-drive Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Multi-drive Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Multi-drive Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Multi-drive Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Multi-drive Status

impl R<u32, Reg<u32, _PUSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Up Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Up Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Up Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Up Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Up Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Up Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Up Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Up Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Up Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Up Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Up Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Up Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Up Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Up Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Up Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Up Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Up Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Up Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Up Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Up Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Up Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Up Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Up Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Up Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Up Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Up Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Up Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Up Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Up Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Up Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Up Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Up Status

impl R<u32, Reg<u32, _ABCDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Select

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Select

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Select

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Select

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Select

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Select

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Select

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Select

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Select

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Select

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Select

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Select

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Select

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Select

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Select

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Select

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Select

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Select

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Select

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Select

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Select

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Select

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Select

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Select

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Select

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Select

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Select

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Select

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Select

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Select

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Select

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Select

impl R<u32, Reg<u32, _IFSCSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch or Debouncing Filter Selection Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch or Debouncing Filter Selection Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch or Debouncing Filter Selection Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch or Debouncing Filter Selection Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch or Debouncing Filter Selection Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch or Debouncing Filter Selection Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch or Debouncing Filter Selection Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch or Debouncing Filter Selection Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch or Debouncing Filter Selection Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch or Debouncing Filter Selection Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch or Debouncing Filter Selection Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch or Debouncing Filter Selection Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch or Debouncing Filter Selection Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch or Debouncing Filter Selection Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch or Debouncing Filter Selection Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch or Debouncing Filter Selection Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch or Debouncing Filter Selection Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch or Debouncing Filter Selection Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch or Debouncing Filter Selection Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch or Debouncing Filter Selection Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch or Debouncing Filter Selection Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch or Debouncing Filter Selection Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch or Debouncing Filter Selection Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch or Debouncing Filter Selection Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch or Debouncing Filter Selection Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch or Debouncing Filter Selection Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch or Debouncing Filter Selection Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch or Debouncing Filter Selection Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch or Debouncing Filter Selection Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch or Debouncing Filter Selection Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch or Debouncing Filter Selection Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch or Debouncing Filter Selection Status

impl R<u32, Reg<u32, _SCDR>>[src]

pub fn div(&self) -> DIV_R[src]

Bits 0:13 - Slow Clock Divider Selection for Debouncing

impl R<u32, Reg<u32, _PPDSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-Down Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-Down Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-Down Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-Down Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-Down Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-Down Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-Down Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-Down Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-Down Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-Down Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-Down Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-Down Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-Down Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-Down Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-Down Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-Down Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-Down Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-Down Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-Down Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-Down Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-Down Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-Down Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-Down Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-Down Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-Down Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-Down Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-Down Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-Down Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-Down Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-Down Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-Down Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-Down Status

impl R<u32, Reg<u32, _OWSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Write Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Write Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Write Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Write Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Write Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Write Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Write Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Write Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Write Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Write Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Write Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Write Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Write Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Write Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Write Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Write Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Write Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Write Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Write Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Write Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Write Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Write Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Write Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Write Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Write Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Write Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Write Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Write Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Write Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Write Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Write Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Write Status

impl R<u32, Reg<u32, _AIMMR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral CD Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral CD Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral CD Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral CD Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral CD Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral CD Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral CD Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral CD Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral CD Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral CD Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral CD Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral CD Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral CD Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral CD Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral CD Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral CD Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral CD Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral CD Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral CD Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral CD Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral CD Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral CD Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral CD Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral CD Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral CD Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral CD Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral CD Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral CD Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral CD Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral CD Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral CD Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral CD Status

impl R<u32, Reg<u32, _ELSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _FRLHSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Edge/Level Interrupt Source Selection

pub fn p1(&self) -> P1_R[src]

Bit 1 - Edge/Level Interrupt Source Selection

pub fn p2(&self) -> P2_R[src]

Bit 2 - Edge/Level Interrupt Source Selection

pub fn p3(&self) -> P3_R[src]

Bit 3 - Edge/Level Interrupt Source Selection

pub fn p4(&self) -> P4_R[src]

Bit 4 - Edge/Level Interrupt Source Selection

pub fn p5(&self) -> P5_R[src]

Bit 5 - Edge/Level Interrupt Source Selection

pub fn p6(&self) -> P6_R[src]

Bit 6 - Edge/Level Interrupt Source Selection

pub fn p7(&self) -> P7_R[src]

Bit 7 - Edge/Level Interrupt Source Selection

pub fn p8(&self) -> P8_R[src]

Bit 8 - Edge/Level Interrupt Source Selection

pub fn p9(&self) -> P9_R[src]

Bit 9 - Edge/Level Interrupt Source Selection

pub fn p10(&self) -> P10_R[src]

Bit 10 - Edge/Level Interrupt Source Selection

pub fn p11(&self) -> P11_R[src]

Bit 11 - Edge/Level Interrupt Source Selection

pub fn p12(&self) -> P12_R[src]

Bit 12 - Edge/Level Interrupt Source Selection

pub fn p13(&self) -> P13_R[src]

Bit 13 - Edge/Level Interrupt Source Selection

pub fn p14(&self) -> P14_R[src]

Bit 14 - Edge/Level Interrupt Source Selection

pub fn p15(&self) -> P15_R[src]

Bit 15 - Edge/Level Interrupt Source Selection

pub fn p16(&self) -> P16_R[src]

Bit 16 - Edge/Level Interrupt Source Selection

pub fn p17(&self) -> P17_R[src]

Bit 17 - Edge/Level Interrupt Source Selection

pub fn p18(&self) -> P18_R[src]

Bit 18 - Edge/Level Interrupt Source Selection

pub fn p19(&self) -> P19_R[src]

Bit 19 - Edge/Level Interrupt Source Selection

pub fn p20(&self) -> P20_R[src]

Bit 20 - Edge/Level Interrupt Source Selection

pub fn p21(&self) -> P21_R[src]

Bit 21 - Edge/Level Interrupt Source Selection

pub fn p22(&self) -> P22_R[src]

Bit 22 - Edge/Level Interrupt Source Selection

pub fn p23(&self) -> P23_R[src]

Bit 23 - Edge/Level Interrupt Source Selection

pub fn p24(&self) -> P24_R[src]

Bit 24 - Edge/Level Interrupt Source Selection

pub fn p25(&self) -> P25_R[src]

Bit 25 - Edge/Level Interrupt Source Selection

pub fn p26(&self) -> P26_R[src]

Bit 26 - Edge/Level Interrupt Source Selection

pub fn p27(&self) -> P27_R[src]

Bit 27 - Edge/Level Interrupt Source Selection

pub fn p28(&self) -> P28_R[src]

Bit 28 - Edge/Level Interrupt Source Selection

pub fn p29(&self) -> P29_R[src]

Bit 29 - Edge/Level Interrupt Source Selection

pub fn p30(&self) -> P30_R[src]

Bit 30 - Edge/Level Interrupt Source Selection

pub fn p31(&self) -> P31_R[src]

Bit 31 - Edge/Level Interrupt Source Selection

impl R<u32, Reg<u32, _LOCKSR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock Status

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock Status

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock Status

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock Status

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock Status

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock Status

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock Status

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock Status

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock Status

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock Status

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock Status

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock Status

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock Status

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock Status

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock Status

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock Status

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock Status

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock Status

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock Status

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock Status

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock Status

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock Status

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock Status

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock Status

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock Status

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock Status

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock Status

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock Status

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock Status

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock Status

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock Status

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock Status

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bit 0 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protection Violation Source

impl R<u32, Reg<u32, _SCHMITT>>[src]

pub fn schmitt0(&self) -> SCHMITT0_R[src]

Bit 0 - Schmitt Trigger Control

pub fn schmitt1(&self) -> SCHMITT1_R[src]

Bit 1 - Schmitt Trigger Control

pub fn schmitt2(&self) -> SCHMITT2_R[src]

Bit 2 - Schmitt Trigger Control

pub fn schmitt3(&self) -> SCHMITT3_R[src]

Bit 3 - Schmitt Trigger Control

pub fn schmitt4(&self) -> SCHMITT4_R[src]

Bit 4 - Schmitt Trigger Control

pub fn schmitt5(&self) -> SCHMITT5_R[src]

Bit 5 - Schmitt Trigger Control

pub fn schmitt6(&self) -> SCHMITT6_R[src]

Bit 6 - Schmitt Trigger Control

pub fn schmitt7(&self) -> SCHMITT7_R[src]

Bit 7 - Schmitt Trigger Control

pub fn schmitt8(&self) -> SCHMITT8_R[src]

Bit 8 - Schmitt Trigger Control

pub fn schmitt9(&self) -> SCHMITT9_R[src]

Bit 9 - Schmitt Trigger Control

pub fn schmitt10(&self) -> SCHMITT10_R[src]

Bit 10 - Schmitt Trigger Control

pub fn schmitt11(&self) -> SCHMITT11_R[src]

Bit 11 - Schmitt Trigger Control

pub fn schmitt12(&self) -> SCHMITT12_R[src]

Bit 12 - Schmitt Trigger Control

pub fn schmitt13(&self) -> SCHMITT13_R[src]

Bit 13 - Schmitt Trigger Control

pub fn schmitt14(&self) -> SCHMITT14_R[src]

Bit 14 - Schmitt Trigger Control

pub fn schmitt15(&self) -> SCHMITT15_R[src]

Bit 15 - Schmitt Trigger Control

pub fn schmitt16(&self) -> SCHMITT16_R[src]

Bit 16 - Schmitt Trigger Control

pub fn schmitt17(&self) -> SCHMITT17_R[src]

Bit 17 - Schmitt Trigger Control

pub fn schmitt18(&self) -> SCHMITT18_R[src]

Bit 18 - Schmitt Trigger Control

pub fn schmitt19(&self) -> SCHMITT19_R[src]

Bit 19 - Schmitt Trigger Control

pub fn schmitt20(&self) -> SCHMITT20_R[src]

Bit 20 - Schmitt Trigger Control

pub fn schmitt21(&self) -> SCHMITT21_R[src]

Bit 21 - Schmitt Trigger Control

pub fn schmitt22(&self) -> SCHMITT22_R[src]

Bit 22 - Schmitt Trigger Control

pub fn schmitt23(&self) -> SCHMITT23_R[src]

Bit 23 - Schmitt Trigger Control

pub fn schmitt24(&self) -> SCHMITT24_R[src]

Bit 24 - Schmitt Trigger Control

pub fn schmitt25(&self) -> SCHMITT25_R[src]

Bit 25 - Schmitt Trigger Control

pub fn schmitt26(&self) -> SCHMITT26_R[src]

Bit 26 - Schmitt Trigger Control

pub fn schmitt27(&self) -> SCHMITT27_R[src]

Bit 27 - Schmitt Trigger Control

pub fn schmitt28(&self) -> SCHMITT28_R[src]

Bit 28 - Schmitt Trigger Control

pub fn schmitt29(&self) -> SCHMITT29_R[src]

Bit 29 - Schmitt Trigger Control

pub fn schmitt30(&self) -> SCHMITT30_R[src]

Bit 30 - Schmitt Trigger Control

pub fn schmitt31(&self) -> SCHMITT31_R[src]

Bit 31 - Schmitt Trigger Control

impl R<u32, Reg<u32, _DELAYR>>[src]

pub fn delay0(&self) -> DELAY0_R[src]

Bits 0:3 - Delay Control for Simultaneous Switch Reduction

pub fn delay1(&self) -> DELAY1_R[src]

Bits 4:7 - Delay Control for Simultaneous Switch Reduction

pub fn delay2(&self) -> DELAY2_R[src]

Bits 8:11 - Delay Control for Simultaneous Switch Reduction

pub fn delay3(&self) -> DELAY3_R[src]

Bits 12:15 - Delay Control for Simultaneous Switch Reduction

pub fn delay4(&self) -> DELAY4_R[src]

Bits 16:19 - Delay Control for Simultaneous Switch Reduction

pub fn delay5(&self) -> DELAY5_R[src]

Bits 20:23 - Delay Control for Simultaneous Switch Reduction

pub fn delay6(&self) -> DELAY6_R[src]

Bits 24:27 - Delay Control for Simultaneous Switch Reduction

pub fn delay7(&self) -> DELAY7_R[src]

Bits 28:31 - Delay Control for Simultaneous Switch Reduction

impl R<u8, DSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, DSIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_halfword(&self) -> bool[src]

Checks if the value of the field is HALFWORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _PCMR>>[src]

pub fn pcen(&self) -> PCEN_R[src]

Bit 0 - Parallel Capture Mode Enable

pub fn dsize(&self) -> DSIZE_R[src]

Bits 4:5 - Parallel Capture Mode Data Size

pub fn alwys(&self) -> ALWYS_R[src]

Bit 9 - Parallel Capture Mode Always Sampling

pub fn halfs(&self) -> HALFS_R[src]

Bit 10 - Parallel Capture Mode Half Sampling

pub fn frsts(&self) -> FRSTS_R[src]

Bit 11 - Parallel Capture Mode First Sample

impl R<u32, Reg<u32, _PCIMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full Interrupt Mask

impl R<u32, Reg<u32, _PCISR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 0 - Parallel Capture Mode Data Ready

pub fn ovre(&self) -> OVRE_R[src]

Bit 1 - Parallel Capture Mode Overrun Error.

pub fn endrx(&self) -> ENDRX_R[src]

Bit 2 - End of Reception Transfer.

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 3 - Reception Buffer Full

impl R<u32, Reg<u32, _PCRHR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:31 - Parallel Capture Mode Reception Data.

impl R<u8, RSTTYP_A>[src]

pub fn variant(&self) -> Variant<u8, RSTTYP_A>[src]

Get enumerated values variant

pub fn is_general_rst(&self) -> bool[src]

Checks if the value of the field is GENERAL_RST

pub fn is_backup_rst(&self) -> bool[src]

Checks if the value of the field is BACKUP_RST

pub fn is_wdt_rst(&self) -> bool[src]

Checks if the value of the field is WDT_RST

pub fn is_soft_rst(&self) -> bool[src]

Checks if the value of the field is SOFT_RST

pub fn is_user_rst(&self) -> bool[src]

Checks if the value of the field is USER_RST

impl R<u32, Reg<u32, _SR>>[src]

pub fn ursts(&self) -> URSTS_R[src]

Bit 0 - User Reset Status

pub fn rsttyp(&self) -> RSTTYP_R[src]

Bits 8:10 - Reset Type

pub fn nrstl(&self) -> NRSTL_R[src]

Bit 16 - NRST Pin Level

pub fn srcmp(&self) -> SRCMP_R[src]

Bit 17 - Software Reset Command in Progress

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MR>>[src]

pub fn ursten(&self) -> URSTEN_R[src]

Bit 0 - User Reset Enable

pub fn urstien(&self) -> URSTIEN_R[src]

Bit 4 - User Reset Interrupt Enable

pub fn erstl(&self) -> ERSTL_R[src]

Bits 8:11 - External Reset Length

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Write Access Password

impl R<u8, SMSMPL_A>[src]

pub fn variant(&self) -> Variant<u8, SMSMPL_A>[src]

Get enumerated values variant

pub fn is_smd(&self) -> bool[src]

Checks if the value of the field is SMD

pub fn is_csm(&self) -> bool[src]

Checks if the value of the field is CSM

pub fn is_32slck(&self) -> bool[src]

Checks if the value of the field is _32SLCK

pub fn is_256slck(&self) -> bool[src]

Checks if the value of the field is _256SLCK

pub fn is_2048slck(&self) -> bool[src]

Checks if the value of the field is _2048SLCK

impl R<bool, SMRSTEN_A>[src]

pub fn variant(&self) -> SMRSTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, SMIEN_A>[src]

pub fn variant(&self) -> SMIEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u32, Reg<u32, _SMMR>>[src]

pub fn smth(&self) -> SMTH_R[src]

Bits 0:3 - Supply Monitor Threshold

pub fn smsmpl(&self) -> SMSMPL_R[src]

Bits 8:10 - Supply Monitor Sampling Period

pub fn smrsten(&self) -> SMRSTEN_R[src]

Bit 12 - Supply Monitor Reset Enable

pub fn smien(&self) -> SMIEN_R[src]

Bit 13 - Supply Monitor Interrupt Enable

impl R<bool, BODRSTEN_A>[src]

pub fn variant(&self) -> BODRSTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, BODDIS_A>[src]

pub fn variant(&self) -> BODDIS_A[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, ONREG_A>[src]

pub fn variant(&self) -> ONREG_A[src]

Get enumerated values variant

pub fn is_onreg_unused(&self) -> bool[src]

Checks if the value of the field is ONREG_UNUSED

pub fn is_onreg_used(&self) -> bool[src]

Checks if the value of the field is ONREG_USED

impl R<bool, OSCBYPASS_A>[src]

pub fn variant(&self) -> OSCBYPASS_A[src]

Get enumerated values variant

pub fn is_no_effect(&self) -> bool[src]

Checks if the value of the field is NO_EFFECT

pub fn is_bypass(&self) -> bool[src]

Checks if the value of the field is BYPASS

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_passwd(&self) -> bool[src]

Checks if the value of the field is PASSWD

impl R<u32, Reg<u32, _MR>>[src]

pub fn bodrsten(&self) -> BODRSTEN_R[src]

Bit 12 - Brownout Detector Reset Enable

pub fn boddis(&self) -> BODDIS_R[src]

Bit 13 - Brownout Detector Disable

pub fn onreg(&self) -> ONREG_R[src]

Bit 14 - Voltage Regulator Enable

pub fn oscbypass(&self) -> OSCBYPASS_R[src]

Bit 20 - Oscillator Bypass

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Password Key

impl R<bool, FWUPEN_A>[src]

pub fn variant(&self) -> FWUPEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, SMEN_A>[src]

pub fn variant(&self) -> SMEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, RTTEN_A>[src]

pub fn variant(&self) -> RTTEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, RTCEN_A>[src]

pub fn variant(&self) -> RTCEN_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCEN0_A>[src]

pub fn variant(&self) -> LPDBCEN0_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCEN1_A>[src]

pub fn variant(&self) -> LPDBCEN1_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, LPDBCCLR_A>[src]

pub fn variant(&self) -> LPDBCCLR_A[src]

Get enumerated values variant

pub fn is_not_enable(&self) -> bool[src]

Checks if the value of the field is NOT_ENABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, FWUPDBC_A>[src]

pub fn variant(&self) -> Variant<u8, FWUPDBC_A>[src]

Get enumerated values variant

pub fn is_immediate(&self) -> bool[src]

Checks if the value of the field is IMMEDIATE

pub fn is_3_sclk(&self) -> bool[src]

Checks if the value of the field is _3_SCLK

pub fn is_32_sclk(&self) -> bool[src]

Checks if the value of the field is _32_SCLK

pub fn is_512_sclk(&self) -> bool[src]

Checks if the value of the field is _512_SCLK

pub fn is_4096_sclk(&self) -> bool[src]

Checks if the value of the field is _4096_SCLK

pub fn is_32768_sclk(&self) -> bool[src]

Checks if the value of the field is _32768_SCLK

impl R<u8, WKUPDBC_A>[src]

pub fn variant(&self) -> Variant<u8, WKUPDBC_A>[src]

Get enumerated values variant

pub fn is_immediate(&self) -> bool[src]

Checks if the value of the field is IMMEDIATE

pub fn is_3_sclk(&self) -> bool[src]

Checks if the value of the field is _3_SCLK

pub fn is_32_sclk(&self) -> bool[src]

Checks if the value of the field is _32_SCLK

pub fn is_512_sclk(&self) -> bool[src]

Checks if the value of the field is _512_SCLK

pub fn is_4096_sclk(&self) -> bool[src]

Checks if the value of the field is _4096_SCLK

pub fn is_32768_sclk(&self) -> bool[src]

Checks if the value of the field is _32768_SCLK

impl R<u8, LPDBC_A>[src]

pub fn variant(&self) -> LPDBC_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_2_rtcout0(&self) -> bool[src]

Checks if the value of the field is _2_RTCOUT0

pub fn is_3_rtcout0(&self) -> bool[src]

Checks if the value of the field is _3_RTCOUT0

pub fn is_4_rtcout0(&self) -> bool[src]

Checks if the value of the field is _4_RTCOUT0

pub fn is_5_rtcout0(&self) -> bool[src]

Checks if the value of the field is _5_RTCOUT0

pub fn is_6_rtcout0(&self) -> bool[src]

Checks if the value of the field is _6_RTCOUT0

pub fn is_7_rtcout0(&self) -> bool[src]

Checks if the value of the field is _7_RTCOUT0

pub fn is_8_rtcout0(&self) -> bool[src]

Checks if the value of the field is _8_RTCOUT0

impl R<u32, Reg<u32, _WUMR>>[src]

pub fn fwupen(&self) -> FWUPEN_R[src]

Bit 0 - Force Wake-up Enable

pub fn smen(&self) -> SMEN_R[src]

Bit 1 - Supply Monitor Wake-up Enable

pub fn rtten(&self) -> RTTEN_R[src]

Bit 2 - Real-time Timer Wake-up Enable

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 3 - Real-time Clock Wake-up Enable

pub fn lpdbcen0(&self) -> LPDBCEN0_R[src]

Bit 5 - Low-power Debouncer Enable WKUP0

pub fn lpdbcen1(&self) -> LPDBCEN1_R[src]

Bit 6 - Low-power Debouncer Enable WKUP1

pub fn lpdbcclr(&self) -> LPDBCCLR_R[src]

Bit 7 - Low-power Debouncer Clear

pub fn fwupdbc(&self) -> FWUPDBC_R[src]

Bits 8:10 - Force Wake-up Debouncer Period

pub fn wkupdbc(&self) -> WKUPDBC_R[src]

Bits 12:14 - Wake-up Inputs Debouncer Period

pub fn lpdbc(&self) -> LPDBC_R[src]

Bits 16:18 - Low-power Debouncer Period

impl R<bool, WKUPEN0_A>[src]

pub fn variant(&self) -> WKUPEN0_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN1_A>[src]

pub fn variant(&self) -> WKUPEN1_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN2_A>[src]

pub fn variant(&self) -> WKUPEN2_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN3_A>[src]

pub fn variant(&self) -> WKUPEN3_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN4_A>[src]

pub fn variant(&self) -> WKUPEN4_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN5_A>[src]

pub fn variant(&self) -> WKUPEN5_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN6_A>[src]

pub fn variant(&self) -> WKUPEN6_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN7_A>[src]

pub fn variant(&self) -> WKUPEN7_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN8_A>[src]

pub fn variant(&self) -> WKUPEN8_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN9_A>[src]

pub fn variant(&self) -> WKUPEN9_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN10_A>[src]

pub fn variant(&self) -> WKUPEN10_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN11_A>[src]

pub fn variant(&self) -> WKUPEN11_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN12_A>[src]

pub fn variant(&self) -> WKUPEN12_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN13_A>[src]

pub fn variant(&self) -> WKUPEN13_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN14_A>[src]

pub fn variant(&self) -> WKUPEN14_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPEN15_A>[src]

pub fn variant(&self) -> WKUPEN15_A[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<bool, WKUPT0_A>[src]

pub fn variant(&self) -> WKUPT0_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT1_A>[src]

pub fn variant(&self) -> WKUPT1_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT2_A>[src]

pub fn variant(&self) -> WKUPT2_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT3_A>[src]

pub fn variant(&self) -> WKUPT3_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT4_A>[src]

pub fn variant(&self) -> WKUPT4_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT5_A>[src]

pub fn variant(&self) -> WKUPT5_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT6_A>[src]

pub fn variant(&self) -> WKUPT6_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT7_A>[src]

pub fn variant(&self) -> WKUPT7_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT8_A>[src]

pub fn variant(&self) -> WKUPT8_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT9_A>[src]

pub fn variant(&self) -> WKUPT9_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT10_A>[src]

pub fn variant(&self) -> WKUPT10_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT11_A>[src]

pub fn variant(&self) -> WKUPT11_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT12_A>[src]

pub fn variant(&self) -> WKUPT12_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT13_A>[src]

pub fn variant(&self) -> WKUPT13_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT14_A>[src]

pub fn variant(&self) -> WKUPT14_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, WKUPT15_A>[src]

pub fn variant(&self) -> WKUPT15_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u32, Reg<u32, _WUIR>>[src]

pub fn wkupen0(&self) -> WKUPEN0_R[src]

Bit 0 - Wake-up Input Enable 0

pub fn wkupen1(&self) -> WKUPEN1_R[src]

Bit 1 - Wake-up Input Enable 1

pub fn wkupen2(&self) -> WKUPEN2_R[src]

Bit 2 - Wake-up Input Enable 2

pub fn wkupen3(&self) -> WKUPEN3_R[src]

Bit 3 - Wake-up Input Enable 3

pub fn wkupen4(&self) -> WKUPEN4_R[src]

Bit 4 - Wake-up Input Enable 4

pub fn wkupen5(&self) -> WKUPEN5_R[src]

Bit 5 - Wake-up Input Enable 5

pub fn wkupen6(&self) -> WKUPEN6_R[src]

Bit 6 - Wake-up Input Enable 6

pub fn wkupen7(&self) -> WKUPEN7_R[src]

Bit 7 - Wake-up Input Enable 7

pub fn wkupen8(&self) -> WKUPEN8_R[src]

Bit 8 - Wake-up Input Enable 8

pub fn wkupen9(&self) -> WKUPEN9_R[src]

Bit 9 - Wake-up Input Enable 9

pub fn wkupen10(&self) -> WKUPEN10_R[src]

Bit 10 - Wake-up Input Enable 10

pub fn wkupen11(&self) -> WKUPEN11_R[src]

Bit 11 - Wake-up Input Enable 11

pub fn wkupen12(&self) -> WKUPEN12_R[src]

Bit 12 - Wake-up Input Enable 12

pub fn wkupen13(&self) -> WKUPEN13_R[src]

Bit 13 - Wake-up Input Enable 13

pub fn wkupen14(&self) -> WKUPEN14_R[src]

Bit 14 - Wake-up Input Enable 14

pub fn wkupen15(&self) -> WKUPEN15_R[src]

Bit 15 - Wake-up Input Enable 15

pub fn wkupt0(&self) -> WKUPT0_R[src]

Bit 16 - Wake-up Input Type 0

pub fn wkupt1(&self) -> WKUPT1_R[src]

Bit 17 - Wake-up Input Type 1

pub fn wkupt2(&self) -> WKUPT2_R[src]

Bit 18 - Wake-up Input Type 2

pub fn wkupt3(&self) -> WKUPT3_R[src]

Bit 19 - Wake-up Input Type 3

pub fn wkupt4(&self) -> WKUPT4_R[src]

Bit 20 - Wake-up Input Type 4

pub fn wkupt5(&self) -> WKUPT5_R[src]

Bit 21 - Wake-up Input Type 5

pub fn wkupt6(&self) -> WKUPT6_R[src]

Bit 22 - Wake-up Input Type 6

pub fn wkupt7(&self) -> WKUPT7_R[src]

Bit 23 - Wake-up Input Type 7

pub fn wkupt8(&self) -> WKUPT8_R[src]

Bit 24 - Wake-up Input Type 8

pub fn wkupt9(&self) -> WKUPT9_R[src]

Bit 25 - Wake-up Input Type 9

pub fn wkupt10(&self) -> WKUPT10_R[src]

Bit 26 - Wake-up Input Type 10

pub fn wkupt11(&self) -> WKUPT11_R[src]

Bit 27 - Wake-up Input Type 11

pub fn wkupt12(&self) -> WKUPT12_R[src]

Bit 28 - Wake-up Input Type 12

pub fn wkupt13(&self) -> WKUPT13_R[src]

Bit 29 - Wake-up Input Type 13

pub fn wkupt14(&self) -> WKUPT14_R[src]

Bit 30 - Wake-up Input Type 14

pub fn wkupt15(&self) -> WKUPT15_R[src]

Bit 31 - Wake-up Input Type 15

impl R<bool, FWUPS_A>[src]

pub fn variant(&self) -> FWUPS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, WKUPS_A>[src]

pub fn variant(&self) -> WKUPS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMWS_A>[src]

pub fn variant(&self) -> SMWS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, BODRSTS_A>[src]

pub fn variant(&self) -> BODRSTS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMRSTS_A>[src]

pub fn variant(&self) -> SMRSTS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, SMOS_A>[src]

pub fn variant(&self) -> SMOS_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, OSCSEL_A>[src]

pub fn variant(&self) -> OSCSEL_A[src]

Get enumerated values variant

pub fn is_rc(&self) -> bool[src]

Checks if the value of the field is RC

pub fn is_cryst(&self) -> bool[src]

Checks if the value of the field is CRYST

impl R<bool, FWUPIS_A>[src]

pub fn variant(&self) -> FWUPIS_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, LPDBCS0_A>[src]

pub fn variant(&self) -> LPDBCS0_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, LPDBCS1_A>[src]

pub fn variant(&self) -> LPDBCS1_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_present(&self) -> bool[src]

Checks if the value of the field is PRESENT

impl R<bool, WKUPIS0_A>[src]

pub fn variant(&self) -> WKUPIS0_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS1_A>[src]

pub fn variant(&self) -> WKUPIS1_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS2_A>[src]

pub fn variant(&self) -> WKUPIS2_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS3_A>[src]

pub fn variant(&self) -> WKUPIS3_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS4_A>[src]

pub fn variant(&self) -> WKUPIS4_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS5_A>[src]

pub fn variant(&self) -> WKUPIS5_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS6_A>[src]

pub fn variant(&self) -> WKUPIS6_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS7_A>[src]

pub fn variant(&self) -> WKUPIS7_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS8_A>[src]

pub fn variant(&self) -> WKUPIS8_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS9_A>[src]

pub fn variant(&self) -> WKUPIS9_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS10_A>[src]

pub fn variant(&self) -> WKUPIS10_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS11_A>[src]

pub fn variant(&self) -> WKUPIS11_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS12_A>[src]

pub fn variant(&self) -> WKUPIS12_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS13_A>[src]

pub fn variant(&self) -> WKUPIS13_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS14_A>[src]

pub fn variant(&self) -> WKUPIS14_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<bool, WKUPIS15_A>[src]

pub fn variant(&self) -> WKUPIS15_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u32, Reg<u32, _SR>>[src]

pub fn fwups(&self) -> FWUPS_R[src]

Bit 0 - FWUP Wake-up Status

pub fn wkups(&self) -> WKUPS_R[src]

Bit 1 - WKUP Wake-up Status

pub fn smws(&self) -> SMWS_R[src]

Bit 2 - Supply Monitor Detection Wake-up Status

pub fn bodrsts(&self) -> BODRSTS_R[src]

Bit 3 - Brownout Detector Reset Status

pub fn smrsts(&self) -> SMRSTS_R[src]

Bit 4 - Supply Monitor Reset Status

pub fn sms(&self) -> SMS_R[src]

Bit 5 - Supply Monitor Status

pub fn smos(&self) -> SMOS_R[src]

Bit 6 - Supply Monitor Output Status

pub fn oscsel(&self) -> OSCSEL_R[src]

Bit 7 - 32-kHz Oscillator Selection Status

pub fn fwupis(&self) -> FWUPIS_R[src]

Bit 12 - FWUP Input Status

pub fn lpdbcs0(&self) -> LPDBCS0_R[src]

Bit 13 - Low-power Debouncer Wake-up Status on WKUP0

pub fn lpdbcs1(&self) -> LPDBCS1_R[src]

Bit 14 - Low-power Debouncer Wake-up Status on WKUP1

pub fn wkupis0(&self) -> WKUPIS0_R[src]

Bit 16 - WKUP Input Status 0

pub fn wkupis1(&self) -> WKUPIS1_R[src]

Bit 17 - WKUP Input Status 1

pub fn wkupis2(&self) -> WKUPIS2_R[src]

Bit 18 - WKUP Input Status 2

pub fn wkupis3(&self) -> WKUPIS3_R[src]

Bit 19 - WKUP Input Status 3

pub fn wkupis4(&self) -> WKUPIS4_R[src]

Bit 20 - WKUP Input Status 4

pub fn wkupis5(&self) -> WKUPIS5_R[src]

Bit 21 - WKUP Input Status 5

pub fn wkupis6(&self) -> WKUPIS6_R[src]

Bit 22 - WKUP Input Status 6

pub fn wkupis7(&self) -> WKUPIS7_R[src]

Bit 23 - WKUP Input Status 7

pub fn wkupis8(&self) -> WKUPIS8_R[src]

Bit 24 - WKUP Input Status 8

pub fn wkupis9(&self) -> WKUPIS9_R[src]

Bit 25 - WKUP Input Status 9

pub fn wkupis10(&self) -> WKUPIS10_R[src]

Bit 26 - WKUP Input Status 10

pub fn wkupis11(&self) -> WKUPIS11_R[src]

Bit 27 - WKUP Input Status 11

pub fn wkupis12(&self) -> WKUPIS12_R[src]

Bit 28 - WKUP Input Status 12

pub fn wkupis13(&self) -> WKUPIS13_R[src]

Bit 29 - WKUP Input Status 13

pub fn wkupis14(&self) -> WKUPIS14_R[src]

Bit 30 - WKUP Input Status 14

pub fn wkupis15(&self) -> WKUPIS15_R[src]

Bit 31 - WKUP Input Status 15

impl R<u32, Reg<u32, _MR>>[src]

pub fn rtpres(&self) -> RTPRES_R[src]

Bits 0:15 - Real-time Timer Prescaler Value

pub fn almien(&self) -> ALMIEN_R[src]

Bit 16 - Alarm Interrupt Enable

pub fn rttincien(&self) -> RTTINCIEN_R[src]

Bit 17 - Real-time Timer Increment Interrupt Enable

pub fn rttrst(&self) -> RTTRST_R[src]

Bit 18 - Real-time Timer Restart

pub fn rttdis(&self) -> RTTDIS_R[src]

Bit 20 - Real-time Timer Disable

pub fn rtc1hz(&self) -> RTC1HZ_R[src]

Bit 24 - Real-Time Clock 1Hz Clock Selection

impl R<u32, Reg<u32, _AR>>[src]

pub fn almv(&self) -> ALMV_R[src]

Bits 0:31 - Alarm Value

impl R<u32, Reg<u32, _VR>>[src]

pub fn crtv(&self) -> CRTV_R[src]

Bits 0:31 - Current Real-time Value

impl R<u32, Reg<u32, _SR>>[src]

pub fn alms(&self) -> ALMS_R[src]

Bit 0 - Real-time Alarm Status

pub fn rttinc(&self) -> RTTINC_R[src]

Bit 1 - Prescaler Roll-over Status

impl R<u32, Reg<u32, _MR>>[src]

pub fn wdv(&self) -> WDV_R[src]

Bits 0:11 - Watchdog Counter Value

pub fn wdfien(&self) -> WDFIEN_R[src]

Bit 12 - Watchdog Fault Interrupt Enable

pub fn wdrsten(&self) -> WDRSTEN_R[src]

Bit 13 - Watchdog Reset Enable

pub fn wdrproc(&self) -> WDRPROC_R[src]

Bit 14 - Watchdog Reset Processor

pub fn wddis(&self) -> WDDIS_R[src]

Bit 15 - Watchdog Disable

pub fn wdd(&self) -> WDD_R[src]

Bits 16:27 - Watchdog Delta Value

pub fn wddbghlt(&self) -> WDDBGHLT_R[src]

Bit 28 - Watchdog Debug Halt

pub fn wdidlehlt(&self) -> WDIDLEHLT_R[src]

Bit 29 - Watchdog Idle Halt

impl R<u32, Reg<u32, _SR>>[src]

pub fn wdunf(&self) -> WDUNF_R[src]

Bit 0 - Watchdog Underflow

pub fn wderr(&self) -> WDERR_R[src]

Bit 1 - Watchdog Error

impl R<u8, TIMEVSEL_A>[src]

pub fn variant(&self) -> TIMEVSEL_A[src]

Get enumerated values variant

pub fn is_minute(&self) -> bool[src]

Checks if the value of the field is MINUTE

pub fn is_hour(&self) -> bool[src]

Checks if the value of the field is HOUR

pub fn is_midnight(&self) -> bool[src]

Checks if the value of the field is MIDNIGHT

pub fn is_noon(&self) -> bool[src]

Checks if the value of the field is NOON

impl R<u8, CALEVSEL_A>[src]

pub fn variant(&self) -> Variant<u8, CALEVSEL_A>[src]

Get enumerated values variant

pub fn is_week(&self) -> bool[src]

Checks if the value of the field is WEEK

pub fn is_month(&self) -> bool[src]

Checks if the value of the field is MONTH

pub fn is_year(&self) -> bool[src]

Checks if the value of the field is YEAR

impl R<u32, Reg<u32, _CR>>[src]

pub fn updtim(&self) -> UPDTIM_R[src]

Bit 0 - Update Request Time Register

pub fn updcal(&self) -> UPDCAL_R[src]

Bit 1 - Update Request Calendar Register

pub fn timevsel(&self) -> TIMEVSEL_R[src]

Bits 8:9 - Time Event Selection

pub fn calevsel(&self) -> CALEVSEL_R[src]

Bits 16:17 - Calendar Event Selection

impl R<u8, OUT0_A>[src]

pub fn variant(&self) -> OUT0_A[src]

Get enumerated values variant

pub fn is_no_wave(&self) -> bool[src]

Checks if the value of the field is NO_WAVE

pub fn is_freq1hz(&self) -> bool[src]

Checks if the value of the field is FREQ1HZ

pub fn is_freq32hz(&self) -> bool[src]

Checks if the value of the field is FREQ32HZ

pub fn is_freq64hz(&self) -> bool[src]

Checks if the value of the field is FREQ64HZ

pub fn is_freq512hz(&self) -> bool[src]

Checks if the value of the field is FREQ512HZ

pub fn is_alarm_toggle(&self) -> bool[src]

Checks if the value of the field is ALARM_TOGGLE

pub fn is_alarm_flag(&self) -> bool[src]

Checks if the value of the field is ALARM_FLAG

pub fn is_prog_pulse(&self) -> bool[src]

Checks if the value of the field is PROG_PULSE

impl R<u8, OUT1_A>[src]

pub fn variant(&self) -> OUT1_A[src]

Get enumerated values variant

pub fn is_no_wave(&self) -> bool[src]

Checks if the value of the field is NO_WAVE

pub fn is_freq1hz(&self) -> bool[src]

Checks if the value of the field is FREQ1HZ

pub fn is_freq32hz(&self) -> bool[src]

Checks if the value of the field is FREQ32HZ

pub fn is_freq64hz(&self) -> bool[src]

Checks if the value of the field is FREQ64HZ

pub fn is_freq512hz(&self) -> bool[src]

Checks if the value of the field is FREQ512HZ

pub fn is_alarm_toggle(&self) -> bool[src]

Checks if the value of the field is ALARM_TOGGLE

pub fn is_alarm_flag(&self) -> bool[src]

Checks if the value of the field is ALARM_FLAG

pub fn is_prog_pulse(&self) -> bool[src]

Checks if the value of the field is PROG_PULSE

impl R<u8, THIGH_A>[src]

pub fn variant(&self) -> THIGH_A[src]

Get enumerated values variant

pub fn is_h_31ms(&self) -> bool[src]

Checks if the value of the field is H_31MS

pub fn is_h_16ms(&self) -> bool[src]

Checks if the value of the field is H_16MS

pub fn is_h_4ms(&self) -> bool[src]

Checks if the value of the field is H_4MS

pub fn is_h_976us(&self) -> bool[src]

Checks if the value of the field is H_976US

pub fn is_h_488us(&self) -> bool[src]

Checks if the value of the field is H_488US

pub fn is_h_122us(&self) -> bool[src]

Checks if the value of the field is H_122US

pub fn is_h_30us(&self) -> bool[src]

Checks if the value of the field is H_30US

pub fn is_h_15us(&self) -> bool[src]

Checks if the value of the field is H_15US

impl R<u8, TPERIOD_A>[src]

pub fn variant(&self) -> TPERIOD_A[src]

Get enumerated values variant

pub fn is_p_1s(&self) -> bool[src]

Checks if the value of the field is P_1S

pub fn is_p_500ms(&self) -> bool[src]

Checks if the value of the field is P_500MS

pub fn is_p_250ms(&self) -> bool[src]

Checks if the value of the field is P_250MS

pub fn is_p_125ms(&self) -> bool[src]

Checks if the value of the field is P_125MS

impl R<u32, Reg<u32, _MR>>[src]

pub fn hrmod(&self) -> HRMOD_R[src]

Bit 0 - 12-/24-hour Mode

pub fn persian(&self) -> PERSIAN_R[src]

Bit 1 - PERSIAN Calendar

pub fn negppm(&self) -> NEGPPM_R[src]

Bit 4 - NEGative PPM Correction

pub fn correction(&self) -> CORRECTION_R[src]

Bits 8:14 - Slow Clock Correction

pub fn highppm(&self) -> HIGHPPM_R[src]

Bit 15 - HIGH PPM Correction

pub fn out0(&self) -> OUT0_R[src]

Bits 16:18 - RTCOUT0 OutputSource Selection

pub fn out1(&self) -> OUT1_R[src]

Bits 20:22 - RTCOUT1 Output Source Selection

pub fn thigh(&self) -> THIGH_R[src]

Bits 24:26 - High Duration of the Output Pulse

pub fn tperiod(&self) -> TPERIOD_R[src]

Bits 28:29 - Period of the Output Pulse

impl R<u32, Reg<u32, _TIMR>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:6 - Current Second

pub fn min(&self) -> MIN_R[src]

Bits 8:14 - Current Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 16:21 - Current Hour

pub fn ampm(&self) -> AMPM_R[src]

Bit 22 - Ante Meridiem Post Meridiem Indicator

impl R<u32, Reg<u32, _CALR>>[src]

pub fn cent(&self) -> CENT_R[src]

Bits 0:6 - Current Century

pub fn year(&self) -> YEAR_R[src]

Bits 8:15 - Current Year

pub fn month(&self) -> MONTH_R[src]

Bits 16:20 - Current Month

pub fn day(&self) -> DAY_R[src]

Bits 21:23 - Current Day in Current Week

pub fn date(&self) -> DATE_R[src]

Bits 24:29 - Current Day in Current Month

impl R<u32, Reg<u32, _TIMALR>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:6 - Second Alarm

pub fn secen(&self) -> SECEN_R[src]

Bit 7 - Second Alarm Enable

pub fn min(&self) -> MIN_R[src]

Bits 8:14 - Minute Alarm

pub fn minen(&self) -> MINEN_R[src]

Bit 15 - Minute Alarm Enable

pub fn hour(&self) -> HOUR_R[src]

Bits 16:21 - Hour Alarm

pub fn ampm(&self) -> AMPM_R[src]

Bit 22 - AM/PM Indicator

pub fn houren(&self) -> HOUREN_R[src]

Bit 23 - Hour Alarm Enable

impl R<u32, Reg<u32, _CALALR>>[src]

pub fn month(&self) -> MONTH_R[src]

Bits 16:20 - Month Alarm

pub fn mthen(&self) -> MTHEN_R[src]

Bit 23 - Month Alarm Enable

pub fn date(&self) -> DATE_R[src]

Bits 24:29 - Date Alarm

pub fn dateen(&self) -> DATEEN_R[src]

Bit 31 - Date Alarm Enable

impl R<bool, ACKUPD_A>[src]

pub fn variant(&self) -> ACKUPD_A[src]

Get enumerated values variant

pub fn is_freerun(&self) -> bool[src]

Checks if the value of the field is FREERUN

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

impl R<bool, ALARM_A>[src]

pub fn variant(&self) -> ALARM_A[src]

Get enumerated values variant

pub fn is_no_alarmevent(&self) -> bool[src]

Checks if the value of the field is NO_ALARMEVENT

pub fn is_alarmevent(&self) -> bool[src]

Checks if the value of the field is ALARMEVENT

impl R<bool, SEC_A>[src]

pub fn variant(&self) -> SEC_A[src]

Get enumerated values variant

pub fn is_no_secevent(&self) -> bool[src]

Checks if the value of the field is NO_SECEVENT

pub fn is_secevent(&self) -> bool[src]

Checks if the value of the field is SECEVENT

impl R<bool, TIMEV_A>[src]

pub fn variant(&self) -> TIMEV_A[src]

Get enumerated values variant

pub fn is_no_timevent(&self) -> bool[src]

Checks if the value of the field is NO_TIMEVENT

pub fn is_timevent(&self) -> bool[src]

Checks if the value of the field is TIMEVENT

impl R<bool, CALEV_A>[src]

pub fn variant(&self) -> CALEV_A[src]

Get enumerated values variant

pub fn is_no_calevent(&self) -> bool[src]

Checks if the value of the field is NO_CALEVENT

pub fn is_calevent(&self) -> bool[src]

Checks if the value of the field is CALEVENT

impl R<bool, TDERR_A>[src]

pub fn variant(&self) -> TDERR_A[src]

Get enumerated values variant

pub fn is_correct(&self) -> bool[src]

Checks if the value of the field is CORRECT

pub fn is_err_timedate(&self) -> bool[src]

Checks if the value of the field is ERR_TIMEDATE

impl R<u32, Reg<u32, _SR>>[src]

pub fn ackupd(&self) -> ACKUPD_R[src]

Bit 0 - Acknowledge for Update

pub fn alarm(&self) -> ALARM_R[src]

Bit 1 - Alarm Flag

pub fn sec(&self) -> SEC_R[src]

Bit 2 - Second Event

pub fn timev(&self) -> TIMEV_R[src]

Bit 3 - Time Event

pub fn calev(&self) -> CALEV_R[src]

Bit 4 - Calendar Event

pub fn tderr(&self) -> TDERR_R[src]

Bit 5 - Time and/or Date Free Running Error

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ack(&self) -> ACK_R[src]

Bit 0 - Acknowledge Update Interrupt Mask

pub fn alr(&self) -> ALR_R[src]

Bit 1 - Alarm Interrupt Mask

pub fn sec(&self) -> SEC_R[src]

Bit 2 - Second Event Interrupt Mask

pub fn tim(&self) -> TIM_R[src]

Bit 3 - Time Event Interrupt Mask

pub fn cal(&self) -> CAL_R[src]

Bit 4 - Calendar Event Interrupt Mask

impl R<u32, Reg<u32, _VER>>[src]

pub fn nvtim(&self) -> NVTIM_R[src]

Bit 0 - Non-valid Time

pub fn nvcal(&self) -> NVCAL_R[src]

Bit 1 - Non-valid Calendar

pub fn nvtimalr(&self) -> NVTIMALR_R[src]

Bit 2 - Non-valid Time Alarm

pub fn nvcalalr(&self) -> NVCALALR_R[src]

Bit 3 - Non-valid Calendar Alarm

impl R<u32, Reg<u32, _GPBR>>[src]

pub fn gpbr_value(&self) -> GPBR_VALUE_R[src]

Bits 0:31 - Value of GPBR x

impl R<u32, Reg<u32, _MR>>[src]

pub fn wdv(&self) -> WDV_R[src]

Bits 0:11 - Watchdog Counter Value

pub fn wdfien(&self) -> WDFIEN_R[src]

Bit 12 - Watchdog Fault Interrupt Enable

pub fn wdrsten(&self) -> WDRSTEN_R[src]

Bit 13 - Watchdog Reset Enable

pub fn wdrproc(&self) -> WDRPROC_R[src]

Bit 14 - Watchdog Reset Processor

pub fn wddis(&self) -> WDDIS_R[src]

Bit 15 - Watchdog Disable

pub fn wdd(&self) -> WDD_R[src]

Bits 16:27 - Watchdog Delta Value

pub fn wddbghlt(&self) -> WDDBGHLT_R[src]

Bit 28 - Watchdog Debug Halt

pub fn wdidlehlt(&self) -> WDIDLEHLT_R[src]

Bit 29 - Watchdog Idle Halt

impl R<u32, Reg<u32, _SR>>[src]

pub fn wdunf(&self) -> WDUNF_R[src]

Bit 0 - Watchdog Underflow

pub fn wderr(&self) -> WDERR_R[src]

Bit 1 - Watchdog Error

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.